The ADAS3023 is a complete 16-bit, successive approximation-based, analog-to-digital data acquisition system. This device is capable of simultaneously sampling up to 500 kSPS for two channels, 250 kSPS for four channels, 167 kSPS for six channels, and 125 kSPS for eight channels, and manufactured on the Analog Devices, Inc., proprietary iCMOS? high voltage industrial process technology.The ADAS3023 integrates eight channels of low leakage track-and-hold design, a programmable gain instrumentation amplifier (PGIA) stage with a high common-mode rejection offering four differential input ranges, a precision low drift 4.096 V reference and buffer, and a 16-bit charge redistribution PulSAR? successive approximation register (SAR) analog-to-digital converter (ADC). The ADAS3023 is factory calibrated and can resolve differential input ranges of up to ?20.48 V when using ?15 V supplies.The ADAS3023 simplifies design challenges by eliminating signal buffering, level shifting, amplification and attenuation, common-mode rejection, settling time, or any of the other analog signal conditioning challenges, and allows smaller form factor, faster time to market, and lower costs.The ADAS3023 is available in a 40-lead LFCSP with operation specified from ?40?C to +85?C.

The ADATE320 is a complete, single-chip ATE solution that performs the pin electronics functions of a driver, comparator, and active load (DCL), and a four quadrant per pin parametric measurement unit (PPMU). Dedicated 16-bit digital-to-analog converters (DACs) with on-chip calibration registers provide all the necessary dc levels for operation of the device.The driver features three active modes: high, low, and terminate, as well as a high impedance inhibit state. The inhibit state, in conjunction with the integrated dynamic clamps, facilitates significant attenuation of transmission line reflections when the driver is not actively terminating the line. The open-circuit drive capability is ?1.5 V to +4.5 V to accommodate a standard range of ATE and instrumentation applications.The ADATE320 can be used as a dual, single-ended pin electronics channel or as a single differential channel. In addition to per channel high speed window comparators, the ADATE320 provides a programmable threshold differential comparator for differential ATE applications.All dc levels for DCL and PPMU functions are generated by dedicated, on-chip, 16-bit DACs. To facilitate the programming of accurate levels, the ADATE320 includes an integrated calibration function to correct for the gain and offset errors of each functional block. Correction coefficients can be stored on chip, and any values written to the DACs adjust automatically using the appropriate correction factors.The ADATE320 uses a serial programmable interface (SPI) bus to program all functional blocks, DACs, and on-chip calibration constants. It also has an on-chip temperature sensor and overvolt-age/undervoltage fault clamps that monitor and report the device temperature and any output pin or transient PPMU voltage faults that may occur during operation.The ADATE320 is available in two options. The standard option has high speed comparator outputs with 250 mV output swing. The ADATE320-1 has 400 mV output swing. See the Ordering Guide for more information.APPLICATIONSAutomatic test equipment (ATE)Semiconductor/board test systemsInstrumentation and characterization equipment

The ADFS5758 is a single-channel, 16-bit, current/voltage output DAC. The device is functional safety approved for unipolar current output and is a fully compliant item with a systematic capability of SC3, which can be used in safety-related applications up to SIL 2, according to IEC 61508. This arrangement allows a single ADFS5758 to be used to achieve SIL 2 for a nonredundant configuration. The safe state for the ADFS5758 is open circuit/high impedance.The ADFS5758 is a single-channel, voltage and current output digital-to-analog converter (DAC) that operates with a power supply range from ?33 V minimum on AVSS to +33 V maximum on AVDD1 with a maximum operating voltage between the two rails of 60 V. On-chip dynamic power control (DPC) minimizes package power dissipation, which is achieved by regulating the supply voltage (VDPC+) to the VIOUT output driver circuitry from 4.95 V to 27 V using a buck dc-to-dc converter, optimized for minimum on-chip power dissipation. The CHART pin enables a HART? signal to be coupled onto the current output.The device uses a versatile 4-wire serial peripheral interface (SPI) that operates at clock rates of up to 50 MHz and is compatible with standard SPI, QSPI?, MICROWIRE?, DSP, and microcontroller interface standards. The interface also features an optional SPI cyclic redundancy check (CRC) and a windowed watchdog timer. The ADFS5758 offers improved diagnostic features from its predecessors, such as an integrated independent 12-bit diagnostic analog-to-digital converter (ADC) that can be used to digitize both internal and external nodes.Product HighIights Functional safety approved to SIL 2/SC3 by T?V Rheinland. Range of advanced diagnostic features, including an integrated ADC for high reliability. DPC using an integrated buck dc-to-dc converter for thermal management. When used with the ADP1031, the ADFS5758 enables eight channel to channel isolated outputs at <2 W dissipated power. Programmable power control (PPC) mode to enable faster settling time (15 ?s typical). Highly robust with output protection from miswire events (?38 V). Applications Process control Actuator control Channel isolated analog outputs Programmable logic controller (PLC) and distributed control system (DCS) applications HART network connectivity

The EVAL-LTC2420-EBZ is a fully featured evaluation board that evaluates the LTC2420, a 20-bit, μPower, no latency, ΔΣ analog-to-digital converter (ADC). The EVAL-LTC2420-EBZ uses QuikEval evaluation software to provide an intuitive graphical user interface (GUI) that configures and controls the LTC2420 using the serial peripheral interface (SPI). The LTC2420 is used for various data acquisition applications such as weigh scales or gas analyzers. The LTC2420 accepts any external reference voltage from 0.1 V to VCC and can be configured to reject 50 Hz or 60 Hz interference. For full specifications on the LTC2420, see the LTC2420 data sheet, which must be consulted with the user guide when using the EVAL-LTC2420-EBZ.

The ADPD103 is a highly efficient photometric front end with an integrated 14-bit analog-to-digital converter (ADC) and a 20-bit burst accumulator that works in concert with flexible light emitting diode (LED) drivers. It is designed to stimulate an LED and measure the corresponding optical return signal. The data output and functional configuration occur over a 1.8 V I2C interface. The control circuitry includes flexible LED signaling and synchronous detection. The analog front end (AFE) features best-in-class rejection of signal offset and corruption due to modulated interference commonlycaused by ambient light.Couple the ADPD103 with a low capacitance photodiode of <100 pF for optimal performance. The ADPD103 can be used with any LED.Aplications Body worn health and fitness monitors, for example, heart rate monitoring Clinical measurements, for example, SpO2 Industrial monitoring Background light measurements

Quad, 16-Bit nanoDAC+ with 2 ppm/C On-Chip Reference and SPI Interface Features: High relative accuracy (INL): ±2 LSB maximum at 16-bits Low drift 2.5 V reference:: 2 ppm/°C typical Tiny package: 3 mm × 3 mm, 16-lead LFCSP or TSSOP Total unadjusted error (TUE): 0.1% of FSR maximum Offset error: 1.5 mV maximum Gain error: 0.1 % of FSR maximum See data sheet for additional featuresAD5686R-EP supports defense and aerospace applications (AQEC standard) Download AD5686R-EP Data Sheet (pdf) Temperature range: −55°C to +125°C Controlled manufacturing baseline 1 assembly/test site 1 fabrication site Enhanced product change notification Qualification data available on request V62/14335 DSCC Drawing Number

Quad, 16-Bit nanoDAC+ with 2 ppm/C On-Chip Reference and SPI Interface Features: High relative accuracy (INL): ±2 LSB maximum at 16-bits Low drift 2.5 V reference:: 2 ppm/°C typical Tiny package: 3 mm × 3 mm, 16-lead LFCSP or TSSOP Total unadjusted error (TUE): 0.1% of FSR maximum Offset error: 1.5 mV maximum Gain error: 0.1 % of FSR maximum See data sheet for additional featuresAD5686R-EP supports defense and aerospace applications (AQEC standard) Download AD5686R-EP Data Sheet (pdf) Temperature range: −55°C to +125°C Controlled manufacturing baseline 1 assembly/test site 1 fabrication site Enhanced product change notification Qualification data available on request V62/14335 DSCC Drawing Number

True Accuracy, 16-Bit 12 V/15 V, Serial Input Voltage Output D/A Converter Features: Full 16-bit performance 1 LSB max INL and DNL Output voltage range up to ±14 V On-board reference buffers, eliminating the need for a negative reference Temperature ranges of −40°C to +85°C for A/B version/−40°C to +125°C for W/Y version Controlled output during power-on Settling time of 10 µs to 0.003% Clear function to 0 V Asynchronous update of outputs (LDAC pin) Power-on reset Serial data output for daisy chaining Data readback facility

2.7 V to 5.5 V, Serial-Input, Voltage-Output, 16-Bit nanoDAC in 10-lead LFCSP, 16-lead 3 mm x 3 mm LFCSP, and 16-lead TSSOP Features: 12-/16-bit resolution 1 LSB INL 11.8 nV/√Hz noise spectral density 1 μs settling time 1.1 nV-sec glitch energy 0.05 ppm/°C temperature drift 5 kV HBM ESD classification See data sheet for additional features Also available in16-lead TSSOP

24-Bit, 312 kSPS, 109 dB Sigma-Delta ADC with On-Chip Buffers and Serial Interface Features: High performance 24-bit Σ-Δ ADC 115 dB dynamic range at 78.125 kHz output data rate 109 dB dynamic range at 312.5 kHz output data rate 312.5 kHz maximum fully filtered output word rate Pin-selectable oversampling rates of 64×, 128×, and 256× Low power mode Flexible serial peripheral interface (SPI) Fully differential modulator input On-chip differential amplifier for signal buffering On-chip reference buffer Full band, low-pass, finite impulse response (FIR) filter Overrange alert pin Digital gain correction registers Power-down mode Synchronization of multiple devices via the SYNC pin Daisy chaining