16-Bit, Isolated Sigma-Delta Modulator Features: 5 MHz to 20 MHz external clock input rate 16 bits, no missing codes Signal to noise ratio (SNR): 88 dB (typical) Effective number of bits (ENOB): 14.2 bits typical Typical offset drift vs. temperature: 1.6 μV/°C typical On-board digital isolator On-board reference See data sheet for additional featuresAD7403-EP supports defense and aerospace applications (AQEC standard) Download AD7403-EP data sheet Military temperature range: −55°C to +125°C Controlled manufacturing baseline One assembly/test site One fabrication site Enhanced product change notification Qualification data available on request V62/16625 DSCC Drawing Number

+3.3 V/+5 V Multiplying 12-Bit DAC With an 8-Bit Byte Interface Features: 12-Bit Multiplying DACs Guaranteed Specifications wth +3.3 V/+5 Supply 0.5 LSBs INL and DNL Low Power: 5 µW typ Fast Settling: 600 ns to 0.01% with AD843 Fast Interface 40 ns Strobe Pulsewidth (AD7943) 40 ns Write Pulsewidth (AD7945, A7948) Low Glitch: 60 nV-s with Amplifier Connected

2-Channel, 12-Bit ADC with I2C Compatible Interface in 10-Lead MSOP Features: 12-Bit ADC with Fast Conversion Time: 2 µs Two Single-Ended Analog Input Channels Specified for VDD of 2.7 V to 5.5 V Low Power Consumption Fast Throughput Rate: - 188 kSPS Sequencer Operation Automatic Cycle Mode I2C® Compatible Serial Interface I2C® Interface supports: Standard, Fast, and High-Speed Modes Out of Range Indicator Pin-Selectable Addressing via AS Automatic Shutdown Mode: - 1 µA max

4-Channel, I2C, Ultralow Power 12-Bit ADC in 20-Lead LFCSP/TSSOP Features: I2C-compatible serial interface supports standard and fast modes Ultralow power: 90 μW typical at 3 V in fast mode Specified for VDD of 2.7 V to 5.25 V On-chip accurate 2.5 V reference, 5 ppm/°C typical drift 4 single-ended analog input channels ALERT function BUSY function Autocycle mode Wide input bandwidth 68 dB signal-to-noise ratio (SNR) typical at input frequency of 1 kHz Flexible power/throughput rate management No pipeline delays Power-down mode 550 nA typical at VDD = 5.25 V 435 nA typical at VDD = 3 V 20-lead LFCSP and TSSOP packages Temperature range: −40°C to +125°C

4-Channel, Low Noise, Low Power, 24-Bit, Sigma-Delta ADC with PGA and Reference Features: Three power modes RMS noise Low power: 24 nV rms at 1.17 SPS, gain = 128 (255 μA typical) Mid power: 20 nV rms at 2.34 SPS, gain = 128 (355 μA typical) Full power: 23 nV rms at 9.4 SPS, gain = 128 (930 μA typical) Up to 22 noise free bits in all power modes (gain = 1) Output data rate Full power: 9.38 SPS to 19,200 SPS Mid power: 2.34 SPS to 4800 SPS Low power: 1.17 SPS to 2400 SPS Rail-to-rail analog inputs for gains > 1 Simultaneous 50 Hz/60 Hz rejection at 25 SPS (single cycle settling) Diagnostic functions (which aid safe integrity level (SIL) certification Crosspoint multiplexed analog inputs 4 differential/7 pseudo differential inputs Programmable gain (1 to 128) Band gap reference with 10 ppm/°C drift maximum (70 μA) Matched programmable excitation currents Internal clock oscillator On-chip bias voltage generator Low-side power switch General-purpose outputs Multiple filter options Internal temperature sensor Self and system calibration Sensor burnout detection Automatic channel sequencer Per channel configuration Power supply: 2.7 V to 3.6 V and ±1.8 V Independent interface power supply Power-down current: 5 μA maximum Temperature range: −40°C to +125°C 32-lead LFCSP/24-lead TSSOP 3-wire or 4-wire serial interface SPI, QSPI, MICROWIRE, and DSP compatible Schmitt trigger on SCLK ESD: 4 kVAD7124-4-EP Supports defense and aerospace applications (AQEC standard) Download AD7124-4-EP Data Sheet (PDF) Full military temperature range: −55°C to +125°C Controlled manufacturing baseline 1 assembly/test site 1 fabrication site Product change notification Qualification data available on request V62/19614

4-Channel 200 kSPS, 12-Bit A/D Converter with Sequencer in 16-Lead TSSOP Features: Fast throughput rate: 200 kSPS Specified for AVDD of 2.7 V to 5.25 V Low power 3.6 mW max at 200 kSPS with 3 V supply 7.5 mW max at 200 kSPS with 5 V supply 4 (single-ended) inputs with sequencer Wide input bandwidth 70 dB Min SNR at 50 kHz input frequency Flexible power/serial clock speed management No pipeline delays High speed serial interface SPI® -/QSPI™-/ MICROWIRE™-/DSP-compatible Shutdown mode: 0.5 μA max 16-lead TSSOP package Qualified for automotive applicationsAD7923-EP supports defense and aerospace applications (AQEC standard) Download AD7923-EP data sheet (pdf) Military temperature range (−55°C to +125°C) Controlled manufacturing baseline One assembly/test site One fabrication site Product change notification Qualification data available on request V62/12647 DSCC Drawing Number

+3.3 V/+5 V Multiplying 12-Bit DAC With a Serial Interface Features: 12-Bit Multiplying DACs 0.5 LSBs INL and DNL Fast Interface 40 ns Strobe Pulsewidth (AD7943) 40 ns Write Pulsewidth (AD7945, A7948) Guaranteed Specifications wth +3.3 V/+5 Supply Low Power: 5 µW typ Low Glitch: 60 nV-s with Amplifier Connected Fast Settling: 600 ns to 0.01% with AD843

2-Channel, 2.35 V to 5.25 V, 1 MSPS, 12-Bit A/D Converter Features: Fast Throughput Rate: 1 MSPS Specified for VDD of 2.35 V to 5.25 V Low Power: 4.8 mW typ at 1 MSPS with 3 V Supplies 15.5 mW typ at 1 MSPS with 5 V Supplies Wide Input Bandwidth: 71.4 dB min SNR at 100 kHz Input Frequency Flexible Power/Serial Clock Speed Management No Pipeline Delays High Speed Serial Interface SPI®/QSPI™/MICROWIRE™/DSP Compatible Standby Mode: 1 µA max Daisy Chain Mode 8-Lead TSOT Package 8-Lead MSOP Package

Low Power, 5-Electrode Electrocardiogram (ECG) Analog Front End with respiration measurement and pace detection) Features: Biopotential signals in; digitized signals out 5 acquisition (ECG) channels and one driven lead Parallel ICs for up to 10+ electrode measurements Master ADAS1000 or ADAS1000-1 used with slave ADAS1000-2 AC and dc lead-off detection Internal pace detection algorithm on 3 leads Support for user’s own pace Thoracic impedance measurement (internal/external path) Selectable reference lead Scalable noise vs. power control, power-down modes Low power operation from 11 mW (1 lead), 15 mW (3 leads), 21 mW (all electrodes) Lead or electrode data available Supports AAMI EC11:1991/(R)2001/(R)2007, AAMI EC38 R2007, EC13:2002/(R)2007, IEC60601-1 ed. 3.0 b:2005, IEC60601-2-25 ed. 2.0 :2011, IEC60601-2-27 ed. 2.0 b:2005, IEC60601-2-51 ed. 1.0 b: 2005 Fast overload recovery Low or high speed data output rates Serial interface SPI-/QSPI™-/DSP-compatible 56-lead LFCSP package (9 mm × 9 mm) 64-lead LQFP package (10 mm × 10 mm body size)

Dual, 16-Bit, 12.6 GSPS RF DAC with Wideband Channelizers Features: Supports multiband wireless applications 3 bypassable, complex data input channels per RF DAC 3.08 GSPS maximum complex input data rate per input channel 1 independent NCO per input channel Proprietary, low spurious and distortion design 2-tone IMD3 = −83 dBc at 1.84GHz, −7 dBFS/tone RF output SFDR <−80 dBc at 1.84 GHz, −7 dBFS RF output Flexible 8-lane, 15.4 Gbps JESD204B interface Supports single-band and multiband use cases Supports 12-bit high density mode for increased data throughput Multiple chip synchronization Supports JESD204B Subclass 1 Selectable interpolation filter for a complete set of input data rates 1×, 2×, 3×, 4×, 6×, and 8× configurable data channel interpolation 1×, 2×, 4×, 6×, 8×, and 12× configurable final interpolation Final 48-bit NCO that operates at the DAC rate to support frequency synthesis up to 6 GHz Transmit enable function allows extra power saving and downstream circuitry protection High performance, low noise PLL clock multiplier Supports 12.6 GSPS DAC update rate Observation ADC clock driver with selectable divide ratios Low power 2.54 W with 2 DACs at 12 GSPS, DAC PLL on 10 mm × 10 mm, 144-ball BGA_ED with metal enhanced thermal lid, 0.80 mm pitch