The AD9695 is a dual, 14-bit, 1300 MSPS/625 MSPS analog-to-digital converter (ADC). The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This product is designed to support communications applications capable of direct sampling wide bandwidth analog signals of up to 2 GHz. The ?3 dB bandwidth of the ADC input is 2 GHz. The AD9695 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package.The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. The analog input and clock signals are differential inputs. The ADC data outputs are internally connected to four digital downconverters (DDCs) through a crossbar mux. Each DDC consists of multiple signal processing stages: a 48-bit frequency translator (numerically controlled oscillator (NCO)), and decimation filters. The NCO has the option to select up to 16 preset bands over the general-purpose input/output (GPIO) pins, or use a coherent fast frequency hopping mechanism for band selection. Operation of the AD9695 between the DDC modes is selectable via SPI-programmable profiles.In addition to the DDC blocks, the AD9695 has several functions that simplify the automatic gain control (AGC) function in a communications receiver. The programmable threshold detector allows monitoring of the incoming signal power using the fast detect control bits in Register 0x0245 of the ADC. If the input signal level exceeds the programmable threshold, the fast detect indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition at the ADC input. In addition to the fast detect outputs, the AD9695 also offers signal monitoring capability. The signal monitoring block provides additional information about the signal being digitized by the ADC.The user can configure the Subclasss 1 JESD204B-based high speed serialized output using either one lane, two lanes, or four lanes, depending on the DDC configuration and the acceptable lane rate of the receiving logic device. Multidevice synchronization is supported through the SYSREF? and SYNCINB? input pins.The AD9695 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using a 3-wire serial port interface (SPI) and or PDWN/STBY pin.The AD9695 is available in a Pb-free, 64-lead LFCSP and is specified over the ?40?C to +105?C junction temperature range. This product may be protected by one or more U.S. or international patents.Note that, throughout this data sheet, multifunction pins, such as FD_A/GPIO_A0, are referred to either by the entire pin name or by a single function of the pin, for example, FD_A, when only that function is relevant.Product Highlights Low power consumption per channel. JESD204B lane rate support up to 16 Gbps. Wide, full power bandwidth supports intermediate frequency (IF) sampling of signals up to 2 GHz. Buffered inputs ease filter design and implementation. Four integrated wideband decimation filters and NCO blocks supporting multiband receivers. Programmable fast overrange detection. On-chip temperature diode for system thermal management.Applications Communications Diversity multiband, multimode digital receivers 3G/4G, TD-SCDMA, WCDMA, GSM, LTE General-purpose software radios Ultrawideband satellite receiver Instrumentation Oscilloscopes Spectrum analyzers Network analyzers Integrated RF test solutions Radars Electronic support measures, electronic counter measures, and electronic counter-counter measures High speed data acquisition systems DOCSIS 3.0 CMTS upstream receive paths Hybrid fiber coaxial digital reverse path receivers Wideband digital predistortion

The AD9704/AD9705/AD9706/AD9707 are the fourth-generation family in the TxDAC series of high performance, CMOS digital-to-analog converters (DACs). This pin-compatible, 8-/10-/12-/14-bit resolution family is optimized for low power operation, while maintaining excellent dynamic performance. The AD9704/AD9705/AD9706/AD9707 family is pin-compatible with the AD9748/AD9740/AD9742/AD9744 family of TxDAC converters and is specifically optimized for the transmit signal path of communication systems. All of the devices share the same interface, LFCSP package, and pinout, providing an upward or downward component selection path based on performance, resolution, and cost. The AD9704/AD9705/AD9706/AD9707 offers exceptional ac and dc performance, while supporting update rates up to 175 MSPS.The flexible power supply operating range of 1.7 V to 3.6 V and low power dissipation of the AD9704/AD9705/AD9706/AD9707 parts make them well suited for portable and low power applications.Power dissipation of the AD9704/AD9705/AD9706/AD9707 can be reduced to 15 mW, with a small trade-off in performance, by lowering the full-scale current output. In addition, a power-down mode reduces the standby power dissipation to approximately 2.2 mW.The AD9704/AD9705/AD9706/AD9707 has an optional serial peripheral interface (SPI?) that provides a higher level of programmability to enhance performance of the DAC. An adjustable output, common-mode feature allows for easy interfacing to other components that require common modes from 0 V to 1.2 V.Edge-triggered input latches and a 1.0 V temperature-compensated band gap reference have been integrated to provide a complete, monolithic DAC solution. The digital inputs support 1.8 V and 3.3 V CMOS logic families.PRODUCT HIGHLIGHTS Pin Compatible. The AD9704/AD9705/AD9706/AD9707 line of TxDAC?converters is pin-compatible with theAD9748/AD9740/AD9742/AD9744 TxDAC line (LFCSP package). Low Power. Complete CMOS DAC operates on a single supply of 3.6 V down to 1.7 V, consuming 50 mW (3.3 V) and 12 mW (1.8 V). The DAC full-scale current can be reduced for lower power operation. Sleep and power-down modes are provided for low power idle periods. Self-Calibration. Self-calibration enables true 14-bit INL and DNL performance in the AD9707. Twos Complement/Binary Data Coding Support. Data input supports twos complement or straight binary data coding. Flexible Clock Input. A selectable high speed, single-ended,and differential CMOS clock input supports 175 MSPS conversion rate. Device Configuration. Device can be configured through pin strapping, and SPI control offers a higher level of programmability. Easy Interfacing to Other Components. Adjustable common-mode output allows for easy interfacing to other signal chain components that accept common-mode levels from 0 V to 1.2 V. On-Chip Voltage Reference. The AD9704/AD9705/AD9706/AD9707 include a 1.0 V temperature-compensated band gap voltage reference. Industry-Standard 32-Lead LFCSP Package.

The AD9736, AD9735, and AD9734 are high performance, high frequency DACs that provide sample rates of up to 1200 MSPS, permitting multicarrier generation up to their Nyquist frequency. The AD9736 is the 14-bit member of the family, while the AD9735 and the AD9734 are the 12-bit and 10-bit members, respectively. They include a serial peripheral interface (SPI) port that provides for programming of many internal parameters and enables readback of status registers.A reduced-specification LVDS interface is utilized to achieve the high sample rate. The output current can be programmed over a range of 8.66 mA to 31.66 mA. The AD973x family is manufactured on a 0.18 ?m CMOS process and operates from 1.8 V and 3.3 V supplies for a total power consumption of 380 mW in bypass mode. It is supplied in a 160-lead chip scale ball grid array for reduced package parasitics.Product Highlights Low noise and intermodulation distortion (IMD) features enable high quality synthesis of wideband signals at intermediate frequencies up to 600 MHz. Double data rate (DDR) LVDS data receivers support the maximum conversion rate of 1200 MSPS. Direct pin programmability of basic functions or SPI port access offers complete control of all AD973x family functions. Manufactured on a CMOS process, the AD973x family uses a proprietary switching technique that enhances dynamic performance. The current output(s) of the AD9736 family are easily configured for single-ended or differential circuit topologies.Applications Broadband communications systems Cellular infrastructure (digital predistortion) Point-to-point wireless CMTS/VOD Instrumentation, automatic test equipment Radar, avionics

The AD9736, AD9735, and AD9734 are high performance, high frequency DACs that provide sample rates of up to 1200 MSPS, permitting multicarrier generation up to their Nyquist frequency. The AD9736 is the 14-bit member of the family, while the AD9735 and the AD9734 are the 12-bit and 10-bit members, respectively. They include a serial peripheral interface (SPI) port that provides for programming of many internal parameters and enables readback of status registers.A reduced-specification LVDS interface is utilized to achieve the high sample rate. The output current can be programmed over a range of 8.66 mA to 31.66 mA. The AD973x family is manufactured on a 0.18 ?m CMOS process and operates from 1.8 V and 3.3 V supplies for a total power consumption of 380 mW in bypass mode. It is supplied in a 160-lead chip scale ball grid array for reduced package parasitics.Product Highlights Low noise and intermodulation distortion (IMD) features enable high quality synthesis of wideband signals at intermediate frequencies up to 600 MHz. Double data rate (DDR) LVDS data receivers support the maximum conversion rate of 1200 MSPS. Direct pin programmability of basic functions or SPI port access offers complete control of all AD973x family functions. Manufactured on a CMOS process, the AD973x family uses a proprietary switching technique that enhances dynamic performance. The current output(s) of the AD9736 family are easily configured for single-ended or differential circuit topologies.Applications Broadband communications systems Cellular infrastructure(digital predistortion) Point-to-point wireless CMTS/VOD Instrumentation, automatic test equipment Radar, avionics

The AD5426 / AD5432 / AD5443 EVAL-AD5443SDZ / EVAL-AD5446SDZ / EVAL-AD5453SDZ are CMOS 8-, 10-, and 12-bit current output digital-to-analog converters (DACs), respectively. These devices operate from a 2.5 V to 5.5 V power supply, making them suitable for battery-powered applications and many other applications.These DACs use a double buffered, 3-wire serial interface that is compatible with SPI, QSPI™, MICROWIRE™, and most DSP interface standards. In addition, a serial data out pin (SDO) allows for daisy-chaining when multiple packages are used. Data readback allows the user to read the contents of the DAC register via the SDO pin. On power-up, the internal shift register and latches are filled with 0s and the DAC outputs are at zero scale.As a result of manufacturing on a CMOS submicron process, the parts offer excellent 4-quadrant multiplication characteristics with large signal multiplying bandwidths of 10 MHz. The applied external reference input voltage, VREF, determines the full-scale output current. An integrated feedback resistor, RFB, provides temperature tracking and full-scale voltage output when combined with an external current to voltage precision amplifier.The AD5426 / AD5432 / AD5443 EVAL-AD5443SDZ / EVAL-AD5446SDZ / EVAL-AD5453SDZ DACs are available in small, 10-lead MSOP packages.The EVAL-AD5443SDZ / EVAL-AD5446SDZ / EVAL-AD5453SDZ evaluation board is available for evaluating DAC performance. For more information, see the UG-327 evaluation board user guide.APPLICATIONS Portable battery-powered applications Waveform generators Instrumentation Programmable amplifiers and attenuators Digitally controlled calibration Programmable filters and oscillators Composite video Ultrasound Gain, offset, and voltage trimming

Analog to Digital Converters - ADC 10 BIT, SINGLE, PARALLEL,ADC I.C.

The AD5724 / AD5734 / AD5754 are quad, 12-/14-/16-bit, serialinput, voltage output digital-to-analog converters. They operate from single-supply voltages from +4.5 V up to +16.5 V or dual-supply voltages from ±4.5 V up to ±16.5 V. Nominal full-scaleoutput range is software-selectable from +5 V, +10 V, +10.8 V, ±5 V, ±10 V, or ±10.8 V. Integrated output amplifiers, referencebuffers, and proprietary power-up/power-down control circuitry are also provided.The parts offer guaranteed monotonicity, integral nonlinearity (INL) of ±16 LSB maximum, low noise, and 10 μs maximum settling time.The AD5724 / AD5734 / AD5754 use a serial interface that operates at clock rates up to 30 MHz and are compatible with DSP and microcontroller interface standards. Double buffering allows the simultaneous updating of all DACs. The input coding is user-selectable twos complement or offset binary for a bipolar output (depending on the state of Pin BIN/2sComp), and straight binary for a unipolar output. The asynchronous clear function clears all DAC registers to a user-selectable zero-scale or mid-scale output. The parts are available in a 24-lead TSSOP and offer guaranteed specifications over the −40°C to +85°C industrial temperature range.APPLICATIONS Industrial automation Closed-loop servo control, process control Automotive test and measurement Programmable logic controllers

Complete Quad, 16-Bit, High Accuracy, Serial Input, Bipolar Voltage Output DAC Features: Complete quad, 16-bit digital-to-analog converters (DAC) Programmable output range: ±10 V, ±10.2564 V, or ±10.5263 V ±1 LSB max INL error, ±1 LSB maximum DNL error Low noise: 60 nV/√Hz Settling time: 10 µs maximum Integrated reference buffers Internal reference: 10 ppm/°C maximum On-chip die temperature sensor Output control during power-up/brownout Programmable short-circuit protection Simultaneous updating via LDAC Asynchronous CLR to zero code Digital offset and gain adjust See Data Sheet for Additional Information

Dual 14-Bit, 20/40/65 MSPS, 3 V Analog-to-Digital Converter Features: Integrated Dual 14-Bit Analog-to-Digital Converters Single 3 V Supply Operation (2.7 V to 3.6 V) SNR = 71.6 dBc (to Nyquist, AD9248-65) SFDR = 80 dBc (to Nyquist, AD9248-65) Low Power: 300 mW at 65 MSPS Differential Input with 500 MHz 3 dB Bandwidth Exceptional Cross Talk Immunity > 85 dB On-Chip Reference and SHA Flexible Analog Input: 1 Vp-p to 2 Vp-p Range Offset Binary or Twos Complement Data Format Clock Duty Cycle Stabilizer Output datamux option

2.7 V to 5.5 V, Serial-Input, Voltage-Output, 16-Bit nanoDAC in 10-lead LFCSP, 16-lead 3 mm x 3 mm LFCSP, and 16-lead TSSOP Features: 12-/16-bit resolution 1 LSB INL 11.8 nV/√Hz noise spectral density 1 μs settling time 1.1 nV-sec glitch energy 0.05 ppm/°C temperature drift 5 kV HBM ESD classification See data sheet for additional features Also available in16-lead TSSOP