The LTC2356-12/LTC2356-14 are 12-bit/14-bit, 3.5Msps serial ADCs with differential inputs. The devices draw only 5.5mA from a single 3.3V supply and come in a tiny 10-lead MSOP package. A Sleep shutdown feature further reduces power consumption to 13?W. The combination of speed, low power and tiny package makes the LTC2356-12/LTC2356-14 suitable for high speed, portable applications.The 80dB common mode rejection allows users to eliminate ground loops and common mode noise by measuring signals differentially from the source.The devices convert ?1.25V to 1.25V bipolar inputs differentially. The absolute voltage swing for AIN+ and AIN? extends from ground to the supply voltage.The serial interface sends out the conversion results during the 16 clock cycles following a CONV rising edge for compatibility with standard serial interfaces. If two additional clock cycles for acquisition time are allowed after the data stream in between conversions, the full sampling rate of 3.5Msps can be achieved with a 63MHz clock. Bits LTC2356-12 12 LTC2356-14 14 Applications Communications Data Acquisition Systems Uninterrupted Power Supplies Multiphase Motor Control Multiplexed Data Acquisition RFID

16-Bit, Serial, 100 kSPS Sampling ADC. Features: Autocalibrating On-Chip Sample-Hold Function Serial Output 16 Bits No Missing Codes ±1 LSB INL –99 dB THD 92 dB S/(N+D) 1 MHz Full Power Bandwidth

Digital to Analogue Converter 12 bit Parallel 14.25V to 15.75V DIP 24 ;RoHS Compliant: Yes

The AD5308 / AD5318 / AD5328 are octal 8-, 10-, and 12-bit buffered voltage output DACs in a 16-lead TSSOP. They operate from a single 2.5 V to 5.5 V supply, consuming 0.7 mA typical at 3 V. Their on-chipoutput amplifiers allow the outputs to swing rail-to-rail with a slew rate of 0.7 V/μs. The AD5308 / AD5318 / AD5328 use a versatile 3-wire serial interface that operates at clock rates up to 30 MHz and is compatible with standard SPI, QSPI, MICROWIRE, and DSP interface standards.The references for the eight DACs are derived from two reference pins (one per DAC quad). These reference inputs can be configured as buffered, unbuffered, or VDD inputs. The parts incorporate a power-on reset circuit, which ensures that the DAC outputs power up to 0 V and remain there until a valid write to the device takes place. The outputs of all DACs may be updated simultaneously using the asynchronous LDAC input. The parts contain a power-down feature that reduces the current consumption of the devices to 400 nA at 5 V (120 nA at 3 V). The eight channels of the DAC may be powered down individually.All three parts are offered in the same pinout, which allows users to select the resolution appropriate for their application without redesigning their circuit board.APPLICATIONS Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Optical networking Automatic test equipment Mobile communications Programmable attenuators Industrial process control

DC to 9 GHz, Vector Signal Generator Features: DC-coupled, 50 matched output Up to 4.3 dBm output power, 9.5 dBm at 9 GHz DAC core update rate: 12.0 GSPS (guaranteed minimum) in 2 NRZ mode Wide analog bandwidth DC to 9.0 GHz in 2 NRZ mode (12.0 GSPS DAC update rate) 1.0 GHz to 8.0 GHz in mix mode (6.0 GSPS DAC update rate) DC to 4.5 GHz in NRZ mode (6.0 GSPS DAC update rate) Power dissipation of 4.88 W in 2 NRZ mode (10 GSPS DAC update rate) Bypassable datapath interpolation 2, 3, 4, 6, 8, 12, 16, 24 Instantaneous (complex) signal bandwidth 2.25 GHz with device clock at 5 GHz (2 interpolation) 1.8 GHz with device clock at 6 GHz (3 interpolation) Fast frequency hopping Integrated biCMOS buffer amplifier

The AD5544 / AD5554 quad, 16-/14-bit, current output, digital-to-analog converters (DACs) are designed to operate from 2.7 V to 5.5 V supply range.The applied external reference input voltage (VREFx) determines the full-scale output current. Integrated feedback resistors (RFB) provide temperature-tracking, full-scale voltage outputs when combined with an external I-to-V precision amplifier.A double-buffered serial data interface offers high speed, 3-wire, SPI- and microcontroller-compatible inputs using serial data in (SDI), a chip select (CS), and clock (CLK) signals. In addition, a serial data out pin (SDO) allows for daisy-chaining when multiple packages are used. A common, level-sensitive, load DAC strobe (LDAC) input allows the simultaneous update of all DAC outputs from previously loaded input registers. Additionally, an internal power-on reset forces the output voltage to 0 at system turn-on. An MSB pin allows system reset assertion (RS) to force all registers to zero code when MSB = 0, or to half-scale code when MSB = 1.The AD5544 is packaged in the compact 28-lead SSOP and 32-lead LFCSP. The AD5554 is packaged in the compact 28-lead SSOPAPPLICATIONS Automatic test equipment Instrumentation Digitally controlled calibration

The AD5570 is a single 16-bit serial input, voltage output DAC that operates from supply voltages of ±11.4 V up to ±16.5 V. Integral linearity (INL) and differential nonlinearity (DNL) are accurate to 1 LSB. During power-up, when the supply voltages are changing, VOUT is clamped to 0 V via a low impedance path.The AD5570 DAC comes complete with a set of reference buffers. The reference buffers allow a single, positive reference to be used. The voltage on REFIN is gained up and inverted internally to give the positive and negative reference for the DAC core. Having the reference buffers on-chip eliminates the need for external components such as inverters, precision amplifiers, and resistors, thereby reducing the overall solution size and cost.The AD5570 uses a versatile 3-wire interface that is compatible with SPI®, QSPI™, MICROWIRE™, and DSP® interface standards. Data is presented to the part as a 16-bit serial word. Serial data is available on the SDO pin for daisy-chaining purposes. Data readback allows the user to read the contents of the DACregister via the SDO pin.Features on the AD5570 include LDAC which is used to update the output of the DAC. The device also has a power-down pin (PD), allowing the DAC to be put into a low power state, and a CLR pin that allows the output to be cleared to 0 V.The AD5570 is available in a 16-lead SSOP.PRODUCT HIGHLIGHTS 1 LSB maximum INL and DNL. Buffered voltage output up to ±14 V. Output controlled during power-up. On-board reference buffers. Wide temperature range of −40°C to +125°C.APPLICATIONS Industrial automation Automatic test equipment Process control Data acquisition systems General-purpose instrumentation

The AD7302 is a dual, 8-bit voltage out DAC that operates from a single +2.7 V to +5.5 V supply. Its on-chip precision output buffers allow the DAC outputs to swing rail to rail. The AD7302 has a parallel microprocessor and DSP-compatible interface with high speed registers and double buffered interface logic. Data is loaded to the registers on the rising edge of CS or WR and the A/B pin selects either DAC A or DAC B.Reference selection for AD7302 can be either an internal reference derived from the VDD or an external reference applied at the REFIN pin. Both DACs can be simultaneously updated using the asynchronous LDAC input and can be cleared by using the asynchronous CLR input.The low power consumption of this part makes it ideally suited to portable battery operated equipment. The power consumption is less than 10 mW at 3.3 V, reducing to 3 µW in powerdown mode.The AD7302 is available in a 20-pin plastic dual-in-line package, 20-lead SOIC and a 20-lead TSSOP package.APPLICATIONS Portable Battery Powered Instruments Digital Gain and Offset Adjustment Programmable Voltage and Current Sources Programmable AttenuatorsPRODUCT HIGHLIGHTS Low Power, Single Supply Operation. This part operates from a single +2.7 V to +5.5 V supply and typically consumes 15 mW at 5 V, making it ideal for battery powered applications. The on-chip output buffer amplifiers allow the outputs of the DACs to swing rail to rail with a settling time of typically 1.2 µs. Internal or external reference capability. High speed parallel interface. Power-Down Capability. When powered down the DAC consumes less than 1 µA at 25°C. Packaged in 20-lead DIP, SOIC and TSSOP packages.

The AD7986 is an 18-bit, 2 MSPS successive approximation, analog-to-digital converter (ADC). It contains a low power,high speed, 18-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, anda versatile serial interface port. On the rising edge of CNV, the AD7986 samples the voltage difference between the IN+ andIN− pins. The voltages on these pins usually swing in opposite phases between 0 V and VREF. It features a very high samplingrate turbo mode (TURBO = high) and a reduced power normal mode (TURBO = low) for low power applications where thepower is scaled with the throughput.In normal mode (TURBO = low), the SPI-compatible serial interface also features the ability, using the SDI input, to daisychainseveral ADCs on a single 3-wire bus and provide an optional busy indicator. It is compatible with 1.8 V, 2.5 V, and 2.7 V using theseparate VIO supply.The AD7986 is available in a 20-lead LFCSP with operationspecified from −40°C to +85°C. Applications Battery-powered equipment Data acquisition systems Medical instruments Seismic data acquisition systems

The AD9162 is a high performance, 16-bit digital-to-analog converter (DAC) that supports data rates to 6 GSPS. The DAC core is based on a quad-switch architecture coupled with a 2× interpolator filter that enables an effective DAC update rate of up to 12 GSPS in some modes. The high dynamic range and bandwidth makes these DACs ideally suited for the most demanding high speed radio frequency (RF) DAC applications.In baseband mode, wide bandwidth capability combines with high dynamic range to support DOCSIS 3.1 cable infrastructure compliance from the minimum of two carriers to full maximum spectrum of 1.794 GHz. A 2× interpolator filter (FIR85) enables the AD9161/AD9162 to be configured for lower data rates and converter clocking to reduce the overall system power and ease the filtering requirements. In Mix-Mode™ operation, the AD9161/AD9162 can reconstruct RF carriers in the second and third Nyquist zones up to 7.5 GHz while still maintaining exceptional dynamic range. The output current can be programmed from 8 mA to 38.76 mA. The AD9161/AD9162 data interface consists of up to eight JESD204B serializer/deserializer (SERDES) lanes that are programmable in terms of lane speed and number of lanes to enable application flexibility.A serial peripheral interface (SPI) can configure the AD9161/AD9162 and monitor the status of all registers. The AD9161/AD9162 are offered in an 165-ball, 8.0 mm × 8.0 mm, 0.5 mm pitch, CSP_BGA package and in an 169-ball, 11 mm × 11 mm, 0.8 mm pitch, CSP_BGA package, including a leaded ball option for the AD9162.Product Highlights High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 7.5 GHz. Up to eight lanes JESD204B SERDES interface flexible in terms of number of lanes and lane speed. Bandwidth and dynamic range to meet DOCSIS 3.1 compliance with margin.Applications Broadband communications systems DOCSIS 3.1 cable modem termination system (CMTS)/video on demand (VOD)/edge quadrature amplitude modulation (EQAM) Wireless communications infrastructure W-CDMA, LTE, LTE-A, point to point Instrumentation, automatic test equipment (ATE) Radars and jammers