The ADP2503?/ ADP2504 are high efficiency, low quiescent current step-up/step-down dc-to-dc converters that can operate at input voltages greater than, less than, or equal to the regulated output voltage. The power switches and synchronous rectifiers are internal to minimize external device count. At high load currents, the ADP2503 / ADP2504 use a current-mode, fixed frequency pulse-width modulation (PWM) control scheme for optimal stability and transient response. To ensure the longest battery life in portable applications, the ADP2503 / ADP2504 have an optional power save mode that reduces the switching frequency under light load conditions. For wireless and other low noise applications where variable frequency power save mode may cause interference, the logic control input sync forces fixed frequency PWM operation under all load conditions.?The ADP2503 / ADP2504 can run from input voltages between 2.3 V and 5.5 V, allowing single lithium or lithium polymer cell, multiple alkaline or NiMH cells, PCMCIA, USB, and other standard power sources. The ADP2503 / ADP2504 have fixed output options, or using the adjustable model, the output voltage can be programmed through an external resistor divider. Compensation is internal to minimize the number of external components.During logic-controlled shutdown, the input is disconnected from the output and draws less than 1 ?A from the input source. Operating as boost converters, the ADP2503 / ADP2504 feature a true load disconnect function that isolates the load from the power source. Other key features include undervoltage lockout to prevent deep battery discharge, and soft start to prevent input current overshoot at startup.APPLICATIONSWireless handsetsDigital cameras/portable audio playersMiniature hard disk power suppliesUSB powered devices?

The ADP5003 integrates a high voltage buck regulator and an ultralow noise low dropout (LDO) regulator in a small, 5 mm ? 5 mm, 32-lead LFCSP package to provide highly efficient and quiet regulated suppliesThe buck regulator is optimized to operate at high output currents up to 3 A. The LDO is capable of a maximum output current of 3 A and operates efficiently with low headroom voltage while maintaining high power supply rejection.The ADP5003 can operate in one of two modes. Adaptive mode allows the LDO to operate with an optimized headroom by adjusting the buck output voltage internally in response to the LDO load current. Alternatively, the ADP5003 can operate in independent mode, where both regulators operate separately from each other, and where the output voltages are programmed using resistor dividers.The LDO regulator output can be accurately controlled at the point of load (POL) using remote sensing that compensates for the printed circuit board (PCB) trace impedance while delivering high output currents.Each regulator is activated via a dedicated precision enable input. The buck switching frequency can be synchronized to an external signal, or programmed with an external resistor.Safety features in the ADP5003 include thermal shutdown (TSD), input undervoltage lockout (UVLO) and independent current limits for each regulator. The ADP5003 is rated for a ?40?C to +125?C operating junction temperature range.APPLICATIONS Low noise power for high speed analog-to-digital converter (ADC) and digital-to-analog converter (DAC) designs Powering RF transceivers and clocking ICs

The ADP5014 combines four high performance, low noise buck regulators in a 40-lead LFCSP package. Relying on its low output noise (~25 ?V rms when VOUT ? VREF), the low noise buck regulator enables the powering up of the noise sensitive signal chain products.All channels in the ADP5014 integrate high-side and low-side power metal-oxide semiconductor field effect transistors (MOSFET). Channel 1 and Channel 2 deliver a programmable output current of 2 A or 4 A. Combining Channel 1 and Channel 2 in a parallel configuration provides a single output with up to 8 A of current.Channel 3 and Channel 4 deliver a programmable output current of 1 A or 2 A. Combining Channel 3 and Channel 4 in a parallel configuration can provide a single output with up to 4 A of current.The ADP5014 features two enable modes. The manual mode has four individual precision enable pins to enable each regulator manually. Alternatively, the sequence mode has one grouped precision enable signal with programmable power-up and power-down delay timers on each rail for specific rail sequence requirements.The switching frequency of the ADP5014 can be programmed or synchronized to an external clock from 500 kHz to 2.5 MHz.The ADP5014 offers other key features like selective forced pulse width modulation (FPWM)/power saving mode (PSM), an undervoltage output (UVO), active output discharge, and a power-good flag. Other safety features include input undervoltage lockout (UVLO), overvoltage protection (OVP), overcurrent protection (OCP) and thermal shutdown (TSD).Applications RF transceiver, high speed analog-to-digital converter (ADC)/digital-to-analog converter (DAC), mixed signal ASIC FPGA and processor applications Security and surveillance Medical applications

The ADP5024 combines two high performance buck regulators and one low dropout (LDO) regulators in a small, 24-lead 4 mm ? 4 mm LFCSP to meet demanding performance and board space requirements. The high switching frequency of the buck regulators enables tiny multilayer external components and minimizes the board space. When the MODE pin is set high, the buck regulators operate in forced PWM mode. When the MODE pin is set low, the buck regulators operate in PWM mode when the load current is above a predefined threshold. When the load current falls below a pre-defined threshold, the regulator operates in power save mode (PSM), improving the light load efficiency. The two bucks operate out of phase to reduce the input capacitor requirement. The low quiescent current, low dropout voltage, and wide input voltage range of the LDO extends the battery life of portable devices. The ADP5024 LDO maintains power supply rejection greater than 60 dB for frequencies as high as 10 kHz while operating with a low headroom voltage.Regulators in the ADP5024 are activated though dedicated enable pins. The default output voltages can be either externally set in the adjustable version or factory programmable to a wide range of preset values in the fixed voltage version.APPLICATIONS Power for processors, ASICS, FPGAs, and RF chipsets Portable instrumentation and medical devices Space constrained devices

The ADP5037 combines two high performance buck regulators and two low dropout (LDO) regulators in a small, 24-lead 4 mm ? 4 mm LFCSP to meet demanding performance and board spacerequirements.The high switching frequency of the buck regulators enables tiny multilayer external components and minimizes the board space. When the MODE pin is set high, the buck regulators operate in forced PWM mode. When the MODE pin is set low and the load is above a predefined threshold, the buck regulators operate in PWM mode. When the load current falls below apredefined threshold, the regulator operates in power savemode (PSM), improving the light-load efficiency.The two bucks operate out of phase to reduce the input capacitor requirement. The low quiescent current, low dropout voltage, and wide input voltage range of the ADP5037 LDOs extend the battery life of portable devices. The ADP5037 LDOs maintain power supply rejection greater than 60 dB for frequencies as high as 10 kHz while operating with a low headroom voltage.Regulators in the ADP5037 are activated though dedicated enable pins. The default output voltages can be externally set in the adjustable version or factory programmable to a wide range of preset values in the fixed voltage version.APPLICATIONS Power for processors, ASICS, FPGAs, and RF chipsets Portable instrumentation and medical devices Space constrained devices?

The ADP5041 combines one high performance buck regulator and two low dropout (LDO) regulators in a small 20-lead LFCSP to meet demanding performance and board space requirements.The high switching frequency of the buck regulator enables use of tiny multilayer external components and minimizes board space.When the MODE pin is set to logic high, the buck regulator operates in forced PWM mode. When the MODE pin is set to logic low, the buck regulator operates in PWM mode when the load is around the nominal value. When the load current falls below a predefined threshold, the regulator operates in power save mode (PSM), improving the light load efficiency. The low quiescent current, low dropout voltage, and wide input voltage range of the ADP5041 LDOs extend the battery life of portable devices. The ADP5041 LDOs maintain a power supply rejection greater than 60 dB for frequencies as high as 10 kHz while operating with a low headroom voltage.Each regulator in the ADP5041 is activated by a high level on the respective enable pin. The output voltages of the regulators and the reset threshold are programmed through external resistor dividers to address a variety of applications. The ADP5041 contains supervisory circuits that monitor power supply voltage levels and code execution integrity in microprocessor-based systems. They also provide power-on reset signals. An on-chip watchdog timer can reset the microprocessor if it fails to strobe within a preset timeout period.

The ADP5050 combines four high performance buck regulators and one 200 mA low dropout (LDO) regulator in a 48-lead LFCSP package that meets demanding performance and board space requirements. The device enables direct connection to high input voltages up to 15 V with no preregulators.Channel 1 and Channel 2 integrate high-side power MOSFETs and low-side MOSFET drivers. External NFETs can be used in low-side power devices to achieve an efficiency optimized solution and deliver a programmable output current of 1.2 A, 2.5 A, or 4 A. Combining Channel 1 and Channel 2 in a parallel configuration can provide a single output with up to 8 A of current.Channel 3 and Channel 4 integrate both high-side and low-side MOSFETs to deliver output current of 1.2 A.The switching frequency of the ADP5050 can be programmed or synchronized to an external clock. The ADP5050 contains a precision enable pin on each channel for easy power-up sequencing or adjustable UVLO threshold.The ADP5050 integrates a general-purpose LDO regulator with low quiescent current and low dropout voltage that provides up to 200 mA of output current.The optional I2C interface provides the user with flexible configuration options, including adjustable and fixed output voltage options, junction temperature overheat warning, low input voltage detection, and dynamic voltage scaling (DVS).APPLICATIONS Small cell base stations FPGA and processor applications Security and surveillance Medical applications

The ADP5051 combines four high performance buck regulators,and a supervisory circuit with a voltage monitor, watchdog, andmanual reset in a 48-lead LFCSP package that meets demandingperformance and board space requirements. The device enablesdirect connection to high input voltages up to 15.0 V with nopreregulators.Channel 1 and Channel 2 integrate high-side power MOSFET andlow-side MOSFET drivers. In low-side power devices, use externalNFETs to achieve an efficiency optimized solution and deliver aprogrammable output current of 1.2 A, 2.5 A, or 4 A.Combining Channel 1 and Channel 2 in a parallel configurationprovides a single output with up to 8 A of current. Channel 3 andChannel 4 integrate both high-side and low-side MOSFETs todeliver an output current of 1.2 A.The ADP5051 supervisory circuits monitor voltage level. Thewatchdog timer generates a reset when the WDI does not togglewithin a preset timeout period. Select manual reset functionalityvia the processor reset mode or system power on/off switch mode.The optional I2C interface offers flexible configurations, including adjustable and fixed output voltage, junction temperature overheat warning, low input voltage detection, and dynamic voltage scaling.APPLICATIONS Small cell base stations FPGA and processor applications Security and surveillance Medical applications

The ADP5052 combines four high performance buck regulators and one 200 mA low dropout (LDO) regulator in a 48-lead LFCSP package that meets demanding performance and board space requirements. The device enables direct connection to high input voltages up to 15 V with no preregulators.Channel 1 and Channel 2 integrate high-side power MOSFETs and low-side MOSFET drivers. External NFETs can be used in low-side power devices to achieve an efficiency optimized solution and deliver a programmable output current of 1.2 A, 2.5 A, or 4 A. Combining Channel 1 and Channel 2 in a parallel configuration can provide a single output with up to 8 A of current.Channel 3 and Channel 4 integrate both high-side and low-side MOSFETs to deliver output current of 1.2 A.The switching frequency of the ADP5052 can be programmed or synchronized to an external clock. The ADP5052 contains a precision enable pin on each channel for easy power-up sequencing or adjustable UVLO threshold.The ADP5052 integrates a general-purpose LDO regulator with low quiescent current and low dropout voltage that provides up to 200 mA of output current.Applications Small cell base stations FPGA and processor applications Security and surveillance Medical applications

The ADP5302 is a high efficiency, ultralow quiescent current step-down regulator that draws only 240 nA quiescent current to regulate the output at no load.The ADP5302 runs from an input voltage of 2.15 V to 6.50 V, allowing the use of multiple alkaline or NiMH cells, Li-Ion cells, or other power sources. The output voltage is selectable from 0.8 V to 5.0 V by an external, dynamic voltage identification (VID) resistor and a factory fuse. The total solution requires only four tiny external components.The ADP5302 can operate between hysteresis mode and PWM mode via the SYNC/MODE pin. In hysteresis mode, the regulator achieves excellent efficiency at less than 1 mW and provides up to 50 mA of output current. In PWM mode, the regulator produces a lower output ripple and supplies up to 500 mA of output current. The flexible configuration capability during operation of the device enables very efficient power management to meet both long battery life and low system noise requirements.The ADP5302 integrates an ultralow power comparator with a factory programmable voltage reference to monitor the input battery voltage. The regulator runs at a 2 MHz switching frequency in PWM mode, and the SYNC/MODE pin can be synchronized to an external clock from 1.5 MHz to 2.5 MHz.The ADP5302 includes an extra STOP pin that can temporarily disable the regulator switching; in this way, a quiet system environment can be achieved to benefit the noise sensitive circuitry, which includes data conversion, RF data transmission, and analog sensors.Other key features in the ADP5302 include separate enabling, QOD, and safety features, such as overcurrent protection (OCP), thermal shutdown (TSD), and input undervoltage lockout (UVLO).The ADP5302 is available in a 10-lead, 3 mm ? 3 mm LFCSP package rated for the ?40?C to +125?C junction temperature range.Applications Energy (gas, water) metering Portable and battery-powered equipment Medical applications Keep-alive power supplies