The ADM3061E/ADM3062E/ADM3063E/ADM3064E/ADM3065E/ADM3066E/ADM3067E/ADM3068E are 3.0 V to5.5 V, IEC electrostatic discharge (ESD) protected RS-485transceivers, allowing the devices to withstand ?12 kV contactdischarges on the transceiver bus pins without latch-up ordamage. The ADM3062E/ADM3064E/ADM3066E/ADM3068Efeature a VIO logic supply pin that allows a flexible digital interfacecapable of operating as low as 1.62 V. The ADM3065E/ADM3066E/ADM3067E/ADM3068E aresuitable for high speed, 50 Mbps, bidirectional data communication on multipoint bus transmission lines. The ADM3061E/ADM3062E/ADM3063E/ADM3064E/ADM3065E/ADM3066E/ADM3067E/ADM3068E feature a 1/4 unit load inputimpedance that allows up to 128 transceivers on a bus. TheADM3061E/ADM3062E/ADM3063E/ADM3064E models offerall of the same features as the ADM3065E/ADM3066E/ADM3067E/ADM3068E models at a low 500 kbps data rate thatis suitable for operation over long cable runs. The ADM3061E/ADM3062E/ADM3065E/ADM3066E are halfduplex RS-485 transceivers, fully compliant to the PROFIBUS?standard with increased 2.1 V bus differential voltage at VCC ?4.5 V. The ADM3063E/ADM3064E/ADM3067E/ADM3068Eare full duplex RS-485 transceiver options. The RS-485 transceivers are available in a number of spacesaving packages, including the 10-lead, 3 mm ? 3 mm lead framechip-scale package (LFCSP), the 8-lead or 10-lead, 3 mm ? 3 mmmini small outline package (MSOP), and the 8-lead or 14-lead,narrow body standard small outline packages (SOIC_N).Models with operating temperature ranges of ?40?C to +125?Cand ?40?C to +85?C are available. Excessive power dissipation caused by bus contention or byoutput shorting is prevented by a thermal shutdown circuit. If asignificant temperature increase is detected in the internal drivercircuitry during fault conditions, this feature forces the driveroutput into a high impedance state. The ADM3061E/ADM3062E/ADM3063E/ADM3064E/ADM3065E/ADM3066E/ADM3067E/ADM3068E guarantee alogic high receiver output when the receiver inputs are shorted,open, or connected to a terminated transmission line with alldrivers disabled. Table 2 in the data sheet presents an overview of the ADM3061E/ADM3062E/ADM3063E/ADM3064E/ADM3065E/ADM3066E/ADM3067E/ADM3068E data rate capability across temperature, power supply,and package options. Refer to the Ordering Guide section formodel numbering.APPLICATIONS Industrial fieldbuses Process control Building automation PROFIBUS networks Motor control servo drives and encoders?

Based on the iCoupler? and isoPower? chip scale transformertechnology, the ADM3260 is a hot swappable digital and powerisolator with two nonlatching, bidirectional communicationchannels, supporting a complete isolated I2C interface, and anintegrated isolated dc-to-dc converter, supporting up to150 mW of isolated power conversion.iCoupler is a chip scale transformer technology with functional,performance, size, and power consumption advantages ascompared to optocouplers. The bidirectional I2C channels eliminate the need for splitting I2C signals into separate transmitand receive signals for use with standalone optocouplers.Based on the Analog Devices, Inc., isoPower technology, theon-chip isolated dc-to-dc converter provides a regulated, isolatedvoltage of 3.15 V to 5.25 V with up to 150 mW of output power.With the ADM3260, the iCoupler and isoPower channels, alongwith the I2C transceivers, can be integrated with semiconductorcircuitry, which enables a complete isolated I2C interface andallows the power converter to be implemented in a small formfactor. The ADM3260 is available in 20-lead SSOP package andhas an operating temperature range of ?40?C to+105?C.isoPower uses high frequency switching elements to transfer powerthrough its transformer. Special care must be taken during printedcircuit board (PCB) layout to meet emissions standards. See theAN-0971 Application Note for board layout recommendationsApplications Isolated I2C, SMBus, and PMBus interfaces Multilevel I2C interfaces Central office switching Telecommunication and data communication equipment ?48 V distributed power systems ?48 V power supply modules Networking

The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for ?40?C to +85?C ambient temperature, unless otherwise noted. This device, together with a PIN diode and a TIA preamplifier, can implement a highly integrated, low cost, low power fiber optic receiver. The receiver front end, loss of signal (LOS) detector circuit indicates when the input signal level has fallen below a user-adjustable threshold. The LOS detect circuit has hysteresis to prevent chatter at the output. The ADN2812 is available in a compact 5 mm ? 5 mm 32-lead lead frame chip scale package (LFCSP).ApplicationsSONET OC-1/OC-3/OC-12/OC-48 and all associated FEC rates Fibre Channel, 2? Fibre Channel, GbE, HDTV WDM transponders Regenerators/repeaters Test equipment Broadband cross-connects and routers

The ADN2816 provides the receiver functions of quantization and clock and data recovery for continuous data rates from 10 Mb/s to 675 Mb/s. The ADN2816 automatically locks to all data rates without the need for an external reference clock or programming. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for ?40?C to +85?C ambient temperature, unless otherwise noted.The ADN2816 is available in a compact 5 mm ? 5 mm 32-lead chip scale package.ApplicationsSONET OC-1/3/12 and all associated FEC rates Fibre Channel, ESCON, Fast Ethernet, SDI, etc. WDM transpondersRegenerators/repeatersTest equipmentBroadband cross-connects and routers

The ADN4620/ADN4621 are dual-channel, signal isolated, low voltage differential signaling (LVDS) buffers that operate at up to 2.5 Gbps with very low jitter. The devices integrate Analog Devices, Inc., iCoupler? technology, enhanced for high speed operation to provide drop-in galvanic isolation of LVDS signal chains. AC coupling and/or level shifting to the LVDS receivers and from the LVDS drivers allows isolation of other high speed signals, such as current mode logic (CML).The ADN4620/ADN4621 include a refresh mechanism to monitor the input and output states and ensure that they remain the same in the absence of data transitions (for example, at power-on). For lower power consumption and high speed operation with low jitter, the isolator circuits rely on 1.8 V supplies, while 3.3 V supplies are used for LVDS receivers to support the full common-mode range with an input voltage range (input common mode plus differential input voltage) of 0 V to 2.4 V per Table 2 in the data sheet.The devices are fully specified over a wide industrial temperature range and are available in a compact SSOP package with 5.3 mm creepage (for reinforced insulation at ac mains voltages).APPLICATIONS Analog front-end isolation Data plane isolation Isolated high speed clock and data links Multigigabit serialization/deserialization (SERDES) PCB-to-PCB optical replacement (for example, short reach fiber)Protected by U.S. Patents 7,075,329; 9,941,565; and 10,205,442. Other patents are pending.

The ADN4624 is a quad-channel, signal isolated, low voltage differential signaling (LVDS) buffer that operates at up to 2.5 Gbps with very low jitter. The device integrates Analog Devices, Inc., iCoupler? technology, enhanced for high speed operation to provide drop-in galvanic isolation of LVDS signal chains. AC coupling and/or level shifting to the LVDS receivers and from the LVDS drivers allows isolation of other high speed signals such as current mode logic (CML).The ADN4624 includes a refresh mechanism to monitor the input and output states and ensure they remain the same in the absence of data transitions (for example, at power-on).For lower power consumption and high speed operation with low jitter, the LVDS and isolator circuits rely on 1.8 V supplies. The ADN4624 is fully specified over a wide industrial temperature range and is available in a 28-lead, wide-body, finer pitch SOIC_W_FP package with 8.3 mm creepage and clearance (for 5.7 kV rms or 8 kVPEAK surge and impulse voltages and reinforced insulation at ac mains voltages) or 6 mm ? 6 mm LFCSP package with 1.27 mm creepage and clearance (for basic/functional isolation).APPLICATIONS Isolated video and imaging data Analog front-end isolation Data plane isolation Isolated high speed clock and data links Multi-gigabit serialization/deserialization (SERDES) Board-to-board optical replacement (for example, short reach fiber)

The ADN4654/ADN4655/ADN46561? are signal isolated, low voltage differential signaling (LVDS) buffers that operate at up to 1.1 Gbps with low jitter. The devices integrate Analog Devices, Inc., iCoupler? technology, enhanced for high speed operation to provide galvanic isolation of the TIA/EIA-644-A compliant LVDS drivers and receivers. This integration allows drop-in isolation of an LVDS signal chain.The ADN4654/ADN4655/ADN4656 comprise multiple channel configurations, and the LVDS receivers on the ADN4655 and ADN4656 include a fail-safe mechanism to ensure a Logic 1 on the corresponding LVDS driver output when the inputs are floating, shorted, or terminated but not driven.For high speed operation with low jitter, the LVDS and isolator circuits rely on a 2.5 V supply. An integrated on-chip low dropout (LDO) regulator can provide the required 2.5 V from an external 3.3 V power supply. The devices are fully specified over a wide industrial temperature range and come in a 20-lead, wide body SOIC_W package with 5 kV rms isolation or in a 20-lead SSOP package with 3.75 kV rms isolation.Applications Isolated video and imaging data Analog front-end isolation Data plane isolation Isolated high speed clock and data links1 Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending.

The ADN4654/ADN4655/ADN46561? are signal isolated, low voltage differential signaling (LVDS) buffers that operate at up to 1.1 Gbps with low jitter. The devices integrate Analog Devices, Inc., iCoupler? technology, enhanced for high speed operation to provide galvanic isolation of the TIA/EIA-644-A compliant LVDS drivers and receivers. This integration allows drop-in isolation of an LVDS signal chain.The ADN4654/ADN4655/ADN4656 comprise multiple channel configurations, and the LVDS receivers on the ADN4655 and ADN4656 include a fail-safe mechanism to ensure a Logic 1 on the corresponding LVDS driver output when the inputs are floating, shorted, or terminated but not driven.For high speed operation with low jitter, the LVDS and isolator circuits rely on a 2.5 V supply. An integrated on-chip low dropout (LDO) regulator can provide the required 2.5 V from an external 3.3 V power supply. The devices are fully specified over a wide industrial temperature range and come in a 20-lead, wide body SOIC_W package with 5 kV rms isolation or in a 20-lead SSOP package with 3.75 kV rms isolation.Applications Isolated video and imaging data Analog front-end isolation Data plane isolation Isolated high speed clock and data links1 Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending.

The ADPD105/ADPD106/ADPD107 are highly efficient,photometric front ends, each with an integrated 14-bit analog-to-digitalconverter (ADC) and a 20-bit burst accumulator thatworks with flexible light emitting diode (LED) drivers. Theaccumulator is designed to stimulate an LED and measurethe corresponding optical return signal. The data output andfunctional configuration occur over a 1.8 V I2C interface on theADPD105 or SPI on the ADPD106 and ADPD107. The controlcircuitry includes flexible LED signaling and synchronousdetection.The analog front end (AFE) features best-in-class rejection of signaloffset and corruption due to modulated interference commonlycaused by ambient light.Couple the ADPD105/ADPD106/ADPD107 with a lowcapacitance photodiode of <100 pF for optimal performance.The ADPD105/ADPD106/ADPD107 can be used with any LED.The ADPD105 is available in a 2.46 mm ? 1.4 mm WLCSP and a4 mm ? 4 mm LFCSP. The SPI only versions, ADPD106 andADPD107, are available in a 2.46 mm ? 1.4 mm WLCSP.Applications Wearable health and fitness monitors Clinical measurements, for example, SpO2 Industrial monitoring Background light measurements

The ADPD4200 operates as a complete multimodal sensor front end, stimulating up to four light emitting diodes (LEDs) and measuring the return signal on up to four separate current inputs. Twelve time slots are available, enabling 12 separate measurements per sampling period.The data output and functional configuration utilize a serial port interface (SPI) on the ADPD4200. The control circuitry includes flexible LED signaling and synchronous detection. The device uses a 1.8 V analog core and 1.8 V or 3.3 V compatible digital input/output (I/O).The analog front end (AFE) rejects signal offsets and corruption from asynchronous modulated interference, typically from ambient light, eliminating the need for optical filters or externally controlled dc cancellation circuitry. Multiple operating modes are provided, enabling the ADPD4200 to be a sensor hub for synchronous measurements of photodiodes, biopotential electrodes, resistance, capacitance, and temperature sensors.The ADPD4200 is available in a 2.619 mm ? 1.804 mm, 0.40 mm pitch, 24-ball WLCSP.Analog Devices is in the process of updating documentation to provide terminology and language that is culturally appropriate. This is a process with a wide scope and will be phased in as quickly as possible. Thank you for your patience.APPLICATIONS Wearable health and fitness monitors: heart rate monitors (HRMs), heart rate variability (HRV), stress, blood pressure estimation, SpO2, hydration, and body composition Industrial monitoring: CO, CO2, smoke, and aerosol detection Home patient monitoring