IC IF DIGITIZING SUBSYSTEM 48LQFP; IC Function:IF Digitizing Subsystem; Supply Voltage Min:2.7V; Supply Voltage Max:3.6V; IC Package Type:LQFP; No. of Pins:48Pins; Operating Temperature Min:-40°C; Operating Temperature Max:85°C; Packaging:Each; Product Range:-; Automotive Qualification Standard:-; MSL:MSL 3 - 168 hours; SVHC:No SVHC (20-Jun-2016)

0.5 Ω CMOS 1.65 V TO 3.6 V Dual SPDT/2:1 MUX Data Sheet  

16-Channel, 12-Bit Voltage-Output DAC with 14-Bit Increment Mode Data Sheet 

+3.3 V to +5 V Quad/Octal 10-Bit DACs Data Sheet  

Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS Serial LVDS 1.8 V Analog-to-Digital Converter Features: 1.8 V supply operation Low power: 110 mW per channel at 125 MSPS with scalable power options SNR = 74 dB (to Nyquist) SFDR = 90 dBc (to Nyquist) DNL = ±0.75 LSB (typical); INL = ±2.0 LSB (typical) See datasheet for additional features

Low Power, Unity Gain Fully Differential Amplifier & ADC Driver Features: Very low power - 330 μA supply current Fully differential or single-ended inputs/outputs Differential output designed to drive precision ADCs - Drives switched capacitor and Σ-Δ ADCs - Rail-to-rail output VOCM pin adjusts output common mode Robust overvoltage up to 18 V beyond supplies High performance - Suitable for driving 16-bit converter up to 250 kSPS - 39 nV/√Hz output noise - 1 ppm/°C gain drift - 200 μV maximum output offset - 10 V/μs slew rate - 5 MHz bandwidth Single supply: 3 V to 18 V Dual supplies: ±1.5 V to ±9 V

Octal, 14-Bit, SPI Voltage Output denseDAC With 5 ppm/C On-Chip Reference Features: Low power, small footprint, pin-compatible octal DACs: 14 bits 14-lead/16-lead TSSOP, 16-lead LFCSP, and 16-ball WLCSP On-chip 1.25 V/2.5 V, 5 ppm/°C reference Power down to 400 nA at 5 V, 200 nA at 3 V 2.7 V to 5.5 V power supply Guaranteed monotonic by design Power-on reset to zero scale or midscale 3 power-down functions Hardware LDAC and LDAC override function CLR function to programmable code Rail-to-rail operation

Octal 5V 16bit SPI DAC with reference

10-Bit, 125/105 MSPS, 1.8 V Dual Analog-to-Digital Converter Features: 1.8 V analog supply operation 1.8 V CMOS or 1.8 V LVDS output SNR = 61.7 dBFS at 70 MHz SFDR = 85 dBc at 70 MHz Low power: 95 mW/channel at 125 MSPS Differential analog input with 650 MHz bandwidth IF sampling frequencies to 200 MHz On-chip voltage reference and sample-and-hold circuit 2 Vp-p differential analog input DNL = ±0.13 LSB See data sheet for additional features

14-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter (ADC) Features: SNR = 71.0 dBFS at 185 MHz AIN and 250 MSPS SFDR = 83 dBc at 185 MHz AIN and 250 MSPS −152.0 dBFS/Hz input noise at 200 MHz, −1 dBFS AIN, 250 MSPS Total power consumption: 390 mW at 250 MSPS 1.8 V supply voltages LVDS (ANSI-644 levels) outputs Integer 1-to-8 input clock divider (625 MHz maximum input) Sample rates of up to 250 MSPS IF sampling frequencies of up to 350 MHz Internal ADC voltage reference Flexible analog input range 1.4 Vp-p to 2.0 V p-p (1.75 Vp-p nominal) See data sheet for additional features