The ADP362x / ADP363x is a family of high current and dual high speed drivers, capable of driving two independent N-channel power MOSFETs. The family uses the industry-standard foot-print but adds high speed switching performance and improved system reliability. The family has an internal temperature sensor and provides two levels of overtemperature protection, an overtemperature warning, and an overtemperature shutdown at extreme junction temperatures. The SD function, generated from a precise internal comparator, provides fast system enable or shutdown.This feature allows redundant overvoltage protection, complementing the protection inside the main controller device, or provides safe system shutdown in the event of an overtemperature warning. The wide input voltage range allows the driver to be compatible with both analog and digital PWM controllers.Digital power controllers are supplied from a low voltage supply, and the driver is supplied from a higher voltage supply. The ADP362x / ADP363x family adds UVLO and hysteresis functions, allowing safe startup and shutdown of the higher voltage supply when used with low voltage digital controllers.The device family is available in thermally enhanced SOIC_N_EP and MINI_SO_EP packaging to maximize high frequency and current switching in a small printed circuit board (PCB) area.APPLICATIONS AC-to-DC switch mode power supplies DC-to-DC power supplies Synchronous rectification Motor drives

The ADR3412 / ADR3420 / ADR3425 / ADR3430 / ADR3433 / ADR3440 / ADR3450 are low-cost, low-power, high precision voltage references, featuring ± 0.1% initial accuracy, low operating current and low output noise in a small SOT23 package. For high accuracy, output voltage and temperature coefficient are trimmed digitally during final assembly using Analog Devices’ proprietary DigiTrim® technology. Stability and reliability are further improved by the devices’ low output voltage hysteresis and low long-term output voltage drift. Furthermore, the low operating current of the device (100 μA max) facilitates usage in low-power devices, while its low output noise helps maintain signal integrity in critical signal processing systems.These CMOS are available in a wide range of output voltages, all of which are specified over the industrial temperature range of −40°C to +125 °C.APPLICATIONS Precision data acquisition systems Industrial instrumentation Medical devices Battery-powered devices

The ADRF6702 provides a quadrature modulator and synthesizer solution within a small 6 mm × 6 mm footprint while requiring minimal external components.The ADRF6702 is designed for RF outputs from 1200 MHz to 2400 MHz. The low phase noise VCO and high performance quadrature modulator make the ADRF6702 suitable for next generation communication systems requiring high signal dynamic range and linearity. The integration of the IQ modulator, PLL, and VCO provides for significant board savings and reduces the BOM and design complexity.The integrated fractional-N PLL/synthesizer generates a 2× fLO input to the IQ modulator. The phase detector together with an external loop filter is used to control the VCO output. The VCO output is applied to a quadrature divider. To reduce spurious components, a sigma-delta (Σ-Δ) modulator controls the programmable PLL divider.The IQ modulator has wideband differential I and Q inputs, which support baseband as well as complex IF architectures. The single-ended modulator output is designed to drive a 50 Ω load impedance and can be disabled.The ADRF6702 is fabricated using an advanced silicon-germanium BiCMOS process. It is available in a 40-lead, exposed-paddle, Pb-free, 6 mm × 6 mm LFCSP package. Performance is specified from −40°C to +85°C. A lead-free evaluation board is available.APPLICATIONS Cellular communications systems        GSM/EDGE, CDMA2000, W-CDMA, TD-SCDMA, LTE Broadband wireless access systems Satellite modems

The fourth generation of SHARC® Processors now includes the low power floating point DSP products – the ADSP-21478 and ADSP-21479 and offers increased performance, hardware-based filter accelerators, audio and application-focused peripherals, and new memory configurations capable of supporting a single chip solution. All devices are pin-compatible with each other and completely code-compatible with all prior SHARC Processors. These newest members of the fourth generation SHARC Processor family are based on a single-instruction, multiple-data (SIMD) core, which supports both 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats and their low power make them particularly suitable for battery powered applications or where a higher ambient operating temperature is required.The ADSP-21478 offers a very low power and high performance – 266 MHz/1596 MFLOPs – in a BGA and LQFP package within the fourth generation SHARC Processor family. This feature of power makes the ADSP-21478 particularly well suited to address the automotive audio and many industrial control segments where low power is a requirement. In addition to its high core performance, the ADSP-21478 includes additional processing blocks such as FIR, IIR, and FFT accelerators to increase the total performance of the system. There is a new feature called Variable Instruction Set Architecture (VISA) that allows the code size to be decreased by 20% to 30% and increase the memory size availability. The fourth generation DSP allows the ability to connect to external memory by providing a glueless interface to 16-bit wide SDR SDRAMs.Fourth-generation SHARC Processors also integrate application-specific peripherals designed to simplify hardware design, minimize design risks, and ultimately reduce time to market. Grouped together, and broadly named the Digital Applications Interface (DAI), these functional blocks may be connected to each other or to external pins via the software-programmable Signal Routing Unit (SRU). The SRU is an innovative architectural feature that enables complete and flexible routing amongst DAI blocks. Peripherals connected through the SRU include but are not limited to serial ports, SPI ports, S/PDIF Tx/Rx, and an 8-Channel asynchronous sample rate converter block. The fourth generation SHARC allows data from the serial ports to be directly transferred to external memory by the DMA controller. Other peripherals such as UART and Two-Wire Interface are routed through a Digital Peripheral Interface (DPI).

The fourth generation of SHARC® Processors now includes the low power floating point DSP products – the ADSP-21478 and ADSP-21479 and offers increased performance, hardware-based filter accelerators, audio and application-focused peripherals, and new memory configurations capable of supporting a single chip solution. All devices are pin-compatible with each other and completely code-compatible with all prior SHARC Processors. These newest members of the fourth generation SHARC Processor family are based on a single-instruction, multiple-data (SIMD) core, which supports both 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats and their low power make them particularly suitable for battery powered applications or where a higher ambient operating temperature is required.The ADSP-21479 offers a very low power and high performance – 266 MHz/1596 MFLOPs – in a BGA and LQFP package within the fourth generation SHARC Processor family. This feature of power makes the ADSP-21479 particularly well suited to address the automotive audio and many industrial control segments where low power is a requirement. In addition to its high core performance, the ADSP-21479 includes additional processing blocks such as FIR, IIR, and FFT accelerators to increase the total performance of the system. There is a new feature called Variable Instruction Set Architecture (VISA) that allows the code size to be decreased by 20% to 30% and increase the memory size availability. The fourth generation DSP allows the ability to connect to external memory by providing a glueless interface to 16-bit wide SDR SDRAMs. Fourth-generation SHARC Processors also integrate application-specific peripherals designed to simplify hardware design, minimize design risks, and ultimately reduce time to market. Grouped together, and broadly named the Digital Applications Interface (DAI), these functional blocks may be connected to each other or to external pins via the software-programmable Signal Routing Unit (SRU). The SRU is an innovative architectural feature that enables complete and flexible routing amongst DAI blocks. Peripherals connected through the SRU include but are not limited to serial ports, SPI ports, S/PDIF Tx/Rx, and an 8-Channel asynchronous sample rate converter block. The fourth generation SHARC allows data from the serial ports to be directly transferred to external memory by the DMA controller. Other peripherals such as UART and Two-Wire Interface are routed through a Digital Peripheral Interface (DPI).

The SHARC ADSP-21489 is one of two new members of the fourth generation of SHARC® Processors that now includes the ADSP-21483, ADSP-21486, ADSP-21487, ADSP-21488, ADSP-21489 and offers increased performance, hardware-based filter accelerators, audio and application-focused peripherals, and new memory configurations capable of supporting the latest surround-sound decoder algorithms. All devices are pin-compatible with each other and completely code-compatible with all prior SHARC Processors. These newest members of the fourth generation SHARC Processor family are based on a single-instruction, multiple-data (SIMD) core, which supports both 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats making them particularly suitable for high-performance audio applications.The ADSP-21489 offers the highest performance–450 MHz/2700 MFLOPs–in an LQFP package within the fourth generation SHARC Processor family. This level of performance makes the ADSP-21489 particularly well suited to address the automotive audio and industrial control segments. In addition to its high core performance, the ADSP-21489 includes additional processing blocks such as FIR, IIR, and FFT accelerators to increase the total performance of the system. There is a new feature called Variable Instruction Set Architecture (VISA) that allows the code size to be decreased by 20% to 30% and increase the memory size availability. The fourth generation DSP allows the ability to connect to external memory by providing a glueless interface to 16-bit wide SDR SDRAMs.Fourth-generation SHARC Processors also integrate application-specific peripherals designed to simplify hardware design, minimize design risks, and ultimately reduce time to market. Grouped together, and broadly named the Digital Applications Interface (DAI), these functional blocks may be connected to each other or to external pins via the software-programmable Signal Routing Unit (SRU). The SRU is an innovative architectural feature that enables complete and flexible routing amongst DAI blocks. Peripherals connected through the SRU include but are not limited to serial ports, IDP, S/PDIF Tx/Rx, and an 8-Channel asynchronous sample rate converter block. The fourth generation SHARC allows data from the serial ports to be directly transferred to external memory by the DMA controller. Other peripherals such as SPI,UART and Two-Wire Interface are routed through a Digital Peripheral Interface (DPI).

The BF504 is a low cost member of the Blackfin portfolio of processors. With a 400 MHz core clock speed and a unique peripheral set including two three-phase PWM units, an ADC Control Module, two SPI’s, two SPORT’s, a CAN controller, a PPI, eight general purpose counters and a Removable Storage Interface, the BF504 is feature and cost optimized for compute intensive industrial and general purpose applications that do not require external memory or executable flash. The BF504 is offered in a low cost 12 × 12mm LFCSP package in commercial and industrial temperature grades.

The SSM3302 is a fully integrated, high efficiency, stereo Class-D audio amplifier. The application circuit requires minimal externalcomponents and operates from a single 7 V to 18 V supply. The device is capable of delivering 2 × 10 W of continuous output power into a 4 Ω load (or 2 × 8 W into 8 Ω) with 98 dB. Spread spectrum pulse density modulation (PDM) is used toprovide lower EMI radiated emissions compared with other Class-D architectures. The SSM3302 includes an optional modulation select pin (ultralow EMI emission mode) that significantly reduces the radiated emissions at the Class-D outputs, particularly above 100 MHz. The SSM3302 can pass FCC Class-B emissions testing with an unshielded 20 inch cable using common-mode choke-based filtering.The fully differential input of the SSM3302 provides excellent rejection of common-mode noise on the input. The device also includes a highly flexible gain select pin that only requires one series resistor to choose a gain between 9 dB and 24 dB, with no change to the input impedance. The benefit of this is to improve gain matching between multiple SSM3302 devices within a single application compared with using external resistors to set gain.The SSM3302 includes an integrated voltage regulator thatgenerates a 5 V rail.The SSM3302 has a micropower shutdown mode with a typical shutdown current of 10 μA. Shutdown is enabled by applying a logic low to the SD pin. The device also includes pop-and-click suppression circuitry that minimizes voltage glitches at the output during turn on and turn off, reducing audible noise during activation and deactivation.Other included features to simplify system level integration of the SSM3302 are input low-pass filtering to suppress out-ofband DAC noise interference to the pulse density modulator, fixed input impedance to simplify component selection across multiple platform production builds, and a thermal warning indicator pin.The SSM3302 is specified over the commercial temperaturerange (−40°C to +85°C). It has built-in thermal shutdown andoutput short-circuit protection. It is available in a halide-free,40-lead, 6 mm × 6 mm lead frame chip scale package (LFCSP).APPLICATIONS Mobile computing Flat panel televisions Media docking stations Portable electronics Sound bars

Housed in a 32-pin, 5mm x 5mm QFN package, the MicroPHY® is the smallest Fast Ethernet PHY available that provides a full 802.3 media independentinterface (MII) to the system media controller. The 78Q2123/2133 MicroPHYs are designed to meet the growing demands of nontraditional networked applications such as game consoles, set-top boxes, and digital TVs. The tiny size gives designers an edge when board space is at a premium, and its single 3.3V supply requirements eliminate the need for 1.8V regulators or additional voltage conversion capacitors.The integrated HP Auto MDI/MDI-X function, a must for consumer electronic applications, automatically compensates for crossover cable problems eliminating one of the most common items for consumer help lines. The MicroPHY’s full MII allows the device to easily interface to any 802.3-compliant MAC. The MicroPHY offers all the essential pins for embedded applications including reset pin, power-down pin, programmable LEDs and more. On-chip regulators masterfully achieve supply-noise isolation among the various blocks while reducing the number of off-chip supply filtering components. A semidigital architecture and digital clock recovery unit are used in the receiver to maximize circuit noise immunity. The MicroPHY includes integrated ENDECs, scrambler/descrambler, dual-speed clock recovery, and full-featured autonegotiation functions. The transmitter includes an on-chip pulse-shaper and a low-power line driver. The receiver has an adaptive equalizer and a baseline restoration circuit required for accurate clock and data recovery. The transceiver interfaces to Category-5 unshielded twisted pair (Cat-5 UTP) cabling through 1:1 isolation transformers without the need for external filtering.ApplicationsDigital Video Recorders/PlayersHigh Definition 1080P/1080i DTVsHigh-Performance Satellite, Cable, and IPTV Set-Top BoxesIP-PVR and Video Distribution SystemsMultimedia Residential Gateways

The AD5116 provides a nonvolatile digital potentiometer solution for 64-position adjustment applications, offering guaranteed low resistor tolerance errors of ±8% and up to ±6 mA current density in the A, B, and W pins. The low resistor tolerance, low nominal temperature coefficient, and high bandwidth simplify open-loop applications, as well as tolerance matching applications.The new low A-W and B-W resistance feature minimizes the wiper resistance in the extremes of the resistor array to typically 45 Ω.A simple push button interface allows manual control with just two external push button switches. The AD5116 is designed with a built-in adaptive debouncer that ignores invalid bounces due to contact bounce (commonly found in mechanical switches). The debouncer is adaptive, accommodating a variety of push buttons.The AD5116 can automatically save the last wiper position into EEPROM, making it suitable for applications that require a power-up in the last wiper position, for example, audio equipment.The AD5116 is available in a 2 mm × 2 mm 8-lead LFCSP package. The part is guaranteed to operate over the extended industrial temperature range of −40°C to +125°C.APPLICATIONS Mechanical potentiometer replacement Portable electronics level adjustment Audio volume control Low resolution DAC LCD panel brightness and contrast control Programmable voltage to current conversion Programmable filters, delays, time constants Feedback resistor programmable power supply Sensor calibration