Ultralow Power Voltage Detector with Disable Input and Low Threshold Voltages Features: Ultralow power consumption with ICC = 92 nA (typical) Precision, low voltage monitoring Pretrimmed voltage monitoring threshold options 20 options from 0.5 V to 1.9 V ±1.3% threshold accuracy over full temperature range Output disable input 23 µs to 26 µs typical propagation delay Open-drain type output Power supply glitch immunity Available in a 1.46 mm × 0.96 mm WLCSP Operational temperature range: −40°C to +85°C

2 GHz to 18 GHz, Digitally Tunable, High-Pass and Low-Pass Filter Features: Digitally tunable, multioctave, high-pass and low-pass tuning Independent 3 dB frequency control for up to 4 GHz of bandwidth Optimal wideband rejection: 35 dB Single chip replacement for discrete filter banks Compact 9 mm × 9 mm, 56-terminal LGA packageENHANCED PRODUCT FEATURES Supports defense and aerospace applications (AQEC standard Military temperature range of −55°C to +105°C Controlled manufacturing baseline One assembly and test site One fabrication site Production change notification Qualification data available on request V62/21604

MxFE Quad, 16-Bit, 12 GSPS RF DAC and Dual, 12-Bit, 6 GSPS RF ADC Features:Flexible reconfigurable common platform design 4 DACs and 2 ADCs (4D2A) and 2D2A options Supports single, dual, and quad band Datapaths and DSP blocks are fully bypassableDAC to ADC sample rate ratios of 1, 2, 3, and 4 On-chip PLL with multichip synchronization External RFCLK input option for off-chip PLL Maximum DAC sample rate up to 12 GSPS Maximum data rate up to 12 GSPS using JESD204C Useable analog bandwidth to 8 GHz Maximum ADC sample rate up to 6 GSPS Maximum data rate up to 6 GSPS using JESD204C Useable analog bandwidth to 8 GHz ADC ac performance at 6 GSPS, input at 2.7 GHz, 1 dBFS Full-scale input voltage: 1.475 V p-p Noise density: 147.5 dBFS/Hz Noise figure: 25.3 dB HD2: 72 dBFS HD3: 68 dBFS Worst other (excluding HD2 and HD3): 78 dBFS DAC ac performance at 12 GSPS, output at 2.6 GHz Full-scale output current range: 6.43 mA to 37.75 mA Two-tone IMD3 (6 dBFS per tone): 72 dBc NSD, single-tone: 160 dBc/Hz SFDR, single-tone: 75 dBc Versatile digital features Selectable interpolation and decimation filters Configurable DDC and DUC 8 fine complex DUCs and 4 coarse complex DUCs 8 fine complex DDCs and 4 coarse complex DDCs 48-bit NCO per DUC or DDC Option to bypass fine and coarse DUC/DDC Programmable 192-tap PFIR filter for receive equalization Supports 4 different profile settings loaded via GPIO Programable delay per data path Receive AGC support Fast detect with low latency for fast AGC control Signal monitor for slow AGC control Dedicated AGC support pins Transmit DPD support Fine DUC channel gain control and delay adjust Coarse DDC delay adjust for DPD observation path Auxiliary features Fast frequency hopping Direct digital synthesis (DDS) Low latency loopback modes (receive datapath data can be routed to the transmit datapaths) ADC clock driver with selectable divide ratios Power amplifier downstream protection circuitry On-chip temperature monitoring unit Flexible GPIO pins TDD power savings option SERDES JESD204B/JESD204C interface, 16 lanes up to 24.75 Gbps 8 lanes JESD204B/C transmitter (JT×) and 8 lanes JESD204B/C receiver (JR×) JESD204B compliance with the maximum 15.5 Gbps JESD204C compliance with the maximum 24.75 Gbps Supports real or complex digital data (8-, 12-, 16-, or 24-bit) 15 mm × 15 mm, 324-ball BGA with 0.8 mm pitch

200 g Range, 3-Axis Digital Accelerometer Features: ±200 g measurement range Low power: 170 μA in measurement mode and 17 μA in standby mode at VS = 2.5 V (typical) User selectable bandwidth up to 3200 Hz ODR Fixed 13-bit output resolution Supply voltage range: 2.0 V to 3.6 V Embedded memory management system with FIFO technology minimizes host processor load Shock event detection Activity/inactivity monitoring SPI (3- or 4-wire) and I2C digital interfaces Wide temperature range: −40 to +125°C 10,000 g shock survival Pb free and RoHS compliant Small and thin: 32-lead, 5 mm × 5 mm × 1.45 mm LFCSP AEC-Q100 qualified for automotive applications

Small, Low Power, 3-Axis 5 g Accelerometer Features:3-axis sensingSmall, low profile package4 mm 4 mm 1.45 mm LFCSPLow power: 350 A typicalSingle-supply operation: 1.8 V to 3.6 V10,000 g shock survivalExcellent temperature stabilityBandwidth adjustment with a single capacitor per axisRoHS/WEEE lead-free compliant

Low Noise, Low Drift, Low Power, 3-Axis MEMS Accelerometer Features: Hermetic package offers optimal long-term stability 0 g offset vs. temperature (all axes): 0.75 mg/°C maximum Ultralow noise spectral density (all axes): 75 g/Hz Low power, VSUPPLY (LDO regulator enabled) Measurement mode: 150 μA Standby mode: 21 μA User adjustable analog output bandwidth Integrated temperature sensor Voltage range options VSUPPLY with internal regulators: 2.25 V to 3.6 V V1P8ANA, V1P8DIG with internal LDO regulator bypassed: 1.8 V typical 10% Operating temperature range: 40C to +125C 14-terminal, 6 mm 5.6 mm 2.2 mm, LCC packageADXL356-EP supports defense and aerospace applications (AQEC standard)Download ADXL356-EP Data Sheet (pdf)Military temperature range: −55°C to +125°CControlled manufacturing baselineOne assembly/test siteOne fabrication siteProduct change notificationQualification data available on requestV62/18610 DSCC Drawing Number

Low Noise, Low Drift, Low Power 3-Axis MEMS Accelerometer Features: 0 g offset vs. temperature (all axes): 0.45 mg/°C typical Ultralow noise density (all axes): 80 μg/√Hz Low power, VSUPPLY (LDO enabled) In measurement mode: 200 μA In standby mode: 21 μA Digital output features Digital SPI and limited I2C interfaces supported 20-bit ADC Data interpolation routine for synchronous sampling Programmable high-pass and low-pass digital filters Integrated temperature sensor Voltage range options VSUPPLY with internal regulators: 2.25 V to 3.6 V V1P8ANA, V1P8DIG with internal LDO regulator bypassed: 1.8 V typical ± 10% Operating temperature range: −40°C to +125°C 14-terminal, 4 mm × 4 mm × 1.04 mm, LGA package

3-Axis, 200 g Digital MEMS Accelerometer Features: Low power: as low as 35 µA in measurement mode and 0.1 µA in standby mode at VS = 2.5 V (typical) Power consumption scales automatically with bandwidth Embedded, 32-level FIFO buffer minimizes processor load Bandwidth of up to 1 kHz Bandwidth selectable via serial command Shock event detection Activity/inactivity monitoring Supply voltage range: 2.0 V to 3.6 V I/O voltage range: 1.7 V to VS SPI (3- or 4-wire) and I2C digital interfaces Wide temperature range: −40°C to +85°C 10,000 g shock survival Pb free/RoHS compliant Small and thin: 3 mm × 5 mm × 1 mm LGA packageADXL375-EP supports defense and aerospace applications (AQEC standard)Download ADXL375-EP Data Sheet (pdf)Extended industrial temperature range: −55°C to +105°CControlled manufacturing baseline1 assembly/test site1 fabrication siteProduct change notificationQualification data available on requestV62/ 18612 DSCC Drawing Number

Low Power, Low Noise and Distortion, Rail-to-Rail Output Amplifier Features: Low power: 1.1 mA/amp Low wideband noise 2.1 nV/√Hz 1.4 pA/√Hz Low 1/f noise 7 nV/√Hz @ 10 Hz 13 pA/√Hz @ 10 Hz Low distortion: −105 dBc @ 100 kHz, VO = 2 V p-p High speed 80 MHz, −3 dB bandwidth (G = +1) 12 V/μs slew rate 175 ns settling time to 0.1% Low offset voltage: 0.3 mV maximum Rail-to-rail output Power down Wide supply range: 2.7 V to 12 V

Quad 12-Bit Serial Voltage Output DAC Features: Guaranteed monotonic over temperature Excellent matching between DACs Unipolar or bipolar operation Buffered voltage outputs High speed serial digital interface Reset-to-zero scale or midscale Wide supply range, +5 V only to ±15 V Low power consumption (35 mW maximum) Available in 16-Lead PDIP, SOIC, and CERDIP packages