14-Bit, 3GSPS, JESD204B, Dual Analog-to-Digital Converter Features: JESD204B (Subclass 1) coded serial digital outputs  Support for lane rates up to 16 Gbps per lane  1.65 W total power per channel at 3 GSPS (default settings)  Performance at −2 dBFS amplitude, 2.6 GHz input SFDR = 70 dBFS SNR = 57.2 dBFS Performance at −9 dBFS amplitude, 2.6 GHz input SFDR = 78 dBFS SNR = 59.5 dBFS Integrated input buffer Noise density = −152 dBFS/Hz 0.975 V, 1.9 V, and 2.5 V dc supply operation 9 GHz analog input full power bandwidth (−3 dB) Amplitude detect bits for efficient AGC implementation 2 integrated, wideband digital processors per channel 48-bit NCO  4 cascaded half-band filters  Phase coherent NCO switching Up to 4 channels available  Serial port control Integer clock with divide by 2 and divide by 4 options Flexible JESD204B lane configurations On-chip dither

12-Bit, 1 GSPS/500 MSPS JESD204B,Dual Analog-to-Digital Converter Features: JESD204B (Subclass 1) coded serial digital outputs 1.5 W total power per channel at 1 GSPS (default settings) SFDR 79 dBFS at 340 MHz (1 GSPS) 85 dBFS at 340 MHz (500 MSPS) SNR 63.4 dBFS at 340 MHz (AIN = −1.0 dBFS, 1 GSPS) 65.6 dBFS at 340 MHz (AIN = −1.0 dBFS, 500 MSPS) ENOB = 10.4 bits at 10 MHz (1 GSPS) DNL = ±0.16 LSB; INL = ±0.35 LSB (1 GSPS) Noise density −151 dBFS/Hz (1 GSPS) −150 dBFS/Hz (500 MSPS) 1.25 V, 2.5 V, and 3.3 V dc supply operation Low swing full-scale input 1.34 V p-p typical (1 GSPS) 1.63 V p-p typical (500 MSPS) No missing codes Internal ADC voltage reference Flexible termination impedance 400 Ω, 200 Ω, 100 Ω, and 50 Ω differential 2 GHz usable analog input full power bandwidth 95 dB channel isolation/crosstalk Amplitude detect bits for efficient AGC implementation Differential clock input Optional decimate by 2 DDC per channel Differential clock input Integer clock divide by 1, 2, 4, or 8 Flexible JESD204B lane configurations Small signal dither

8-Bit, 1 GSPS, JESD204B, Quad Analog-to-Digital Converter Features:JESD204B (Subclass 1 and Subclass 0) coded serial digital outputs Lane rates up to 15 Gbps 1.6 W total power at 1 GSPS 400 mW per ADC channel SFDR: 71 dBFS at 611 MHz (1.44 V p-p input range) SNR: 48.6 dBFS at 611 MHz (1.44 V p-p input range) SINAD: 48.5 dBFS at 611 MHz (1.44 V p-p input range) 0.9 V, 1.8 V, and 2.5 V dc supply operation No missing codes Internal ADC voltage reference Analog input buffer On-chip dithering to improve small signal linearityFlexible differential input range 1.44 V p-p to 2.16 V p-p (1.44 V p-p default) 1.4 GHz analog input full power bandwidth Fast detect bits for efficient AGC implementation Differential clock input Integer clock divide by 1, 2, 4, or 8 On-chip temperature diode Flexible JESD204B lane configurations

Dual Low Power, High Speed JFET Operational Amplifier Features: Low supply current: 250 μA/amp maximum High slew rate: 9 V/μs Bandwidth: 3.5 MHz typical Low offset voltage: 1 mV maximum @ 25°C Low input bias current: 20 pA maximum @ 25°C CMRR: 90 dB typical Fast settling time Unity gain stable

14-Bit, 130Msps ADC Features: Sample Rate: 130Msps 77.1dBFS Noise Floor 98dB SFDR SFDR >81dB at 250MHz (1.5VP-P Input Range) PGA Front End (2.25VP-P or 1.5VP-P Input Range) 700MHz Full Power Bandwidth S/H Optional Internal Dither Optional Data Output Randomizer LVDS or CMOS Outputs Single 3.3V Supply Power Dissipation: 1.32W Clock Duty Cycle Stabilizer Pin Compatible 16-Bit Version 130Msps: LTC2208 (16-Bit) 64-Pin (9mm × 9mm) QFN Package

16-Bit, 105Msps Low Noise ADC Features: Sample Rate: 105Msps 81.3dBFS Noise Floor 100dB SFDR SFDR > 90dB at 70MHz 85fsRMS Jitter 2.75VP-P Input Range 400MHz Full Power Bandwidth S/H Optional Internal Dither Optional Data Output Randomizer LVDS or CMOS Outputs Single 3.3V Supply Power Dissipation: 1.19W Clock Duty Cycle Stabilizer Pin Compatible with LTC2208 64-Pin (9mm × 9mm) QFN Package

Isolated No-Opto Synchronous Flyback Controller with Wide Input Supply Range Features: Senses Output Voltage Directly from Primary Side Winding—No Opto-Isolator Required Synchronous Driver for High Efficiency Input Voltage Limited Only by External Power Components Accurate Output Regulation without User Trims Switching Frequency from 50kHz to 250kHz Synchronizable Load Compensation Programmable Undervoltage Lockout Available in a Thermally Enhanced 16-Lead TSSOP Package

500mA Camera LED Charge Pump Features: Low Noise Constant Frequency Operation High Efficiency: Up to 94% Multi-Mode Operation: 1x, 1.5x or 2x Boost Modes Automatic Mode Switching High Output Current: Up to 500mA Tiny Application Circuit (3mm × 3mm DFN Package All Components <1mm High) Automatic Soft-Start Output Disconnect Open, Shorted LED Protection No Inductors Internal 110m LED Current Sense Resistor 3mm × 3mm 10-Lead DFN Package

Triple Output Synchronous 3-Phase DC/DC Controller with Up/Down Tracking Features: Current Mode Controller with On-board MOSFET Drivers Programmable Power Up/Down Tracking Wide VIN Range: 3.3V to 36V (VCC = 5V) ±1% 0.6V VFB Accuracy Over Temperature Power Good Output Voltage Monitor Phase-Lockable or Adjustable Frequency: 160kHz to 700kHz OPTI-LOOP® Compensation Minimizes COUT Current Foldback and Overvoltage Protection Selectable Continuous, Discontinuous or Burst Mode® Operation at Light Load Programmable Phase Operation Available in 5mm × 7mm QFN and 36-Lead SSOP Packages

Triple Output Synchronous 3-Phase DC/DC Controller with Up/Down Tracking Features: Current Mode Controller with On-board MOSFET Drivers Programmable Power Up/Down Tracking Wide VIN Range: 3.3V to 36V (VCC = 5V) ±1% 0.6V VFB Accuracy Over Temperature Power Good Output Voltage Monitor Phase-Lockable or Adjustable Frequency: 160kHz to 700kHz OPTI-LOOP® Compensation Minimizes COUT Current Foldback and Overvoltage Protection Selectable Continuous, Discontinuous or Burst Mode® Operation at Light Load Programmable Phase Operation Available in 5mm × 7mm QFN and 36-Lead SSOP Packages