High Efficiency, Synchronous, 4-Switch Buck-Boost Controller Features: Single Inductor Architecture Allows VIN Above, Below or Equal to the Regulated VOUT Programmable Input or Output Current Wide VIN Range: 4V to 38V 1% Output Voltage Accuracy: 0.8V < VOUT < 38V Synchronous Rectification: Up to 98% Efficiency Current Mode Control Phase-Lockable Fixed Frequency: 200kHz to 600kHz No Reverse Current During Start-Up Power Good Output Voltage Monitor Internal 5.5V LDO Quad N-Channel MOSFET Synchronous Drive VOUT Disconnected from VIN During Shutdown True Soft-Start and VOUT Short Protection, Even in Boost Mode Available in 28-Lead QFN (4mm × 5mm) and 28-Lead SSOP Packages

Octal 12-/10-/8-Bit I2C VOUT DACs with 10ppm/C Reference Features: Integrated Precision Reference: 2.5V Full-Scale 10ppm/°C (LTC2637-L) 4.096V Full-Scale 10ppm/°C (LTC2637-H) Maximum INL Error: 2.5LSB (LTC2637-12) Low Noise: 0.75mVP-P 0.1Hz to 200KHz Guaranteed Monotonic Over –40°C to 125°C Temperature Range Selectable Internal or External Reference 2.7V to 5.5V Supply Range (LTC2637-L) Ultralow Crosstalk Between DACs (<3nV•s) Low Power: 100μA per DAC at 3V (LTC2637-L) Power-On-Reset to Zero-Scale/Mid-Scale Double-Buffered Data Latches Tiny 14-Lead 4mm × 3mm DFN and 16-Lead MSOP Packages

Monolithic Dual Tracking 3A Step-Down Switching Regulator Features: Wide Input Range: – Operation from 3V to 60V Independent Supply, Shutdown, Soft-Start, UVLO, Programmable Current Limit and Programmable Power Good for Each 3A Regulator Die Temperature Monitor Adjustable/Synchronizable Fixed Frequency Operation from 250kHz to 2MHz with Synchronized Clock Output Independent Synchronized Switching Frequencies Optimize Component Size Antiphase Switching Outputs Can Be Paralleled Flexible Output Voltage Tracking Low Dropout: 95% Maximum Duty Cycle 5mm × 5mm QFN Package FMEA Compliant 38-Pin Exposed Pad TSSOP Package

Low Noise Single-Ended to Differential Converter/ADC Driver Features: Rail-to-Rail Input and Outputs Fast Settling Time: 240ns, 0.01%, 8VP-P Output Step 1.9nV/√Hz Input-Referred Op Amp Noise High Impedance Input –3dB Bandwidth: 33MHz 2.7V to 12V Supply Operation No External Gain Resistors Required 4.8mA Supply Current Low Power Shutdown Low Distortion (HD2/HD3): –102dBc/–97dBc at 100kHz, VOUTDIFF = 4VP-P Low Offset Voltage: ±400μV Max High DC Linearity: <±1LSB, 16-Bit, 8VP-P Low Input Current Noise: 1.1pA/√Hz 3mm × 3mm 8-Pin DFN and 8-Lead MSOP Packages

Dual Isolated RS232 Module Transceiver + Power Features: RS232 Transceiver: 2500VRMS for 1 Minute UL-CSA Recognized File #E151738 CSA Component Acceptance Notice 5A Isolated DC Power: 5V at Up to 200mA No External Components Required 1.62V to 5.5V Logic Supply for Flexible Digital Interfacing High Speed Operation 1Mbps for 250pF/3kΩ Load 250kbps for 1nF/3kΩ Load 100kbps for 2.5nF/3kΩ TIA/EIA-232-F Load 3.3V (LTM2882-3) or 5V (LTM2882-5) Operation No Damage or Latchup to ±10kV HBM ESD on Isolated RS232 Interface or Across Isolation Barrier High Common Mode Transient Immunity: 30kV/μs Maximum Continuous Working Voltage: 560VPEAK True RS232 Compliant Output Levels 15mm × 11.25mm BGA and LGA Packages

Overvoltage, Undervoltage and Reverse Supply Protection Controller Features: Wide Operating Voltage Range: 2.5V to 34V Overvoltage Protection to 60V Reverse Supply Protection to –40V LTC4365: Blocks 50Hz and 60Hz AC Power LTC4365-1: Fast (1ms) Recovery from Fault No Input Capacitor or TVS Required for Most Applications Adjustable Undervoltage and Overvoltage Protection Range Charge Pump Enhances External N-Channel MOSFET Low Operating Current: 125μA Low Shutdown Current: 10μA Compact 8-Lead, 3mm × 2mm DFN and TSOT-23 (ThinSOT™) Packages AEC-Q100 Qualified for Automotive Applications

Low Power 200MHz Blackfin+ Embedded Processor with 128KByte L2 SRAM & DDR2/LPDDR Interface Features: Blackfin+ core with up to 200 MHz performance Dual 16-bit or single 32-bit MAC support per cycle 16-bit complex MAC and many other instruction set enhancements Instruction set compatible with previous Blackfin product On-Chip Memory 136KB L1 SRAM with multi-parity-bit protection (64KB instruction, 64KB data, 8KB scratchpad) 128KByte on-chip L2 SRAM with ECC protection 512KByte On-chip L2 ROM L3 interface providing 16-bit interface to DDR2 or LPDDR SDRAM devices (up to 200 MHz) Key Peripherals include USB2.0 HS OTG 2x CAN2.0B ePPI Video I/O 2x SPORTs (w/I2S) 2xQuad-SPI / 1xDual-SPI (w/ Host mode option) I2C 2xUART SD/SDIO/MMC (8-bit) 4-ch 12-bit 1MSPS ADC Security and one-time-programmable memory Crypto hardware accelerators for fast secure boot/IP protection memDMA encryption/decryption for fast run-time security Low-cost packaging 184-Ball CSP_BGA package (12 mm × 12mm × 0.8mm pitch), RoHS compliant Low system power with < 53 mW at 200 MHz at 25°C TJUNCTION

240MHz ARM Cortex-M4 with 13+ ENOB ADC, BGA212 Features: Dual 16 bit SAR ADCs with no missing codes, 13+ ENOB, 380ns conversion speed for high precision closed loop control. 240 MHz ARM Cortex M4 Core with Floating Point Unit to support advanced programming models and complex algorithms. 384KB SRAM and 2MB flash memory for large program size. Advanced PWM and timer functions for improved torque ripple and motor performance. SINC filters for glueless connection to AD74xx isolated converters. Harmonic Analysis Engine for compliant grid connection. Ethernet and USB to support networked interfaces. Two CAN interfaces, three UARTS, two SPIs, two SPORTs, eight 32-bit timers, two two-wire interfaces and four quadrature encoder interfaces. 16 bit asynchronous memory bus for external SRAM or FPGA interfacing. 212-ball, 19x19mm CSP_BGA package Up to 105C ambient operating temperature for support of industrial applications.

Single-core SHARC+ (w/384KB L1), arm Cortex-A5, 1MB Shared L2, 10/100 Ethernet, 176-LQFP Features: Dual-enhanced SHARC+ high performance floating-point cores Up to 500 MHz per SHARC+ core Up to 3 Mb (384 kB) L1 SRAM memory per core with parity (optional ability to configure as cache) 32-bit, 40-bit, and 64-bit floating-point support 32-bit fixed point Byte, short word, word, long word addressed arm® Cortex-A5 core 500 MHz/800 DMIPS with NEON/VFPv4-D16/Jazelle 32 kB L1 instruction cache with parity/32 kB L1 data cache with parity 256 kB L2 cache with parity Powerful DMA system On-chip memory protection Integrated safety features 17 mm × 17 mm 400-ball CSP_BGA and 176-lead LQFP_EP, RoHS compliant Low system power across automotive temperature rangeMemory Large on-chip L2 SRAM with ECC protection, up to 1 MB One L3 interface optimized for low system power, providing 16-bit interface to DDR3 (supporting 1.5 V capable DDR3L devices), DDR2, or LPDDR1 SDRAM devicesAdditional Features Security and Protection Cryptographic hardware accelerators Fast secure boot with IP protection Support for arm® TrustZone Accelerators FIR, IIR offload engines Qualified for automotive applications

Single-core SHARC+ (w/384KB L1), arm Cortex-A5, 1MB Shared L2, 10/100 Ethernet, 176-LQFP Features: Dual-enhanced SHARC+ high performance floating-point cores Up to 500 MHz per SHARC+ core Up to 3 Mb (384 kB) L1 SRAM memory per core with parity (optional ability to configure as cache) 32-bit, 40-bit, and 64-bit floating-point support 32-bit fixed point Byte, short word, word, long word addressed arm® Cortex-A5 core 500 MHz/800 DMIPS with NEON/VFPv4-D16/Jazelle 32 kB L1 instruction cache with parity/32 kB L1 data cache with parity 256 kB L2 cache with parity Powerful DMA system On-chip memory protection Integrated safety features 17 mm × 17 mm 400-ball CSP_BGA and 176-lead LQFP_EP, RoHS compliant Low system power across automotive temperature rangeMemory Large on-chip L2 SRAM with ECC protection, up to 1 MB One L3 interface optimized for low system power, providing 16-bit interface to DDR3 (supporting 1.5 V capable DDR3L devices), DDR2, or LPDDR1 SDRAM devicesAdditional Features Security and Protection Cryptographic hardware accelerators Fast secure boot with IP protection Support for arm® TrustZone Accelerators FIR, IIR offload engines Qualified for automotive applications