The AD9218 is a dual 10-bit monolithic sampling analog-to-digital converter with on-chip track-and-hold circuits. The product is low cost, low power, and is small and easy to use. The AD9218 operates at a 105 MSPS conversion rate with outstanding dynamic performance over its full operating range. Each channel can be operated independently.The ADC requires only a single 3.0 V (2.7 V to 3.6 V) power supply and a clock for full operation. No external reference or driver components are required for many applications. The digital outputs are TTL/CMOS compatible and a separate output power supply pin supports interfacing with 3.3 V or 2.5 V logic.The clock input is TTL/CMOS compatible and the 10-bit digital outputs can be operated from 3.0 V (2.5 V to 3.6 V) supplies. User-selectable options offer a combination of power-down modes, digital data formats, and digital data timing schemes. In power-down mode, the digital outputs are driven to a high impedance state.Product Highlights Low Power. Only 275 mW power dissipation per channel at 105 MSPS. Other speed grades proportionally scaled down while maintaining high ac performance.  Pin Compatibility Upgrade. Allows easy migration from 8-bit to 10-bit devices. Pin compatible with the 8-bit AD9288 dual ADC.  Easy to Use. On-chip reference and user controls provide flexibility in system design.  High Performance. Maintains 54 dB SNR at 105 MSPS with a Nyquist input.  Channel Crosstalk. Very low at –75 dBc. 6. Fabricated on an Advanced CMOS Process. Available in a 48-lead low profile quad flat package (7 mm × 7 mm LQFP) specified over the industrial temperature range (−40°C to +85°C).ApplicationsBattery-powered instruments Hand-held scopemeters Low cost digital oscilloscopes I and Q communications Ultrasound equipment

The AD9218 is a dual 10-bit monolithic sampling analog-to-digital converter with on-chip track-and-hold circuits. The product is low cost, low power, and is small and easy to use. The AD9218 operates at a 105 MSPS conversion rate with outstanding dynamic performance over its full operating range. Each channel can be operated independently.The ADC requires only a single 3.0 V (2.7 V to 3.6 V) power supply and a clock for full operation. No external reference or driver components are required for many applications. The digital outputs are TTL/CMOS compatible and a separate output power supply pin supports interfacing with 3.3 V or 2.5 V logic.The clock input is TTL/CMOS compatible and the 10-bit digital outputs can be operated from 3.0 V (2.5 V to 3.6 V) supplies. User-selectable options offer a combination of power-down modes, digital data formats, and digital data timing schemes. In power-down mode, the digital outputs are driven to a high impedance state.Product Highlights Low Power. Only 275 mW power dissipation per channel at 105 MSPS. Other speed grades proportionally scaled down while maintaining high ac performance.  Pin Compatibility Upgrade. Allows easy migration from 8-bit to 10-bit devices. Pin compatible with the 8-bit AD9288 dual ADC.  Easy to Use. On-chip reference and user controls provide flexibility in system design.  High Performance. Maintains 54 dB SNR at 105 MSPS with a Nyquist input.  Channel Crosstalk. Very low at –75 dBc. 6. Fabricated on an Advanced CMOS Process. Available in a 48-lead low profile quad flat package (7 mm × 7 mm LQFP) specified over the industrial temperature range (−40°C to +85°C).ApplicationsBattery-powered instruments Hand-held scopemeters Low cost digital oscilloscopes I and Q communications Ultrasound equipment

The AD9229 is a 50 or 65 MSPS quad 12-bit, analog–to–digital converter with serial LVDS outputs. An on–chip track–and–hold circuit is designed for low cost, low power, small size and ease of use. The product operates up to a 65 MSPS conversion rate and is optimized for outstanding dynamic performance where a small package size is critical.The ADC requires a single +3 V power supply. No external reference or driver components are required for many applications. A separate output power supply pin supports LVDS compatible serial digital output levels.The ADC automatically multiplies up the sample rate clock for the appropriate LVDS serial data rate. This data clock output (DCO) provides operation up to 390 MHz and supports double-data rate operation (DDR). An MSB trigger or Frame clock is also provided to signal a new output byte. Power down is supported, and the ADC consumes 3 mW when enabled.Fabricated on an advanced CMOS process, the AD9229 is available in a 48-pin chip scale 7 mm x 7 mm package (48-LFCSP) specified over the industrial temperature range (–40°C to +85°C).ApplicationsDigital beam forming systems for ultrasound Wireless and wired broadband communications Communication test equipment

The AD9283 is an 8-bit monolithic sampling analog-to-digital converter with an on-chip track-and-hold circuit and is optimized for low cost, low power, small size, and ease of use. The product operates at a 100 MSPS conversion rate, with outstanding dynamic performance over its full operating range.The ADC requires only a single 3.0 V (2.7 V to 3.6 V) power supply and an encode clock for full performance operation. No external reference or driver components are required for many applications. The digital outputs are TTL/CMOS-compatible and a separate output power supply pin supports interfacing with 3.3 V or 2.5 V logic.The encoder input is TTL/CMOS-compatible. A power down function may be exercised to bring total consumption to 4.2 mW. In power down mode, the digital outputs are driven to a high impedance state.Fabricated on an advanced CMOS process, the AD9283 is available in a 20-lead surface mount plastic package (SSOP) specified over the industrial temperature range (-40°C to +85°C).

The AD9776A/AD9778A/AD9779A are dual, 12-/14-/16-bit, high dynamic range digital-to-analog converters (DACs) that provide a sample rate of 1 GSPS, permitting a multicarrier generation up to the Nyquist frequency. They include features optimized for direct conversion transmission applications, including complex digital modulation and gain and offset compensation. The DAC outputs are optimized to interface seamlessly with analog quadrature modulators such as the ADL537x FMOD series from Analog Devices, Inc. A 3-wire interface provides for programming/readback of many internal parameters. Full-scale output current can be programmed over a range of 10 mA to 30 mA. The devices are manufactured on an advanced 0.18 μm CMOS process and operate on 1.8 V and 3.3 V supplies for a total power consumption of 1.0 W. They are enclosed in a 100-lead thin quad flat package (TQFP).Product Highlights Ultralow noise and intermodulation distortion (IMD) enable high quality synthesis of wideband signals from baseband to high intermediate frequencies. A proprietary DAC output switching technique enhances dynamic performance. The current outputs are easily configured for various single-ended or differential circuit topologies. CMOS data input interface with adjustable setup and hold. Novel 2×, 4×, and 8× interpolator/coarse complex modulator allows carrier placement anywhere in DAC bandwidth.Applications Wireless infrastructure W-CDMA, CDMA2000, TD-SCDMA, WiMax, GSM, LTE Digital high or low IF synthesis Internal digital upconversion capability Transmit diversity Wideband communications: LMDS/MMDS, point-to-point

The AD9880 offers designers the flexibility of an analog interface and High-Definition Multimedia Interface (HDMI™) receiver integrated on a single chip. Also included is support for High bandwidth Digital Content Protection (HDCP).ANALOG INTERFACEThe AD9880 is a complete 8-bit 150 MSPS monolithic analog interface optimized for capturing Component Video (YPbPr) and RGB graphics signals. Its 150 MSPS encode rate capability and full power analog bandwidth of 300 MHz supports all HDTV formats (up to 1080p) and FPD resolutions up to SXGA (1280 × 1024 at 75 Hz).The analog interface includes a 150 MHz triple ADC with internal 1.25V reference, a Phase Locked Loop (PLL), and programmable gain, offset, and clamp control. The user provides only 1.8V and 3.3V power supply, analog input, and Hsync. Three-state CMOS outputs may be powered from 1.8V to 3.3V. The AD9880’s on-chip PLL generates a pixel clock from Hsync. Pixel clock output frequencies range from 12 MHz to 150 MHz. PLL clock jitter is typically less than 500 ps p-p at 150 MHz. The AD9880 also offers full sync processing for composite sync and Sync-on-Green (SOG) applications.DIGITAL INTERFACEThe AD9880 contains a HDMI v1.1 compatible receiver and supports all HDTV formats (up to 1080p) and display resolutions up to SXGA (1280 × 1024 at 75 Hz). The receiver features an intra-pair skew tolerance of up to one full clock cycle. With the inclusion of HDCP, displays may now receive encrypted video content. The AD9880 allows for authentication of a video receiver, decryption of encoded data at the receiver, and renewability of that authentication during transmission as specified by the HDCP v1.1 protocol.Fabricated in an advanced CMOS process, the AD9880 is provided in a space-saving 100-lead LQFP surface-mount Pb-free plastic package and is specified over the 0 ºC to 70 ºC temperature range.APPLICATIONS Advanced TV HDTV Projectors LCD Monitor

The AD9888 is a complete 8-bit, 170 MSPS, monolithic analog interface optimized for capturing RGB graphics signals from personal computers and workstations. Its 170 MSPS encode rate capability and full-power analog bandwidth of 500 MHz supports resolutions of up to 1600 × 1200 (UXGA) at 75 Hz.For ease of design and to minimize cost, the AD9888 is a fully integrated interface solution for flat panel displays. The AD9888 includes an analog interface that has a 170 MHz triple ADC with an internal 1.25 V reference phase-locked loop (PLL) to generate a pixel clock from HSYNC and COAST; midscale clamping; and programmable gain, offset, and clamp controls. The user provides only a 3.3 V power supply, analog input, and HSYNC and COAST signals. Three-state CMOS outputs can be powered from 2.5 V to 3.3 V.The on-chip PLL of the AD9888 generates a pixel clock from the HSYNC and COAST inputs. Pixel clock output frequencies range from 10 MHz to 170 MHz. PLL clock jitter is typically less than 450 ps p-p at 170 MSPS. When the COAST signal is presented, the PLL maintains its output frequency in the absence of HSYNC. A sampling phase adjustment is provided. Data, HSYNC, and clock output phase relationships are maintained. The PLL can be disabled, and an external clock input can be provided as the pixel clock. The AD9888 also offers full sync processing for composite sync and sync-on-green applications.A CLAMP signal is generated internally or can be provided by the user through the CLAMP input pin. This device is fully programmable via a 2-wire serial port.Fabricated in an advanced CMOS process, the AD9888 is provided in a space-saving, 128-lead, MQFP, surface-mount, plastic package and is specified over the 0°C to 70°C temperature range. The AD9888 is also available in a Pb-free package. APPLICATIONS RGB Graphics Processing LCD Monitors and Projectors Plasma Display Panels Scan Converters Microdisplays Digital TV

The AD9911 is a complete direct digital synthesizer (DDS).This device includes a high speed DAC with excellent widebandand narrowband spurious-free dynamic range (SFDR) as well asthree auxiliary DDS cores without assigned digital-to-analogconverters (DACs). These auxiliary channels are used for spurreduction, multitone generation, or test-tone modulation.The AD9911 is the first DDS to incorporate SpurKillertechnology and multitone generation capability. Multitonemode enables the generation up to four concurrent carriers;frequency, phase and amplitude can be independentlyprogrammed. Multitone generation can be used for systemtests, such as inter-modulation distortion and receiver blockersensitivity. SpurKilling enables customers to improve SFDRperformance by reducing the magnitude of harmoniccomponents and/or the aliases of those harmonic components.Test-tone modulation efficiently enables sine wave modulationof amplitude on the output signal using one of the auxiliaryDDS cores.The AD9911 can perform modulation of frequency, phase, oramplitude (FSK, PSK, ASK). Modulation is implemented bystoring profiles in the register bank and applying data to theprofile pins. In addition, the AD9911 supports linear sweep offrequency, phase, or amplitude for applications such as radarand instrumentation.The DDS acts as a high resolution frequency divider with theREF_CLK as the input and the DAC providing the output. TheREF_CLK input can be driven directly or used in combinationwith an integrated REF_CLK multiplier (PLL). The REF_CLKinput also features an oscillator circuit to support an externalcrystal as the REF_CLK source. The crystal can be used incombination with the REF_CLK multiplier.The AD9911 I/O port offers multiple configurations to providesignificant flexibility. The I/O port offers an SPI-compatiblemode of operation that is virtually identical to the SPI operationfound in earlier Analog Devices DDS products.Flexibility is provided by four data pins (Pin SDIO_0,Pin SDIO_1, Pin SDIO_2, and Pin SDIO_3) that allow fourprogrammable modes of I/O operation.The DAC output is supply referenced and must be terminatedinto AVDD by a resistor and an AVDD center-tapped transformer.The DAC has its own programmable reference to enabledifferent full-scale currents.The DDS core (the AVDD pins and the DVDD pins) is poweredby a 1.8 V supply. The digital I/O interface (SPI) operates at3.3 V and requires that the Pin DVDD_I/O (Pin 49) beconnected to 3.3 V. Applications Agile local oscillator Test and measurement equipment Commercial and amateur radio exciter Radar and sonar Test-tone generation Fast frequency hopping Clock generation

The AD9954 is a direct digital synthesizer (DDS) that uses advanced technology, coupled with an internal high speed, high performance DAC to form a complete, digitally programmable, high frequency synthesizer capable of generating a frequency-agile analog output sinusoidal waveform at up to 160 MHz. The AD9954 enables fast frequency hopping coupled with fine tuning of both frequency (0.01 Hz or better) and phase (0.022° granularity).The AD9954 is programmed via a high speed serial I/O port. The device includes static RAM to support flexible frequency sweep capability in several modes, plus a user-defined linear sweep mode of operation. Also included is an on-chip high speed comparator for applications requiring a square wave output. An on-chip oscillator and PLL circuitry provide users with multiple approaches to generate the device’s system clock.The AD9954 is specified to operate over the extended industrial temperature range.Applications Agile LO frequency synthesis Programmable clock generators FM chirp source for radar and scanning systems Automotive radars Test and measurement equipment Acousto-optic device drivers

The AD9957 functions as a universal I/Q modulator and agileupconverter for communications systems where cost, size, powerconsumption, and dynamic performance are critical. TheAD9957 integrates a high speed, direct digital synthesizer(DDS), a high performance, high speed, 14-bit digital-to-analogconverter (DAC), clock multiplier circuitry, digital filters, andother DSP functions onto a single chip. It provides basebandupconversion for data transmission in a wired or wirelesscommunications system.The AD9957 is the third offering in a family of quadraturedigital upconverters (QDUCs) that includes the AD9857 andAD9856. It offers performance gains in operating speed, powerconsumption, and spectral performance. Unlike its predecessors,it supports a 16-bit serial input mode for I/Q baseband data.The device can alternatively be programmed to operate either asa single tone, sinusoidal source or as an interpolating DAC.The reference clock input circuitry includes a crystal oscillator,a high speed, divide-by-two input, and a low noise PLL formultiplication of the reference clock frequency.The user interface to the control functions includes a serial porteasily configured to interface to the SPORT of the Blackfin®DSP and profile pins to enable fast and easy shift keying of anysignal parameter (phase, frequency, or amplitude).Applications HFC data, telephony, and video modems Wireless base station transmissions Broadband communications transmissions Internet telephony