0.5C Accurate PWM Temperature Sensor in 5-Lead SC-70 Features: Modulated Serial Digital Output - Proportional to Temperature ±0.5°C typical accuracy at 25°C ±1.0°C accuracy from 0°C to 70°C Power consumption 70 μW maximum at 3.3 V Operation from −40°C to +150°C Operation from 3 V to 5.5 V See datasheet for additional features

POWER MANAGEMENT - DC / DC;

RF MIXERS/MULTIPLIERS RF IC'S;

AUDIO / VIDEO ANALOG DEVELOPMENT KITS;

CLOCK & TIMING ANALOG DEVELOPMENT KITS;

POWER MANAGEMENT - DC / DC;

POWER MANAGEMENT - DC / DC;

POWER MANAGEMENT - DC / DC;

Dual 5V, 2A Synchronous Step-Down DC/DCs in Tiny LQFN and WLCSP Features: Dual Outputs Each with 2A Output Current High Efficiency: 19mΩ NMOS and 75mΩ PMOS Wide Bandwidth, Fast Transient Response Switching Frequency Synchronizable Up to 3MHz VIN Range: 2.25V to 5.5V VOUT Range: 0.5V to VIN VOUT Accuracy: ±1% Low Ripple Burst Mode® Operation Peak Current Mode Control Minimum On-Time: 25ns Safely Tolerates Inductor Saturation in Overload Shutdown Current: 1.2µA Precision 400mV Enable Thresholds Internal Soft-Start and Compensation Power Good Output Low Profile, Thermally Enhanced 12-Lead 2mm × 2mm × 0.74mm LQFN and 16-Ball 1.64mm × 1.64mm × 0.5mm WLCSP Packages AEC-Q100 Qualified for Automotive Applications

The AD5590 is a 16-channel input and 16-channel output analog I/O port with eight uncommitted amplifiers, operating from a single 4.5 V to 5.25 V supply. The AD5590 comprises 16 input channels multiplexed into a 1 MSPS, 12-bit successive approximation ADC with a sequencer to allow a preprogrammed selection of channels to be converted sequentially. The ADC contains a low noise, wide bandwidth track-and-hold amplifier that can handle input frequencies in excess of 1 MHz.The conversion process and data acquisition are controlled using ASYNC and the serial clock signal, allowing the device to easily interface with microprocessors or DSPs. The input signal is sampled on the falling edge of ASYNC and conversion is also initiated at this point. There are no pipeline delays associated with the ADC. By setting the relevant bits in the control register, the analog input range for the ADC can be selected to be a 0 V to VREFA input or a 0 V to 2 ? VREFA with either straight binary or twos complement output coding. The conversion time is determined by the ASCLK frequency because it is also used as the master clock to control the conversion.The DAC section of the AD5590 comprises sixteen 12-bit DACs divided into two groups of eight. Each group has an on-chip reference. The on-board references are off at power-up, allowing the use of external references. The internal references are enabled via a software write.The AD5590 incorporates a power-on reset circuit that ensures that the DAC outputs power up to 0 V and remain powered up at this level until a valid write takes place. The DAC contains a power-down feature that reduces the current consumption of the device and provides software-selectable output loads while in power-down mode for any or all DAC channels. The outputs of all DACs can be updated simultaneously using the LDAC function, with the added functionality of user-selectable DAC channels to simultaneously update. There is also an asynchronous CLR that updates all DACs to a user-programmable code: zero scale, midscale, or full scale.The AD5590 contains eight low noise, single-supply amplifiers. These amplifiers can be used for signal conditioning for the ADCs, DACs, or other independent circuitry, if required.APPLICATIONS Optical Line Cards (Monitoring and Control) Base Stations General Purpose Analog I/O Monitoring and control