5.6 GHz to 8.6 GHz, GaAs, MMIC, I/Q Downconverter Features: Conversion gain: 13 dB typical Image rejection: 32 dBc typical Input P1dB compression: −6 dBm typical Input IP3: 3 dBm typical, 6.0 GHz to 8.6 GHz Noise figure: 2 dB typical LO to RF isolation: 48 dBm typical LO to IF isolation: 13 dBm typical RF to IF isolation: 10 dBm typical Amplitude balance: 0.2 dB typical Phase balance: −2° typical RF return loss: 10 dB typical LO return loss: 15 dB typical IF return loss: 15 dB typical Exposed paddle, 4 mm × 4 mm, 24-lead, LFCSP

Analog Variable Gain Amplifier SMT, 5 - 12 GHz Features: Wide Gain Control Range: 22 dB Single Control Voltage: -1 to -4.5V Output IP3 @ Max Gain: +34 dBm Output P1dB: +22 dBm No External Matching 24 Lead 4x4 mm SMT Package: 16 mm²

Aerospace Monolithic JFET Input Operational Amplifier Features:Low Input Bias and Offset Currents Low Input Offset Voltage: 1.0mV typical Low Input Offset Voltage Drift: 3.0V/C typical Low Input Noise Current High Common-Mode Rejection Ratio: 100dB Low Supply Current

Precision 10V Reference Features: Pin Compatible with LH0070 and AD581 Ultralow Drift—5ppm/°C Max Slope Trimmed Output Voltage Operates in Series or Shunt Mode Output Sinks and Sources in Series Mode Very Low Noise < 1ppmP-P 0.1Hz to 10Hz > 100dB Ripple Rejection Minimum Input Voltage of 11V

8-Bit, 1 GSPS, JESD204B, Quad Analog-to-Digital Converter Features:JESD204B (Subclass 1 and Subclass 0) coded serial digital outputs Lane rates up to 15 Gbps 1.6 W total power at 1 GSPS 400 mW per ADC channel SFDR: 71 dBFS at 611 MHz (1.44 V p-p input range) SNR: 48.6 dBFS at 611 MHz (1.44 V p-p input range) SINAD: 48.5 dBFS at 611 MHz (1.44 V p-p input range) 0.9 V, 1.8 V, and 2.5 V dc supply operation No missing codes Internal ADC voltage reference Analog input buffer On-chip dithering to improve small signal linearityFlexible differential input range 1.44 V p-p to 2.16 V p-p (1.44 V p-p default) 1.4 GHz analog input full power bandwidth Fast detect bits for efficient AGC implementation Differential clock input Integer clock divide by 1, 2, 4, or 8 On-chip temperature diode Flexible JESD204B lane configurations

55V Buck-Boost Multi-Chemistry Battery Charger Features: Wide Voltage Range: 4.5V to 55V Input, Up to 55V Output (60V Absolute Maximums) Synchronous Buck-Boost DC/DC Controller Li-Ion and Lead-Acid Charge Algorithms ±0.5% Float Voltage Accuracy ±5% Charge Current Accuracy Instant-On for Heavily Discharged Batteries Ideal Diode Controller Provides Low Loss PowerPath When Input Power is Limited Input Voltage Regulation for High Impedance Input Supplies and Solar Panel Peak Power Operation Onboard Timer for Protection and Termination Bad Battery Detection with Auto-Reset NTC Input for Temperature Qualified Charging Binary Coded Open-Collector Status Pins Low Profile (0.75mm) 38-Pin 5mm × 7mm QFN Package

Nanopower Buck-Boost DC/DC with Energy Harvesting Battery Life Extender Features: Dual Input, Single Output DC/DCs with Input Prioritizer Energy Harvesting Input: 3.0V to 19V Buck DC/DC Primary Cell Input: 1.8V to 5.5V Buck-Boost DC/DC Zero Battery IQ When Energy Harvesting Source is Available Ultralow Quiescent Current: 750nA at No-Load Low Noise LDO Post Regulator Integrated Supercapacitor Balancer Up to 50mA of Output Current Programmable DC/DC and LDO Output Voltages, Buck UVLO, and Buck-Boost Peak Input Current Integrated Low Loss Full-Wave Bridge Rectifier Input Protective Shunt: Up to 25mA at VIN ≥ 20V 5mm × 5mm QFN-32 Package

Active Clamp Synchronous Forward Controller Features: Input Voltage Range: 8.5V to 100V Programmable Volt-Second Clamp High Efficiency Control: Active Clamp, Synchronous Rectification, Programmable Delays Short-Circuit (Hiccup Mode) Overcurrent Protection Programmable Soft-Start/Stop Programmable OVLO and UVLO with Hysteresis Programmable Frequency (100kHz to 500kHz) Synchronizable to an External Clock

Fixed Frequency SOT-23 Oscillator Features: No External Components to Set Frequency Frequency Error ±0.5% Typical Fast Start-Up Time: 100µs Typical ±20ppm/°C Temperature Stability Includes Output Enable Includes Divide by 1, 2 or 4 Rise Time: 0.5ns, CL = 5pF Timing Jitter: <0.8% Typical Duty Cycle: 50% ±2.5% IS = 8mA Typical (fOSC = 100MHz, CL = 5pF) CMOS Output Drives 600Ω Load Single Supply 2.7V to 5.5V Low Profile (1mm) ThinSOT™ Package

16-/14-/11-Bit 2.5Gsps DACs Features:80dBc SFDR at 70MHz fOUT>68dBc SFDR from DC to 1000MHz fOUT40mA Nominal Full-Scale, ±1V Output Compliant10mA to 60mA Adjustable Full-Scale Current RangeSingle or Dual Port DDR LVDS and DHSTL InterfaceLow Latency (7.5 Cycles for Single Port, 11 Cycles for Dual Port)>78dBc 2-Tone IMD from DC to 1000MHz fOUT–165dBc/Hz Additive Phase Noise at 1MHz Offset for 65MHz fOUT170-Lead (9mm × 15mm) BGA Package