MICROCONTROLLERS (MCU) - 16/32 BIT - ARM ROHS COMPLIANT: YES

The AD5683R/AD5682R/AD5681R/AD5683, members of thenanoDAC+? family, are low power, single-channel, 16-/14-/12-bitbuffered voltage out digital-to-analog converters (DACs). Thedevices, except the AD5683, include an enabled by default internal2.5 V reference, offering 2 ppm/?C drift. The output span can beprogrammed to be 0 V to VREF or 0 V to 2 ? VREF. All devicesoperate from a single 2.7 V to 5.5 V supply and are guaranteedmonotonic by design. The devices are available in a 2.00 mm ?2.00 mm, 8-lead LFCSP or a 10-lead MSOP.The internal power-on reset circuit ensures that the DAC registeris written to zero scale at power-up while the internal outputbuffer is configured in normal mode. TheAD5683R/AD5682R/AD5681R/AD5683 contain a power-downmode that reduces the current consumption of the device to 2 ?A(maximum) at 5 V and provides software selectable output loadswhile in power-down mode.The AD5683R/AD5682R/AD5681R/AD5683 use a versatile3-wire serial interface that operates at clock rates of up to 50 MHz.Some devices also include asynchronous RESET pin and VLOGICpin options, allowing 1.8 V compatibilityProduct Highlights High Relative Accuracy (INL). AD5683R/AD5683 (16-bit): ?2 LSB maximum. Low Drift, 2.5 V On-Chip Reference. 2 ppm/?C typical temperature coefficient. 5 ppm/?C maximum temperature coefficient. Two Package Options. 2.00 mm ? 2.00 mm, 8-lead LFCSP. 10-lead MSOP.Applications Process controls Data acquisition systems Digital gain and offset adjustment Programmable voltage sources

The ADG1408/ADG1409 are monolithic iCMOS® analog multiplexers comprising eight single channels and four differential channels, respectively. The ADG1408 switches one of eight inputs to a common output, as determined by the 3-bit binary address lines, A0, A1, and A2. The ADG1409 switches one of four differential inputs to a common differential output, as determined by the 2-bit binary address lines, A0 and A1. An EN input on both devices is used to enable or disable the device. When disabled, all channels are switched off.The industrial CMOS (iCMOS) modular manufacturing process combines high voltage complementary metal-oxide semiconductor (CMOS) and bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no other generation of high voltage parts has been able to achieve. Unlike analog ICs using conventional CMOS processes, iCMOS components can tolerate high supply voltages while providing increased performance, dramatically lower power consumption, and reduced package size.The ultralow on resistance and on resistance flatness of these switches make them ideal solutions for data acquisition and gain switching applications where low distortion is critical. iCMOS construction ensures ultralow power dissipation, making the parts ideally suited for portable and battery-powered instruments.Product Highlights 4 Ω on resistance. 0.5 Ω on-resistance flatness. 3 V logic compatible digital input, VIH = 2.0 V, VIL = 0.8 V. 16-lead TSSOP and 4 mm × 4 mm LFCSP. Applications Relay replacement Audio and video routing Automatic test equipment Data acquisition systems Temperature measurement systems Avionics Battery-powered systems Communication systems Medical equipment

Robust, Industrial, Low Latency and Low Power 10 Mbps, 100 Mbps, and 1 Gbps Ethernet PHY Features: 10BASE-Te/100BASE-TX/1000BASE-T IEEE® 802.3™ compliant MII, RMII, and RGMII MAC interfaces 1000BASE-T RGMII latency transmit < 68 ns, receive < 226 ns 100BASE-TX MII latency transmit< 52 ns, receive < 248 ns EMC test standards IEC 61000-4-5 surge (±4 kV) IEC 61000-4-4 electrical fast transient (EFT) (±4 kV) IEC 61000-4-2 ESD (±6 kV contact discharge) IEC 61000-4-6 conducted immunity (10 V) EN55032 radiated emissions (Class A) EN55032 conducted emissions (Class A) Unmanaged configuration using multilevel pin strapping EEE in accordance with IEEE 802.3az Start of packet detection for IEEE 1588 time stamp support Enhanced link detection Configurable LED Crystal oscillator frequency/25 MHz clock input frequency (50 MHz for RMII) 25 MHz/125 MHz synchronous clock output Small package and wide temperature range 40-lead, 6 mm × 6 mm LFCSP Specified for −40°C to +105°C ambient operation Low power consumption 330 mW for 1000BASE-T 140 mW for 100BASE-TX 3.3 V/2.5 V/1.8 V MAC interface VDDIO supply Integrated power supply monitoring and POR

The LTC6948 is a high performance, low noise, 6.39GHz phase-locked loop (PLL) with a fully integrated VCO, including a reference divider, phase-frequency detector (PFD), ultralow noise charge pump, fractional feedback divider, and VCO output divider.The fractional divider uses an advanced, 4th order ?? modulator which provides exceptionally low spurious levels. This allows wide loop bandwidths, producing extremely low integrated phase noise values.The programmable VCO output divider, with a range of 1 through 6, extends the output frequency range.Applications Wireless Basestations (LTE, WiMAX, W-CDMA, PCS) Microwave Data Links Military and Secure Radio Test and Measurement

Single, 16-Bit nanoDAC with 5 ppm/C On-Chip Reference Features: Low power, single nanoDAC AD5660: 16 bits 12-Bit Accuracy Guaranteed On-chip, 1.25 V/2.5 V, 5 ppm/°C reference Tiny 8-lead SOT-23/MSOP packages Power-down to 480 nA @ 5 V, 200 nA @ 3 V 3 V/5 V single power supply Guaranteed 16-bit monotonic by design Power-on reset to zero/midscale 3 power-down functions Serial interface with Schmitt-triggered inputs Rail-to-rail operation SYNC interrupt facility

The ADV7180 automatically detects and converts standard analog baseband television signals compatible with worldwide NTSC, PAL, and SECAM standards into 4:2:2 component video data compatible with the 8-bit ITU-R BT.656 interface standard.The simple digital output interface connects gluelessly to a wide range of MPEG encoders, codecs, mobile video processors, and Analog Devices, Inc., digital video encoders, such as the ADV7391. External HS, VS, and FIELD signals provide timing references for LCD controllers and other video ASICs, if required. Accurate 10-bit analog-to-digital conversion provides professional quality video performance for consumer applications with true 8-bit data resolution. Three analog video input channels accept standard composite, S-video, or component video signals, supporting a wide range of consumer video sources. AGC and clamp-restore circuitry allow an input video signal peak-to-peak range to 1.0 V. Alternatively, these can be bypassed for manual settings.The line-locked clock output allows the output data rate, timing signals, and output clock signals to be synchronous, asynchronous, or line locked even with ?5% line length variation. Output control signals allow glueless interface connections in many applications. The ADV7180 is programmed via a 2-wire, serial bidirectional port (I2C? compatible) and is fabricated in a 1.8 V CMOS process. Its monolithic CMOS construction ensures greater functionality with lower power dissipation. LFCSP package options makes the decoder ideal for space-constrained portable applications. A 64-lead LQFP package is pin compatible with the ADV7181C.The 48-Lead LQFP, 40-lead LFCSP, and 32-lead LFCSP use one pin to output VS or FIELD.APPLICATIONS Digital camcorders and PDAs Low cost SDTV PIP decoder for digital TVs Multichannel DVRs for video security AV receivers and video transcoding PCI-/USB-based video capture and TV tuner cards Personal media players and recorders Smartphone/multimedia handsets In-car/automotive infotainment units Rearview camera/vehicle safety systems

Analogue Switch ICs 1.8V to 5.5V 2:1 Mux/SPDT Switch I.C.

The ADG1208 and ADG1209 are monolithic, iCMOS® analogmultiplexers comprising eight single channels and four differentialchannels, respectively. The ADG1208 switches one of eight inputsto a common output as determined by the 3-bit binary addresslines A0, A1, and A2. The ADG1209 switches one of fourdifferential inputs to a common differential output as determinedby the 2-bit binary address lines A0 and A1. An EN input onboth devices enable or disable the device. When disabled, allchannels are switched off. When on, each channel conductsequally well in both directions and has an input signal rangethat extends to the supplies.The iCMOS (industrial CMOS) modular manufacturingprocess combines high voltage CMOS (complementary metal-oxidesemiconductor) and bipolar technologies. It enables thedevelopment of a wide range of high performance analog ICscapable of 33 V operation in a footprint that no other generationof high voltage devices has been able to achieve. Unlike analogICs using conventional CMOS processes, iCMOS componentscan tolerate high supply voltages while providing increasedperformance, dramatically lower power consumption, andreduced package size.The ultralow capacitance and exceptionally low charge injectionof these multiplexers make them ideal solutions for data acquisitionand sample-and-hold applications, where low glitch and fastsettling are required. There is minimum chargeinjection over the entire signal range of the device. iCMOSconstruction also ensures ultralow power dissipation, making theds ideally suited for portable and battery-powered instruments.Applications Audio and video routing Automatic test equipment Data-acquisition systems Battery-powered systems Sample-and-hold systems Communication systems

The AD9680 is a dual, 14-bit, 1.25 GSPS/1 GSPS/820 MSPS/500 MSPS analog-to-digital converter (ADC). The device has an on-chip buffer and sample-and-hold circuit designed for low power, small size, and ease of use. This device is designed for sampling wide bandwidth analog signals of up to 2 GHz. The AD9680 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package.The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations.The analog input and clock signals are differential inputs. Each ADC data output is internally connected to two digital down-converters (DDCs). Each DDC consists of up to five cascaded signal processing stages: a 12-bit frequency translator (NCO), and four half-band decimation filters. The DDCs are bypassed by default.In addition to the DDC blocks, the AD9680 has several functions that simplify the automatic gain control (AGC) function in the communications receiver. The programmable threshold detector allows monitoring of the incoming signal power using the fast detect output bits of the ADC. If the input signal level exceeds the programmable threshold, the fast detect indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition at the ADC input.Users can configure the Subclass 1 JESD204B-based high speed serialized output in a variety of one-, two-, or four-lane configurations, depending on the DDC configuration and the acceptable lane rate of the receiving logic device. Multiple device synchronization is supported through the SYSREF? and SYNCINB? input pins.The AD9680 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using a 1.8 V to 3.3 V capable, 3-wire SPI.The AD9680 is available in a Pb-free, 64-lead LFCSP and is specified over the ?40?C to +85?C industrial temperature range. This product is protected by a U.S. patent.PRODUCT HIGHLIGHTS Wide full power bandwidth supports IF sampling of signals up to 2 GHz. Buffered inputs with programmable input termination eases filter design and implementation. Four integrated wideband decimation filters and numerically controlled oscillator (NCO) blocks supporting multiband receivers. Flexible serial port interface (SPI) controls various product features and functions to meet specific system requirements. Programmable fast overrange detection. 9 mm ? 9 mm, 64-lead LFCSP.APPLICATIONS Communications Diversity multiband, multimode digital receivers 3G/4G, TD-SCDMA, W-CDMA, GSM, LTE General-purpose software radios Ultrawideband satellite receivers Instrumentation Radars Signals intelligence (SIGINT) DOCSIS 3.0 CMTS upstream receive paths HFC digital reverse path receivers