The AD9162 is a high performance, 16-bit digital-to-analog converter (DAC) that supports data rates to 6 GSPS. The DAC core is based on a quad-switch architecture coupled with a 2× interpolator filter that enables an effective DAC update rate of up to 12 GSPS in some modes. The high dynamic range and bandwidth makes these DACs ideally suited for the most demanding high speed radio frequency (RF) DAC applications.In baseband mode, wide bandwidth capability combines with high dynamic range to support DOCSIS 3.1 cable infrastructure compliance from the minimum of two carriers to full maximum spectrum of 1.794 GHz. A 2× interpolator filter (FIR85) enables the AD9161/AD9162 to be configured for lower data rates and converter clocking to reduce the overall system power and ease the filtering requirements. In Mix-Mode™ operation, the AD9161/AD9162 can reconstruct RF carriers in the second and third Nyquist zones up to 7.5 GHz while still maintaining exceptional dynamic range. The output current can be programmed from 8 mA to 38.76 mA. The AD9161/AD9162 data interface consists of up to eight JESD204B serializer/deserializer (SERDES) lanes that are programmable in terms of lane speed and number of lanes to enable application flexibility.A serial peripheral interface (SPI) can configure the AD9161/AD9162 and monitor the status of all registers. The AD9161/AD9162 are offered in an 165-ball, 8.0 mm × 8.0 mm, 0.5 mm pitch, CSP_BGA package and in an 169-ball, 11 mm × 11 mm, 0.8 mm pitch, CSP_BGA package, including a leaded ball option for the AD9162.Product Highlights High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 7.5 GHz. Up to eight lanes JESD204B SERDES interface flexible in terms of number of lanes and lane speed. Bandwidth and dynamic range to meet DOCSIS 3.1 compliance with margin.Applications Broadband communications systems DOCSIS 3.1 cable modem termination system (CMTS)/video on demand (VOD)/edge quadrature amplitude modulation (EQAM) Wireless communications infrastructure W-CDMA, LTE, LTE-A, point to point Instrumentation, automatic test equipment (ATE) Radars and jammers

The AD9234 is a dual, 12-bit, 1 GSPS/500 MSPS ADC. The device has an on-chip buffer and sample-and-hold circuit designed for low power, small size, and ease of use. This product is designed for sampling wide bandwidth analog signals. The AD9234 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package.The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth buffered inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. Each ADC data output is internally connected to an optional decimate-by-2 block. The AD9234 has several functions that simplify the automatic gain control (AGC) function in a communications receiver. The programmable threshold detector allows monitoring of the incoming signal power using the fast detect output bits of the ADC. If the input signal level exceeds the programmable threshold, the fast detect indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition at the ADC input. In addition to the fast detect outputs, the AD9234 also offers signal monitoring capability. The signal monitoring block provides additional information about the signal being digitized by the ADC.Users can configure the Subclass 1 JESD204B-based high speed serialized output in a variety of one-, two-, or four-lane configurations, depending on the acceptable lane rate of the receiving logic device and the sampling rate of the ADC. Multiple device synchronization is supported through the SYSREF± and SYNCINB± input pins.The AD9234 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using a 1.8 V to 3.3 V capable 3-wire SPI.The AD9234 is available in a Pb-free, 64-lead LFCSP and is specified over the −40°C to +85°C industrial temperature range. This product is protected by a U.S. patent.PRODUCT HIGHLIGHTS Low power consumption analog core, 12-bit, 1.0 GSPS dual analog-to-digital converter (ADC) with 1.5 W per channel. Wide full power bandwidth supports IF sampling of signals up to 2 GHz. Buffered inputs with programmable input termination eases filter design and implementation. Flexible serial port interface (SPI) controls various product features and functions to meet specific system requirements. Programmable fast overrange detection. 9 mm × 9 mm 64-lead LFCSP. Pin compatible with the AD9680 14-bit, 1 GSPS dual ADC.APPLICATIONS Communications Diversity multiband, multimode digital receivers 3G/4G, TD-SCDMA, W-CDMA, GSM, LTE Point-to-point radio systems Digital predistortion observation path General-purpose software radios Ultrawideband satellite receiver Instrumentation (spectrum analyzers, network analyzers, integrated RF test solutions) Digital oscilloscopes High speed data acquisition systems DOCSIS 3.0 CMTS upstream receive paths HFC digital reverse path receivers

The AD9528 is a two-stage PLL with an integrated JESD204B/JESD204C SYSREF generator for multiple device synchronization. The first stage phase-locked loop (PLL) (PLL1) provides input reference conditioning by reducing the jitter present on a system clock. The second stage PLL (PLL2) provides high frequency clocks that achieve low integrated jitter as well as low broadband noise from the clock output drivers. The external VCXO provides the low noise reference required by PLL2 to achieve the restrictive phase noise and jitter requirements necessary to achieve acceptable performance. The on-chip VCO tunes from 3.450 GHz to 4.025 GHz. The integrated SYSREF generator outputs single shot, N-shot, or continuous signals synchronous to the PLL1 and PLL2 outputs to time align multiple devices.The AD9528 generates six outputs (Output 0 to Output 3, Output 12, and Output 13) with a maximum frequency of 1.25 GHz, and eight outputs with a maximum frequency of up to 1 GHz. Each output can be configured to output directly from PLL1, PLL2, or the internal SYSREF generator. Each of the 14 output channels contains a divider with coarse digital phase adjustment and an analog fine phase delay block that allows complete flexibility in timing alignment across all 14 outputs. The AD9528 can also be used as a dual input flexible buffer to distribute 14 device clock and/or SYSREF signals. At power-up, the AD9528 sends the VCXO signal directly to Output 12 and Output 13 to serve as the power-up ready clocks.APPLICATIONS High performance wireless transceivers LTE and multicarrier GSM base stations Wireless and broadband infrastructure Medical instrumentation Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs; supports JESD204B/JESD204C Low jitter, low phase noise clock distribution ATE and high performance instrumentation

The AD9680 is a dual, 14-bit, 1.25 GSPS/1 GSPS/820 MSPS/500 MSPS analog-to-digital converter (ADC). The device has an on-chip buffer and sample-and-hold circuit designed for low power, small size, and ease of use. This device is designed for sampling wide bandwidth analog signals of up to 2 GHz. The AD9680 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package.The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations.The analog input and clock signals are differential inputs. Each ADC data output is internally connected to two digital down-converters (DDCs). Each DDC consists of up to five cascaded signal processing stages: a 12-bit frequency translator (NCO), and four half-band decimation filters. The DDCs are bypassed by default.In addition to the DDC blocks, the AD9680 has several functions that simplify the automatic gain control (AGC) function in the communications receiver. The programmable threshold detector allows monitoring of the incoming signal power using the fast detect output bits of the ADC. If the input signal level exceeds the programmable threshold, the fast detect indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition at the ADC input.Users can configure the Subclass 1 JESD204B-based high speed serialized output in a variety of one-, two-, or four-lane configurations, depending on the DDC configuration and the acceptable lane rate of the receiving logic device. Multiple device synchronization is supported through the SYSREF± and SYNCINB± input pins.The AD9680 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using a 1.8 V to 3.3 V capable, 3-wire SPI.The AD9680 is available in a Pb-free, 64-lead LFCSP and is specified over the −40°C to +85°C industrial temperature range. This product is protected by a U.S. patent.PRODUCT HIGHLIGHTS Wide full power bandwidth supports IF sampling of signals up to 2 GHz. Buffered inputs with programmable input termination eases filter design and implementation. Four integrated wideband decimation filters and numerically controlled oscillator (NCO) blocks supporting multiband receivers. Flexible serial port interface (SPI) controls various product features and functions to meet specific system requirements. Programmable fast overrange detection. 9 mm × 9 mm, 64-lead LFCSP.APPLICATIONS Communications Diversity multiband, multimode digital receivers 3G/4G, TD-SCDMA, W-CDMA, GSM, LTE General-purpose software radios Ultrawideband satellite receivers Instrumentation Radars Signals intelligence (SIGINT) DOCSIS 3.0 CMTS upstream receive paths HFC digital reverse path receivers

The ADA4610-1/ADA4610-2/ADA4610-4 are precision junction field effect transistor (JFET) amplifiers that feature low input noise voltage, current noise, offset voltage, input bias current, and rail-to-rail output. The ADA4610-1 is a single amplifier, the ADA4610-2 is a dual amplifier, and the ADA4610-4 is a quad amplifier.The combination of low offset, noise, and very low input bias current makes these amplifiers especially suitable for high impedance sensor amplification and precise current measurements using shunts. With excellent dc precision, low noise, and fast settling time, the ADA4610-1/ADA4610-2/ADA4610-4 provide superior accuracy in medical instruments, electronic measurement, and automated test equipment. Unlike many competitive amplifiers, the ADA4610-1/ADA4610-2/ADA4610-4 maintain fast settling performance with substantial capacitive loads. Unlike many older JFET amplifiers, the ADA4610-1/ADA4610-2/ADA4610-4 do not suffer from output phase reversal when input voltages exceed the maximum common-mode voltage range. The fast slew rate and great stability with capacitive loads make the ADA4610-1/ADA4610-2/ADA4610-4 ideal for high performance filters. Low input bias currents, low offset, and low noise result in a wide dynamic range for photodiode amplifier circuits. Low noise and distortion, high output current, and excellent speed make the ADA4610-1/ADA4610-2/ ADA4610-4 great choices for audio applications.The ADA4610-1/ADA4610-2/ADA4610-4 are specified over the −40°C to +125°C extended industrial temperature range.The ADA4610-1 is available in an 8-lead SOIC package and in a 5-lead SOT-23 package. The ADA4610-2 is available in 8-lead SOIC, 8-lead MSOP, and 8-lead LFCSP packages. The ADA4610-4 is available in a 14-lead SOIC package and in a 16-lead LFCSP.Applications Instrumentation Medical instruments Multipole filters Precision current measurement Photodiode amplifiers Sensors Audio

The ADA4610-1/ADA4610-2/ADA4610-4 are precision junction field effect transistor (JFET) amplifiers that feature low input noise voltage, current noise, offset voltage, input bias current, and rail-to-rail output. The ADA4610-1 is a single amplifier, the ADA4610-2 is a dual amplifier, and the ADA4610-4 is a quad amplifier.The combination of low offset, noise, and very low input bias current makes these amplifiers especially suitable for high impedance sensor amplification and precise current measurements using shunts. With excellent dc precision, low noise, and fast settling time, the ADA4610-1/ADA4610-2/ADA4610-4 provide superior accuracy in medical instruments, electronic measurement, and automated test equipment. Unlike many competitive amplifiers, the ADA4610-1/ADA4610-2/ADA4610-4 maintain fast settling performance with substantial capacitive loads. Unlike many older JFET amplifiers, the ADA4610-1/ADA4610-2/ADA4610-4 do not suffer from output phase reversal when input voltages exceed the maximum common-mode voltage range. The fast slew rate and great stability with capacitive loads make the ADA4610-1/ADA4610-2/ADA4610-4 ideal for high performance filters. Low input bias currents, low offset, and low noise result in a wide dynamic range for photodiode amplifier circuits. Low noise and distortion, high output current, and excellent speed make the ADA4610-1/ADA4610-2/ ADA4610-4 great choices for audio applications.The ADA4610-1/ADA4610-2/ADA4610-4 are specified over the −40°C to +125°C extended industrial temperature range.The ADA4610-1 is available in an 8-lead SOIC package and in a 5-lead SOT-23 package. The ADA4610-2 is available in 8-lead SOIC, 8-lead MSOP, and 8-lead LFCSP packages. The ADA4610-4 is available in a 14-lead SOIC package and in a 16-lead LFCSP.Applications Instrumentation Medical instruments Multipole filters Precision current measurement Photodiode amplifiers Sensors Audio

The ADA4806-1 is a high speed, voltage feedback, rail-to-rail output, single operational amplifier with three power modes: full power mode, sleep mode, and shutdown mode. In full power mode, this amplifier provides a wide bandwidth of 105 MHz at a gain of +1, a fast slew rate 160 V/μs, and excellent dc precision with a low input offset voltage of 125 μV (maximum) and an input offset voltage drift of 1.5 μV/°C (maximum), while consuming only 500 μA of quiescent current. Despite being a low power amplifier, the ADA4806-1 provides excellent overall performance, making it ideal for low power, high resolution data conversion systems.For data conversion applications where minimizing power dissipation is paramount, the ADA4806-1 offers a method to reduce power by dynamically scaling the quiescent power of the ADC driver with the sampling rate of the system by switching the amplifier to a lower power mode between samples.Sleep mode reduces the amplifier quiescent current to 74 μA and provides a fast turn-on time of only 0.45 μs, enabling the use of dynamic power scaling for sample rates approaching 2 MSPS. For additional power savings at lower samples rates, the shutdown mode further reduces the quiescent current to only 2.9 μA.The ADA4806-1 operates over a wide range of supply voltages and is fully specified at supplies of 3 V, 5 V and ±5 V. This amplifier is available in a compact, 8-lead SOT-23 package and is rated to operate over the industrial temperature range of −40°C to +125°C.Applications Portable and battery-powered instruments and systems High channel density data acquisition systems Precision analog-to-digital converter (ADC) drivers Voltage reference buffers Portable point of sales terminals Active RFID readers

The ADA4807-1 is a low power, low noise, rail-to-rail voltage feedback amplifier with exceptionally high performance. It is designed to have the lowest input noise (3.1 nV/√Hz and 0.7 pA/√Hz) among high speed, rail-to-rail amplifiers in the industry while operating on only 1 mA or less of quiescent supply current, making it ideal for a wide range of applications from battery-powered, portable instrumentation to high speed systems where component density requires lower power dissipation. The ADA4807-1 operates over a wide range of supply voltages from ±1.5 V to ±5 V, as well as from +3 V to +10 V single supplies, and includes a disable feature that allows reduction of the typical quiescent supply current to 2.4 μA when asserted.For systems with high dynamic range signals, the output voltage swings to within 50 mV of each rail, maximizing the output dynamic range, and the full, rail-to-rail input stage permits input operation up to and beyond the supply rails.The ADA4807-1 features high speed performance of 200 MHz small signal −3 dB bandwidth, a 225 V/μs slew rate, and a settling time of 47 ns to 0.1% (4 V step) with a low input offset voltage of 125 μV (maximum) and 0.7 μV/°C drift. For ±5 V supplies, the HD2 is −112 dBc and HD3 is –115 dBc for a 2 V p-p, 100 kHz output signal driving a 1 kΩ load. The low distortion and fast settling time makes this amplifier ideal for driving high speed single-supply precision ADCs with up to 18-bit resolution. The ADA4807-1 delivers this excellent performance while consuming 1 mA or less of quiescent.The ADA4807-1 (single) is available in space-saving 6-lead SC70 and 6-lead SOT-23 packages, and each operates over the −40°C to +125°C industrial temperature range.Applications High speed, battery operated systems High component density systems High resolution analog-to-digital converter (ADC) drivers Portable test instruments Active filters

The ADA4961 is a high performance, BiCMOS RF digital gain amplifier (DGA), optimized for driving heavy loads out to 2.0 GHz and beyond. The device typically achieves −90 dBc IMD3 performance at 500 MHz and −85 dBc at 1.5 GHz. This RF performance allows GHz converters to achieve their optimum performance with minimal limitations of the driver amplifier or constraints on overall power that typically result from GaAs amplifiers. This device can easily drive 10-bit to 16-bit HS converters.For many receiver applications, antialias filter (AAF) designs can be simplified or not required.The ADA4961 has an internal differential input impedance of 100 Ω and a differential dynamic output impedance of 50 Ω, eliminating the need for external termination resistors. The digital adjustability provides for 1 dB resolution, thus optimizing the signal-to-noise ratio (SNR) for input levels spanning 21 dB.The ADA4961 is optimized for wideband, low distortion performance at frequencies up to 2 GHz. These attributes, together with wide gain adjustment and relatively low power, make the ADA4961 the amplifier of choice for many high speed applications, including IF, RF, and broadband applications where dynamic range at very high frequencies is critical.The ADA4961 is ideally suited for driving not only analog-to-digital converters (ADCs), but also mixers, pin diode attenuators, SAW filters, and multielement discrete devices. It is available in a 4 mm × 4 mm, 24-lead LFCSP and operates over a temperature range of −40°C to +85°C. Applications ADC driver for 10-bit to 14-bit GSPS converters RF/IF gain blocks Line drivers Instrumentation Satellite communications Data acquisition Military systems

The ADCMP380 is an ultralow power voltage comparator with internal reference suitable for use in general-purpose applications. The ultralow power consumption of this device makes it suitable for power efficiency sensitive systems, such as battery-powered portable devices and energy meters.The ADCMP380 is available with a 0.5 V and 1 V internal reference with ±2.2% and ±1.6% accuracy, respectively, over the full temperature range; this internal reference enables the device to monitor the node of interest accurately to 0.5 V. The enable input allows the user to hold the output low regardless of thestate of the input.The ADCMP380 is available in a 6-ball, 1.46 mm × 0.96 mm WLCSP and is specified over the temperature range of −40°C to +85°C.APPLICATIONS Portable/battery-operated equipment Battery monitors Energy harvesting