40V Low IQ, 3MHz Dual, 2-Phase Synchronous Step-Down Controller with Spread Spectrum Features: Wide Input Voltage Range: 4.5V to 40V Wide Output Voltage Range: 0.8V to 99% • VIN Low Operating IQ: 14μA (14V to 3.3V, Channel 1 On) Spread Spectrum Operation RSENSE or DCR Current Sensing Out-of-Phase Controllers Reduce Required Input Capacitance and Power Supply Induced Noise Programmable Fixed Frequency (100kHz to 3MHz) Phase-Lockable Frequency (100kHz to 3MHz) Selectable Continuous, Pulse-Skipping, or Low Ripple, Burst Mode® Operation at Light Loads Very Low Dropout Operation: 99% Duty Cycle Power Good Output Voltage Monitors Output Overvoltage Protection Internal LDO Powers Gate Drive from VIN or EXTVCC Low Shutdown IQ: 1.5μA Small 28-Lead 4mm × 5mm QFN Package AEC-Q100 Qualified for Automotive Applications

Quad 31.25A or Single 125A Module Regulator with Digital Power System Management Features: Quad Digitally Adjustable Analog Loops with Digital Interface for Control and Monitoring Wide Input Voltage Range: 4.5V to 16V Output Voltage Range: 0.5V to 3.3V ±0.5% Maximum DC Output Error Over Temperature ±4% Current Readback Accuracy: 0°C to 125°C Integrated Input Current Sense Amplifier 400kHz PMBus-Compliant I2C Serial Interface Supports Telemetry Polling Rates Up to 125Hz Integrated 16-Bit ΔΣ ADC Parallel and Current Share Multiple Modules 15mm × 22mm × 8.17mm BGA Package Readable Data: Input and Output Voltages, Currents, and Temperatures Running Peak Values, Uptime, Faults and Warnings Onboard EEPROM Fault Log Record Writable Data and Configurable Parameters: Output Voltage, Voltage Sequencing and Margining Digital Soft-Start/Stop Ramp, Program Analog Loop OV/UV/OT, UVLO, Frequency and Phasing

40V, 7A Ideal Diode Features: Reduces Power Dissipation by Replacing a Power Schottky Diode with No External Components Internal 7A, 21mΩ N-Channel MOSFET 15mV Regulated Forward Voltage 20μA Operating Current, 0.8μA Shutdown Wide 0V to 40V Input Range with VCC > 2.75V Fast Turn-On Minimizes Voltage Droop Fast Reverse Recovery Time Minimizes Reverse Transient Current Smooth Switchover in Diode-OR Applications 16-Lead 2mm × 3mm LQFN Package

Ultrathin Low VIN, 2A Buck-Boost Module Regulator Features: Wide Input Voltage Range: 2.6V to 5.5V Adjustable Output Voltage Range: 1.8V to 5.5V 2A of Continuous Output Current with VIN ≥ VOUT (Buck Mode and Buck-Boost Mode); Minimum 1A Continuous Output Current with VIN < VOUT (Boost Mode). Low Ripple Buck-Boost Architecture Programmable Soft-Start and VIN UVLO Burst Mode IQ 15μA for High Efficiency at Light Loads Ultrathin, Small Surface Mount Footprint 3.5mm × 4mm × 1.25mm LGA Package

42V, 5A/7A Peak Synchronous Step-Down Silent Switcher with 2.5A Quiescent Current Features: Silent Switcher® Architecture Ultralow EMI Emissions Optional Spread Spectrum Modulation High Efficiency at High Frequency Up to 96% Efficiency at 1MHz, 12VIN to 5VOUT Up to 95% Efficiency at 2MHz, 12VIN to 5VOUT Wide Input Voltage Range: 3.4V to 42V 5A Maximum Continuous, 7A Peak Transient Output Ultralow Quiescent Current Burst Mode® Operation 2.5µA IQ Regulating 12VIN to 3.3VOUT Output Ripple < 10mVP-P Fast Minimum Switch On-Time: 30ns Low Dropout Under All Conditions: 100mV at 1A Forced Continuous Mode Adjustable and Synchronizable: 200kHz to 3MHz Output Soft-Start and Power Good Small 20-Lead 4mm × 3mm LQFN Package AEC-Q100 Qualified for Automotive Applications

36V 10W No-Opto Isolated Flyback Converter Features: 4V to 36V Input Voltage Range 3.6A, 65V Internal DMOS Power Switch Low Quiescent Current Quasi-Resonant Boundary Mode Operation at Heavy Load Low Ripple Burst Mode® Operation at Light Load Minimum Load < 0.5% (Typ) of Full Output No Transformer Third Winding or Opto-Isolator Required for Output Voltage Regulation Accurate EN/UVLO Threshold and Hysteresis Temperature Compensation for Output Diode Output Short-Circuit Protection Thermally Enhanced 8-Lead SO Package

Three ADCs, One DAC, Low Power Codec with Audio DSPs Features: Programmable FastDSP audio processing engine Up to 768 kHz sample rate Biquad filters, limiters, volume controls, mixing Tensilica HiFi 3z DSP core Quad MAC per cycle: 24 x 24-bit multiplier and 64-bit accumulator Flexible power operation mode: 24.576 MHz, 49.152 MHz, 73.728 MHz, and 98.304 MHz 336 kB total memory JTAG debug and trace Low latency, 24-bit ADCs and DAC 106 dB SNR (signal through ADC with A-weighted filter) 110 dB combined SNR (signal through DAC and headphone with A-weighted filter) Programmable double precision MAC engine for maximum 24-stage equalizer Serial port sample rates from 8 kHz to 768 kHz 5 μs group delay (fS = 768 kHz) analog in to analog out with FastDSP bypass (zero instructions) 3 differential or single-ended analog inputs, configurable as microphone or line inputs 8 digital microphone inputs Analog differential audio output, configurable as either line output or headphone drive 2 PDM output channels PLL supporting any input clock rate from 30 kHz to 36 MHz 4 channel asynchronous sample rate converters (ASRCs) 2, 16-channel serial audio ports supporting I2S, left justified, right justified, or up to TDM16 (TDM12 in Turbo mode) 8 interpolators and 8 decimators with flexible routing Power supplies Analog AVDD at 1.8 V typical Digital I/O IOVDD at 1.1 V to 1.98 V Digital DVDD at 0.85 V to 1.21 V Headphone HPVDD at 1.8 V typical Headphone HPVDD_L at 1.2 V to HPVDD Control/communication interfaces I2C, SPI, or UART control ports Master quad SPI (QSPI) UART communication port Self-boot from QSPI flash Flexible GPIO and IRQ 56-ball, 0.35 mm pitch, 2.980 mm × 2.679 mm WLCSP

Stereo PDM to I2S/TDM Converter Features: 2 channels of PDM audio inputs from digital microphones 64× decimation ratio of PDM to PCM audio data 24-bit resolution to support high sound pressure level (SPL) microphones 126 dB A-weighted SNR 4 kHz to 96 kHz output sampling rate Bit clock rates of 64×, 128×, 192×, 256×, 384×, or 512× the output sampling rate Automatic PDM clock generation Automatic power-down when BCLK is removed 0.36 mA DVDD operating current at 48 kHz sampling rate and 1.8 V supply Slave I2S or TDM output interface Up to TDM-16 supported Configurable TDM slots I/O supply voltage from 1.70 V to 3.63 V DVDD core supply voltage from 1.10 V to 1.98 V 4 μA typical DVDD shutdown current 9-ball, 1.26 mm × 1.26 mm, 0.4 mm pitch WLCSP Power-on reset

8 Channel, PDM to I2S/TDM Converter Features: 8 channels of PDM audio inputs from digital microphones 16×, 32×, or 64× decimation ratio of PDM to PCM audio data 24-bit resolution to support high sound pressure level (SPL) microphones 126 dB A-weighted SNR 4 kHz to 192 kHz output sampling rate Bit clock rates of 64×, 128×, 192×, 256×, 384×, or 512× the output sampling rate Dual output PDM clocks Automatic PDM clock generation Automatic power-down when BCLK removed Selectable I2C control or hardware mode operation 1.2 mA DVDD operating current for 8 channels at 48 kHz frequency sampling rate and 1.8 V supply Slave I2S or TDM output interface Up to TDM-16 supported Configurable TDM slot routing and sizes I/O supply voltage from 1.70 V to 3.63 V DVDD supply voltage from 1.10 V to 1.98 V <5 μA typical DVDD shutdown current 16-lead, 3 mm × 3 mm, 0.50 mm pitch LFCSP Power-on reset

18-Cell Battery Monitor with Daisy Chain Interface Features: Measures up to 18 battery cells in series 3 mV maximum total measurement error Stackable architecture for high voltage systems Built-in isoSPI interface 1 Mb isolated serial communications Uses a single twisted pair, up to 100 meters Low EMI susceptibility and emissions Bidirectional for broken wire protection 290 μs to measure all cells in a system Synchronized voltage and current measurement 16-bit Δ-Σ ADC with programmable third-order noise filter Passive cell balancing up to 200 mA (maximum) with programmable pulsewidth modulation 9 general purpose digital I/O or analog inputs Temperature or other sensor inputs Configurable as an I2C or SPI master 6 μA sleep mode supply current 64-lead LQFP_EP package