16-Bit, 100 kSPS PulSAR, Differential ADC in MSOP Features: 16-bit resolution with no missing codes Throughput: 100 kSPS INL: ±1 LSB typical, ±3 LSB maximum True differential analog input range: ±VREF 0 V to VREF with VREF up to VDD on both inputs Single-supply operation: 2.7 V to 5.5 V Standby current: 1 nA Serial interface SPI®-/QSPI-™/MICROWIRE-™/DSP-compatible Power dissipation  4 mW @ 5 V  1.5 mW @ 2.7 V  150 μW @ 2.7 V/10 kSPS 8-lead MSOP package

16-Bit, 0.5 LSB, 500 kSPS PulSAR Differential A/D Converter in MSOP/QFN Features: 16-bit resolution with no missing codes Throughput: 500 kSPS INL/DNL: ±0.25 LSB typ, ±0.5 LSB max (±8 ppm of FSR) Dynamic range: 96.5 dB SINAD: 96 dB at 1 kHz THD: −120 dB at 1 kHz True differential analog input range: ±VREF 0 V to VREF with VREF up to VDD on both inputs No pipeline delay Single-supply 5 V operation with 1.8 V/2.5 V/3 V/5 V logic interface Proprietary serial interface SPI®-/QSPI™-/MICROWIRE™-/DSP-compatible Daisy-chain multiple ADCs, selectable busy indicator Power dissipation: 40 nJ/conversion 40 μW at 5 V/1 kSPS 4 mW at 5 V/100 kSPS 18 mW at 5 V/500 kSPS Standby current: 1 nA 10-lead package: MSOP (MSOP-8 size) Pin-for-pin compatible with the 16-bit AD7687 and AD7688 and the 18-bit AD7690 and AD7691

3V/5V, 1mW, 3-Channel Pseudo Differential, 16-Bit Sigma-Delta ADC Features: Three Pseudo Differential Input Channel ADCs 16 Bits No Missing Codes 0.003% Nonlinearity Programmable Gain Front End Gains from 1 to 128 Three-Wire Serial Interface SPI®, QSPI™, MICROWIRE™ and DSP Compatible Schmitt Trigger Input on SCLK See data sheet for additional features

24-bit, 2 Channel Capacitance to Digital Converter Features:New standard in single chip solutions Interfaces to single or differential floating sensors Resolution down to 4 aF (that is, up to 21 ENOB) Accuracy: 4 fF Linearity: 0.01% Common-mode (not changing) capacitance up to 17 pF Full-scale (changing) capacitance range: 4 pF Tolerant of parasitic capacitance to ground up to 60 pF Update rate: 10 Hz to 90 Hz Simultaneous 50 Hz and 60 Hz rejection at 16 Hz Temperature sensor on-chip Resolution: 0.1C, accuracy: 2C Voltage input channel Internal clock oscillator 2-wire serial interface (I2C-compatible) Power 2.7 V to 5.25 V single-supply operation 0.7 mA current consumption Operating temperature: 40C to +125C 16-lead TSSOP package

3-Channel, Low Noise, Low Power, 16-Bit, Sigma Delta ADC with On-Chip In-Amp Features: RMSnoise:  27 nV at 4.17 Hz (AD7799)  65 nV at 16.7 Hz (AD7799)  40 nV at 4.17 Hz (AD7798)  85 nV at 16.7 Hz (AD7798) Current: 380 μA typical Power-down: 1 μA maximum Low noise, programmable gain, instrumentation amp Internal clock oscillator Simultaneous 50 Hz/60 Hz rejection Reference detect Low-side power switch Programmable digital outputs Burnout currents Power supply: 2.7 V to 5.25 V Update rate: 4.17 Hz to 470 Hz 3 differential inputs

Touch Screen Digitizer Features: 4-wire touch screen interface Specified throughput rate of 125 kSPS Low power consumption: 1.37 mW max at 125 kSPS with VCC = 3.6 V Single supply, VCC of 2.2 V to 5.25 V Ratiometric conversion High speed serial interface Programmable 8-bit or 12-bit resolution 2 auxiliary analog inputs Shutdown mode: 1 µA max 16-lead QSOP and TSSOP packages

14-Bit, 250 kSPS PulSAR, Pseudo Differential ADC in MSOP/LFCSP Features: 14-bit resolution with no missing codes Throughput: 250 kSPS INL: ±0.4 LSB typical, ±1 LSB maximum (±0.0061% of FSR) SINAD: 85 dB @ 20 kHz THD: −100 dB @ 20 kHz Pseudo differential analog input range 0 V to VREF with VREF up to VDD No pipeline delay See Data Sheet for Additional Information

LF2.7 GHz RF/IF Gain and Phase Detector Features: Measures Gain/Loss and Phase up to 2.7 GHz Dual Demodulating Log Amps and Phase Detector Input Range –60 dBm to 0 dBm in a 50 Ω System Accurate Gain Measurement Scaling (30 mV/dB) Typical Nonlinearity < 0.5 dB Accurate Phase Measurement Scaling (10 mV/Degree) Typical Nonlinearity < 1 Degree Measurement/Controller/Level Comparator Modes Operates from Supply Voltages of 2.7 V–5.5 V Stable 1.8 V Reference Voltage Output Small Signal Envelope Bandwidth from DC to 30 MHz

16-Bit, 15 MSPS, Module Data Acquisition Solution Features: Integrated fully differential ADC driver with signal scaling Wide input common range High common-mode rejection Single-ended to differential conversion 2.048 V input range with 4.096 V REFBUF Critical passive components 0.005% precision matched resistor array for FDA 9 mm × 9 mm, 0.8 mm pitch, 100-ball BGA package 4× footprint reduction versus discrete solution Low power, dynamic power scaling, power-down mode 143 mW typical at 15 MSPS Throughput: 15 MSPS, no pipeline delay INL: 0.4 LSB typical, 1 LSB maximum SINAD: 89 dB typical at 1 kHz THD: 115 dB at 1 kHz, 106 dB at 400 kHz Gain error: 0.005% FS typical Gain error drift: 1 ppm/C maximum On-board reference buffer with VCMO generation Serial LVDS interface Wide operating temperature range: 40C to +85C

18-Bit, 15 MSPS, Module Data Acquisition Solution Features: Integrated fully differential ADC driver with signal scaling Wide input common-mode voltage range High common-mode rejection Single-ended to differential conversion Pin selectable input range with overrange Input ranges with 4.096 V REFBUF: ±10 V, ±5 V, ±4.096 V, ±2.5 V, and ±1.5 V Gain/attenuation options: 0.37, 0.73, 0.87, 1.38, and 2.25 Critical passive components 0.005% precision matched resistor array for FDA 9 mm × 9 mm, 0.8 mm pitch, 100-ball CSP_BGA package 2.5× footprint reduction vs. discrete solution Low power, dynamic power scaling, power-down mode 143 mW typical at 15 MSPS Throughput: 15 MSPS, no pipeline delay INL error: ±3.1 ppm typical, ±6.2 ppm maximum (Gain = 0.73, gain = 0.87, gain = 1.38, gain = 2.25) SINAD: 90.4 dB typical at 20 kHz (gain = 0.73) THD: −117 dB at 1 kHz, −110 dB at 100 kHz (gain = 0.73) Gain error: ±0.005%FS typical Gain error drift: ±0.13 ppm/°C typical On-board reference buffer with VCMO generation Serial LVDS interface Wide operating temperature range: −40°C to +85°C