The AD9704/AD9705/AD9706/AD9707 are the fourth-generation family in the TxDAC series of high performance, CMOS digital-to-analog converters (DACs). This pin-compatible, 8-/10-/12-/14-bit resolution family is optimized for low power operation, while maintaining excellent dynamic performance. The AD9704/AD9705/AD9706/AD9707 family is pin-compatible with the AD9748/AD9740/AD9742/AD9744 family of TxDAC converters and is specifically optimized for the transmit signal path of communication systems. All of the devices share the same interface, LFCSP package, and pinout, providing an upward or downward component selection path based on performance, resolution, and cost. The AD9704/AD9705/AD9706/AD9707 offers exceptional ac and dc performance, while supporting update rates up to 175 MSPS.The flexible power supply operating range of 1.7 V to 3.6 V and low power dissipation of the AD9704/AD9705/AD9706/AD9707 parts make them well suited for portable and low power applications.Power dissipation of the AD9704/AD9705/AD9706/AD9707 can be reduced to 15 mW, with a small trade-off in performance, by lowering the full-scale current output. In addition, a power-down mode reduces the standby power dissipation to approximately 2.2 mW.The AD9704/AD9705/AD9706/AD9707 has an optional serial peripheral interface (SPI®) that provides a higher level of programmability to enhance performance of the DAC. An adjustable output, common-mode feature allows for easy interfacing to other components that require common modes from 0 V to 1.2 V.Edge-triggered input latches and a 1.0 V temperature-compensated band gap reference have been integrated to provide a complete, monolithic DAC solution. The digital inputs support 1.8 V and 3.3 V CMOS logic families.PRODUCT HIGHLIGHTS Pin Compatible. The AD9704/AD9705/AD9706/AD9707 line of TxDAC converters is pin-compatible with theAD9748/AD9740/AD9742/AD9744 TxDAC line (LFCSP package). Low Power. Complete CMOS DAC operates on a single supply of 3.6 V down to 1.7 V, consuming 50 mW (3.3 V) and 12 mW (1.8 V). The DAC full-scale current can be reduced for lower power operation. Sleep and power-down modes are provided for low power idle periods. Self-Calibration. Self-calibration enables true 14-bit INL and DNL performance in the AD9707. Twos Complement/Binary Data Coding Support. Data input supports twos complement or straight binary data coding. Flexible Clock Input. A selectable high speed, single-ended,and differential CMOS clock input supports 175 MSPS conversion rate. Device Configuration. Device can be configured through pin strapping, and SPI control offers a higher level of programmability. Easy Interfacing to Other Components. Adjustable common-mode output allows for easy interfacing to other signal chain components that accept common-mode levels from 0 V to 1.2 V. On-Chip Voltage Reference. The AD9704/AD9705/AD9706/AD9707 include a 1.0 V temperature-compensated band gap voltage reference. Industry-Standard 32-Lead LFCSP Package.

The AD9704/AD9705/AD9706/AD9707 are the fourth-generation family in the TxDAC series of high performance, CMOS digital-to-analog converters (DACs). This pin-compatible, 8-/10-/12-/14-bit resolution family is optimized for low power operation, while maintaining excellent dynamic performance. The AD9704/AD9705/AD9706/AD9707 family is pin-compatible with the AD9748/AD9740/AD9742/AD9744 family of TxDAC converters and is specifically optimized for the transmit signal path of communication systems. All of the devices share the same interface, LFCSP package, and pinout, providing an upward or downward component selection path based on performance, resolution, and cost. The AD9704/AD9705/AD9706/AD9707 offers exceptional ac and dc performance, while supporting update rates up to 175 MSPS.The flexible power supply operating range of 1.7 V to 3.6 V and low power dissipation of the AD9704/AD9705/AD9706/AD9707 parts make them well suited for portable and low power applications.Power dissipation of the AD9704/AD9705/AD9706/AD9707 can be reduced to 15 mW, with a small trade-off in performance, by lowering the full-scale current output. In addition, a power-down mode reduces the standby power dissipation to approximately 2.2 mW.The AD9704/AD9705/AD9706/AD9707 has an optional serial peripheral interface (SPI®) that provides a higher level of programmability to enhance performance of the DAC. An adjustable output, common-mode feature allows for easy interfacing to other components that require common modes from 0 V to 1.2 V.Edge-triggered input latches and a 1.0 V temperature-compensated band gap reference have been integrated to provide a complete, monolithic DAC solution. The digital inputs support 1.8 V and 3.3 V CMOS logic families.PRODUCT HIGHLIGHTS Pin Compatible. The AD9704/AD9705/AD9706/AD9707 line of TxDAC converters is pin-compatible with theAD9748/AD9740/AD9742/AD9744 TxDAC line (LFCSP package). Low Power. Complete CMOS DAC operates on a single supply of 3.6 V down to 1.7 V, consuming 50 mW (3.3 V) and 12 mW (1.8 V). The DAC full-scale current can be reduced for lower power operation. Sleep and power-down modes are provided for low power idle periods. Self-Calibration. Self-calibration enables true 14-bit INL and DNL performance in the AD9707. Twos Complement/Binary Data Coding Support. Data input supports twos complement or straight binary data coding. Flexible Clock Input. A selectable high speed, single-ended,and differential CMOS clock input supports 175 MSPS conversion rate. Device Configuration. Device can be configured through pin strapping, and SPI control offers a higher level of programmability. Easy Interfacing to Other Components. Adjustable common-mode output allows for easy interfacing to other signal chain components that accept common-mode levels from 0 V to 1.2 V. On-Chip Voltage Reference. The AD9704/AD9705/AD9706/AD9707 include a 1.0 V temperature-compensated band gap voltage reference. Industry-Standard 32-Lead LFCSP Package.

The AD9714 / AD9715 / AD9716 / AD9717 are pin-compatible, dual, 8-/10-/12-/14-bit, low power digital-to-analog converters (DACs) that provide a sample rate of 125 MSPS. These TxDAC® converters are optimized for the transmit signal path of communication systems. All the devices share the same interface, package, and pinout, providing an upward or downward component selection path based on performance, resolution, and cost.The AD9714 / AD9715 / AD9716 / AD9717 offer exceptional ac and dc performance and support update rates up to 125 MSPS.The flexible power supply operating range of 1.8 V to 3.3 V and low power dissipation of the AD9714 / AD9715 / AD9716 / AD9717 make them well-suited for portable and low power applications.PRODUCT HIGHLIGHTS Low Power. DACs operate on a single 1.8 V to 3.3 V supply; total power consumption reduces to 35 mW at 125 MSPS with a 1.8 V supply. Sleep and power-down modes are provided for low power idle periods. LVCMOS Clock Input. High speed, single-ended LVCMOS clock input supports a 125 MSPS conversion rate. Easy Interfacing to Other Components. Adjustable output common mode from 0 V to 1.2 V allows easy interfacing to other components that accept common- mode levels greater than 0 V.APPLICATIONS Wireless infrastructures Picocell, femtocell base stations Medical instrumentation Ultrasound transducer excitation Portable instrumentation Signal generators, arbitrary waveform generators

The ADAU1442 / ADAU1445 / ADAU1446 are enhanced audio processors that allow full flexibility in routing all input and output signals. The SigmaDSP® core features full 28-bit processing (56-bit in double-precision mode), synchronous parameter loading for ensuring filter stability, and 100% code efficiency with the SigmaStudio™ tools. This DSP allows system designers to compensate for the real-world limitations of speakers, amplifiers, and listening environments, resulting in a dramatic improvement of the perceived audio quality through speaker equalization, multiband compression, limiting, and third-party branded algorithms.The flexible audio routing matrix (FARM) allows the user to multiplex inputs from multiple sources running at various sample rates to or from the SigmaDSP core. This drastically reduces the complexity of signal routing and clocking issues in the audio system. FARM includes up to eight stereo asynchronous sample rate converters (depending on the device model), Sony/Philips Digital Interconnect Format (S/PDIF) input and output, and serial (I2S) and time division multiplexing (TDM) I/Os. Any of these inputs can be routed to the SigmaDSP core or to any of the asynchronous sample rate converters (ASRCs). Similarly, any one of the output signals can be taken from the SigmaDSP core or from any of the ASRC outputs. This routing scheme, which can be modified at any time via control registers, allows for maximum system flexibility.The ADAU1442, ADAU1445, and ADAU1446 differ only in ASRC functionality and packaging. The ADAU1442/ADAU1445 contain 16 channels of ASRCs and are packaged in TQFP packages, whereas the ADAU1446 contains no ASRCs and is packaged in an LQFP. The ADAU1442 can handle nine clock domains, the ADAU1445 can handle three clock domains, and the ADAU1446 can handle one clock domain.The ADAU1442 / ADAU1445 / ADAU1446 can be controlled in one of two operational modes: the settings of the chip can be loaded and dynamically updated through the SPI/I2C® port, or the DSP can self-boot from an external EEPROM in a system with no microcontroller. There is also a bank of multipurpose (MP) pins that can be used as general-purpose digital I/Os or as inputs to the 4-channel auxiliary control ADC.The ADAU1442 / ADAU1445 / ADAU1446 are supported by the SigmaStudio graphical development environment. This software includes audio processing blocks such as FIR and IIR filters, dynamics processors, mixers, low level DSP functions, and third-party algorithms for fast development of custom signal flows.APPLICATIONS Automotive audio processing Head units Navigation systems Rear-seat entertainment systems DSP amplifiers (sound system amplifiers) Commercial audio processing

The ADF4350 allows implementation of fractional-N orinteger-N phase-locked loop (PLL) frequency synthesizersif used with an external loop filter and external referencefrequency.The ADF4350 has an integrated voltage controlled oscillator(VCO) with a fundamental output frequency ranging from2200 MHz to 4400 MHz. In addition, divide-by-1/2/4/8 or 16circuits allow the user to generate RF output frequencies as lowas 137.5 MHz. For applications that require isolation, the RFoutput stage can be muted. The mute function is both pin- andsoftware-controllable. An auxiliary RF output is also available,which can be powered down if not in use.Control of all the on-chip registers is through a simple 3-wireinterface. The device operates with a power supply rangingfrom 3.0 V to 3.6 V and can be powered down when not in use.Applications Wireless infrastructure (W-CDMA, TD-SCDMA, WiMAX, GSM, PCS, DCS, DECT) Test equipment Wireless LANs, CATV equipment Clock generation

The ADL5382 is a broadband quadrature I-Q demodulator that covers an RF input frequency range from 700 MHz to 2.7 GHz. With a NF = 14 dB, IP1dB = 14.7 dBm, and IIP3 = 33.5 dBm at 900 MHz, the ADL5382demodulator offers outstanding dynamic range suitable for the demanding infrastructure direct-conversion requirements. The differential RF inputs provide a well-behaved broadband input impedance of 50 Ω and are best driven from a 1:1 balun for optimum performance.Excellent demodulation accuracy is achieved with amplitude and phase balances ~0.05 dB and ~0.2°, respectively. The demodulated in-phase (I) and quadrature (Q) differential outputs are fully buffered and provide a voltage conversion gain of ~4 dB. The buffered baseband outputs are capable of driving a 2 Vp-p differential signal into 200 Ω.The fully balanced design minimizes effects from second-order distortion. The leakage from the LO port to the RF port is 60 dBm.The ADL5382 operates off a single 4.75 V to 5.25 V supply. The supply current is adjustable with an external resistor from the BIAS pin to ground.The ADL5382 is fabricated using the Analog Devices, Inc., advanced Silicon-Germanium bipolar process and is available in a 24-lead exposed paddle LFCSP. Performance is specified over a -40°C to +85°C temperature range.APPLICATIONS QAM/QPSK demodulator W-CDMA/CDMA/CDMA2000/GSM Point-to-(Multi)Point Radio WiMax

The ADM1490E / ADM1491E are RS-485 transceivers with ±8 kV ESD protection and is suitable for high speed, full-duplex communication on multipoint transmission lines. In particular, the ADM1491E is designed for use in motor control applications requiring communications at data rates up to 16 Mbps.The ADM1491E is designed for balanced transmission lines and complies with TIA/EIA-485-A-98. The device has a 12 kΩ receiver input impedance for unit load RS-485 operation allowing up to 32 nodes on the bus.The differential transmitter outputs and receiver inputs feature electrostatic discharge circuitry that provides protection to ±8 kV using the human body model (HBM).The ADM1491E operates from a single 5 V power supply. Excessive power dissipation caused by bus contention or output shorting is prevented by short-circuit protection and thermal circuitry.Short-circuit protection circuits limit the maximum output current to ±250 mA during fault conditions. A thermal shutdown circuit senses if the die temperature rises above 150°C and forces the driver outputs into a high impedance state under this condition.The receiver of the ADM1491E contains a fail-safe feature that results in a logic high output state if the inputs are unconnected (floating).The ADM1491E features extremely fast and closely matched switching times. Minimal driver propagation delays permit transmission at data rates up to 16 Mbps while low skew minimizes EMI interference.The ADM1491E is fully specified over the commercial and industrial temperature ranges and is available in two packages: a narrow-body 14-lead SOIC and a 10-lead MSOP.APPLICATIONS RS-485/RS-422 interfaces Industrial field networks High data rate motor control Multipoint data transmission systems Single-ended to differential signal conversion

The ADM2484E is an isolated data transceiver with ±15 kVESD protection suitable for high speed, half- or full-duplex communication on multipoint transmission lines. For half-duplex operation, the transmitter outputs and receiver inputs share the same transmission line. Transmitter Output Pin Y links externally to Receiver Input Pin A, and Transmitter Output Pin Z links externally to Receiver Input Pin B.Designed for balanced transmission lines, the ADM2484Ecomplies with ANSI TIA/EIA RS-485-A-1998 and ISO 8482: 1987(E). The device employs Analog Devices, Inc., iCoupler® technology to combine a 3-channel isolator, a three-state differential line driver, and a differential input receiver into a single package.The differential transmitter outputs and receiver inputs featureelectrostatic discharge circuitry that provides protection up to ±15 kV using the human body model (HBM). The logic side of the device can be powered with either a 5 V or a 3.3 V supply, whereas the bus side requires an isolated 3.3 V supply.The device has current-limiting and thermal shutdown featuresto protect against output short circuits and situations where buscontention causes excessive power dissipation.Applications Isolated RS-485/RS-422 interfaces Industrial field networks INTERBUS Multipoint data transmission systems

The ADM6316 / ADM6318 / ADM6319 / ADM6320 / ADM6321 / ADM6322 are supervisory circuits that monitor power supply voltage levels and code execution integrity in microprocessor-based systems. As well as providing power-on reset signals, an on-chip watchdog timer can reset the microprocessor if it fails to strobe within a preset timeout period. A reset signal can also be asserted by an external push button through a manual reset input. The seven devices feature different combinations of watchdog input, manual reset input, and output stage configuration, as shown in Table 1 of the data sheet.Each device is available in a choice of 26 reset threshold options ranging from 2.5 V to 5 V in 100 mV increments. There are also four reset timeout options of 1 ms, 20 ms, 140 ms, and 1120 ms (minimum) and four watchdog timeout options of 6.3 ms, 102 ms, 1600 ms, and 25.6 sec (typical). Not all device options are released for sale as standard models. See the Ordering Guide in the data sheet for details.The ADM6316/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322 are available in 5-lead SOT-23 packages and typically consume only 3 μA, making them suitable for use inlow power portable applications.APPLICATIONS Microprocessor systems Computers and controllers Intelligent instruments Portable equipment

The ADN4661 is a single, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 600 Mbps (300 MHz) and ultra-low power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals.The device accepts low voltage TTL/CMOS logic signals and converts them to a differential current output of typically ±3.1 mA for driving a transmission medium such as a twisted-pair cable. The transmitted signal develops a differential voltage of typically ±355 mV across a termination resistor at the receiv-ing end, and this is converted back to a TTL/CMOS logic level by a line receiver.The ADN4661 and a companion LVDS receiver offer a new solution to high speed point-to-point data transmission, and a low power alternative to emitter-coupled logic (ECL) or positive emitter-coupled logic (PECL).ApplicationsBackplane data transmissionCable data transmissionClock distribution