The ADG411 is a monolithic CMOS device comprising four independently selectable switches. It is designed on an enhanced LC2MOS process which provides low power dissipation yet gives high switching speed and low on resistance.The ADG411 switches are turned on with a logic low on the appropriate control input. Each switch conducts equally well in both directions when ON and each has an input signal range that extends to the supplies. All switches exhibit break-before-make switching action for use in multiplexer applications. Inherent in the design is low charge injection for minimum transients when switching the digital inputs.

The ADG452 is a monolithic CMOS device comprising four independently selectable switches. It is designed on an enhanced LC2MOS process which provides low power dissipation yet gives high switching speed and low on resistance.The ADG452 switches are turned on with a logic high on the appropriate control input. Each switch conducts equally well in both directions when ON and each has an input signal range that extends to the supplies. All switches exhibit break-before-make switching action for use in multiplexer applications. Inherent in the design is low charge injection for minimum transients when switching the digital inputs.

The ADM1485 is a differential line transceiver suitable for high speed bidirectional data communication on multipoint bus transmission lines. It is designed for balanced data transmission and complies with both EIA Standards RS-485 and RS-422. The part contains a differential line driver and a differential line receiver. Both the driver and the receiver may be enabled independently. When disabled, the outputs are tristated.The ADM1485 operates from a single +5 V power supply. Excessive power dissipation caused by bus contention or by output shorting is prevented by a thermal shutdown circuit. This feature forces the driver output into a high impedance state if during fault conditions a significant temperature increase is detected in the internal driver circuitry.Up to 32 transceivers may be connected simultaneously on a bus, but only one driver should be enabled at any time. It is important therefore that the remaining disabled drivers do not load the bus. To ensure this, the ADM1485 driver features high output impedance when disabled and also when powered down.This minimizes the loading effect when the transceiver is not being utilized. The high impedance driver output is maintained over the entire common-mode voltage range from -7 V to +12 V.The receiver contains a fail safe feature which results in a logic high output state if the inputs are unconnected (floating).The ADM1485 is fabricated in BiCMOS, an advanced mixed technology process combining low power CMOS with fast switching bipolar technology. All inputs and outputs contain protection against ESD; all driver outputs feature high source and sink current capability. An epitaxial layer is used to guard against latch-up.The ADM1485 features extremely fast switching speeds. Minimal driver propagation delays permit transmission at data rates up to 30 Mbits/s while low skew minimizes EMI interference.The part is fully specified over the commercial and industrial temperature range and is available in an 8-pin DIL/SOIC package.

The ADM2xx family of line drivers/receivers is intended for all EIA-232-E and V.28 communications interfaces, especially in applications where ±12 V is not available. The ADM205, ADM211 and ADM213 feature a low power shutdown mode which reduces power dissipation to less than 5 µW making them ideally suited for battery powered equipment. The ADM205 does not require any external components and is particularly useful in applications where printed circuit board space critical. The ADM213 has an active-low shutdown and an active-high receiver enable control. Two receivers of the ADM213 remain active during shutdown. This feature is useful for ring indicator monitoring.All members of the ADM2xx family, except the ADM209, include two internal charge pump voltage converters which allow operation from a single +5 V supply. These converters convert the +5 V input power to the ±10 V required for RS-232 output levels. The ADM209 is designed to operate from +5 V and +12 V supplies. An internal +12 V to −12 V charge pump voltage converter generates the −12 V supply.

The ADM483 is a low power differential line transceiver suitable for half-duplex data communication on multipoint bus trans-mission lines. It is designed for balanced data transmission, and complies with EIA Standards RS-485 and RS-422.The part contains a differential line driver and a differential line receiver. Both share the same differential pins, with either the driver or the receiver being enabled at any given time.The device has an input impedance of 12 kΩ, allowing up to 32 transceivers on one bus. Since only one driver should be enabled at any time, the output of a disabled or powered-down driver is three-stated to avoid overloading the bus. This high impedance driver output is maintained over the entire common-mode voltage range from –7 V to +12 V.The receiver contains a fail-safe feature that results in a logic high output state if the inputs are unconnected (floating). The driver outputs are slew-rate limited to reduce EMI and data errors caused by reflections from improperly terminated buses. Excessive power dissipation caused by bus contention or by output shorting is prevented by a thermal shutdown circuit. The part is fully specified over the industrial temperature range, and is available in an 8-lead SOIC package.

The ADM4850 / ADM4851 / ADM4852 / ADM4853 / ADM4854 /ADM4855 / ADM4856 / ADM4857 are differential line transceiverssuitable for high speed, half-duplex and full duplex data communication on multipoint bus transmission lines. Theyare designed for balanced data transmission and comply with EIA Standards RS-485 and RS-422. The ADM4850 / ADM4851 / ADM4852 / ADM4853 are half-duplex transceivers that sharedifferential lines and have separate enable inputs for the driver and receiver. The full duplex ADM4854 / ADM4855 / ADM4856 / ADM4857 transceivers have dedicated differential line driveroutputs and receiver inputs.The devices have a 1/8-unit load receiver input impedance, which allows up to 256 transceivers on one bus. Because only onedriver must be enabled at any time, the output of a disabled or powered down driver is three-stated to avoid overloading the bus.The receiver inputs have a true fail-safe feature, which ensures a logic high output level when the inputs are open or shorted.This guarantees that the receiver outputs are in a known state before communication begins and when communication ends.The driver outputs are slew rate limited to reduce EMI and data errors caused by reflections from improperly terminated buses.Excessive power dissipation caused by bus contention or by output shorting is prevented with a thermal shutdown circuit.The devices are fully specified over the commercial and industrial temperature ranges and are available in 8-lead SOIC (ADM4850through ADM4857), 8-lead LFCSP (ADM4850 / ADM4852 / ADM4853), and 8-lead MSOP (ADM4850 only) packages.Applications Low power RS-485 applications EMI sensitive systems DTE to DCE interfaces Industrial control Packet switching Local area networks Level translators

The ADP3338 is a member of the ADP330x family ofprecision low dropout anyCAP® voltage regulators. The ADP3338 operates with an input voltage range of +2.7 V to +8 V and delivers a load current up to 1 A. The ADP3338 stands out from the conventional LDOs with a novel architecture and an enhanced process that enables it to offer performance advantages and higher output currentthan its competition. Its patented design requires only a 1.0 µF output capacitor for stability. This device is insensitive to output capacitor Equivalent Series Resistance (ESR), and is stable with any good quality capacitor, including ceramic (MLCC) types for space-restricted applications.The ADP3338 achieves exceptional accuracy of ±0.9% at room temperature and ±1.8% over temperature, line and load variations. The dropout voltage of the ADP3338 is only 200 mV (typical) at 1 A. This device also includes a safety current limit and thermal overload protection. The ADP3338 has ultralow quiescent current 130 µA (typ) in light load situations.APPLICATIONS  Notebook, palmtop computers SCSI terminators Battery-powered systems Bar code scanners Camcorders, cameras Home entertainment systems Networking systems DSP/ASIC supplies

The ADuC841/ADuC842/ADuC843 are complete smart transducer front ends, that integrates a high performance self-calibrating multichannel ADC, a dual DAC, and an optimized single-cycle 20 MHz 8-bit MCU (8051 instruction set compatible)on a single chip.The ADuC841 and ADuC842 are identical with the exception of the clock oscillator circuit; the ADuC841 is clocked directly from an external crystal up to 20 MHz whereas the ADuC842 uses a 32 kHz crystal with an on-chip PLL generating a programmable core clock up to 16.78 MHz.The ADuC843 is identical to the ADuC842 except that the ADuC843 has no analog DAC outputs.The microcontroller is an optimized 8052 core offering up to 20 MIPS peak performance. Three different memory options are available offering up to 62 kBytes of nonvolatile Flash/EE program memory. Four kBytes of nonvolatile Flash/EE data memory, 256 bytes RAM, and 2 kBytes of extended RAM are also integrated on-chip. The parts also incorporate additional analog functionality with two 12-bit DACs, power supply monitor, and a band gap reference. On-chip digital peripherals include two 16-bit Σ-Δ. DACs, a dual output 16-bit PWM, a watchdog timer, a time interval counter, three timers/counters, and three serial I/O ports (SPI, I2C, and UART).On the ADuC812 and the ADuC832, the I2C and SPI interfaces share some of the same pins. For backwards compatibility, this is also the case for the ADuC841/ADuC842/ADuC843.However, there is also the option to allow SPI operate separately on P3.3, P3.4, and P3.5, while I2C uses the standard pins. The I2C interface has also been enhanced to offer repeated start, general call, and quad addressing.On-chip factory firmware supports in-circuit serial download and debug modes (via UART) as well as single-pin emulation mode via the EA pin..Applications Optical networking—laser power control Base station systems Precision instrumentation, smart sensors Transient capture systems DAS and communications systems

The ADuC841/ADuC842/ADuC843are complete smart transducer front ends, that integrates a high performance self-calibrating multichannel ADC, a dual DAC, and an optimized single-cycle 20 MHz 8-bit MCU (8051 instruction set compatible)on a single chip.The ADuC841 and ADuC842 are identical with the exception of the clock oscillator circuit; the ADuC841 is clocked directly from an external crystal up to 20 MHz whereas the ADuC842 uses a 32 kHz crystal with an on-chip PLL generating aprogrammable core clock up to 16.78 MHz.The ADuC843 is identical to the ADuC842 except that the ADuC843 has no analog DAC outputs.The microcontroller is an optimized 8052 core offering up to 20 MIPS peak performance. Three different memory options are available offering up to 62 kBytes of nonvolatile Flash/EE program memory. Four kBytes of nonvolatile Flash/EE data memory, 256 bytes RAM, and 2 kBytes of extended RAM arealso integrated on-chip. The parts also incorporate additional analog functionality with two 12-bit DACs, power supply monitor, and a band gap reference. On-chip digital peripherals include two 16-bit Σ-Δ. DACs, a dual output 16-bit PWM, a watchdog timer, a time interval counter, three timers/counters, and three serial I/O ports (SPI, I2C, and UART).On the ADuC812 and the ADuC832, the I2C and SPI interfaces share some of the same pins. For backwards compatibility, this is also the case for the ADuC841/ADuC842/ADuC843.However, there is also the option to allow SPI operate separately on P3.3, P3.4, and P3.5, while I2C uses the standard pins. The I2C interface has also been enhanced to offer repeated start, general call, and quad addressing.On-chip factory firmware supports in-circuit serial download and debug modes (via UART) as well as single-pin emulation mode via the EA pin.Applications Optical networking—laser power control Base station systems Precision instrumentation, smart sensors Transient capture systems DAS and communications systems

The AD667 is a complete voltage output 12-bit digital-to-analog converter including a high stability buried Zener voltage reference and double-buffered input latch on a single chip. The converter uses 12 precision high speed bipolar current steering switches and a laser trimmed thin-film resistor network to provide fast settling time and high accuracy.Microprocessor compatibility is achieved by the on-chip double-buffered latch. The design of the input latch allows direct interface to 4-, 8-, 12-, or 16-bit buses. The 12 bits of data from the first rank of latches can then be transferred to the second rank, avoiding generation of spurious analog output values. The latch responds to strobe pulses as short as 100 ns, allowing use with the fastest available microprocessors.The functional completeness and high performance in the AD667 results from a combination of advanced switch design, high speed bipolar manufacturing process, and the proven laser wafer-trimming (LWT) technology. The AD667 is trimmed at the wafer level and is specified to ±1/4 LSB maximum linearity error (K, B grades) at +25°C and ±1/2 LSB over the full operating temperature range.The subsurface (buried) Zener diode on the chip provides a low noise voltage reference which has long-term stability and temperature drift characteristics comparable to the best discrete reference diodes. The laser trimming process which provides the excellent linearity, is also used to trim the absolute value of the reference as well as its temperature coefficient. The AD667 is thus well suited for wide temperature range performance with ±1/2 LSB maximum linearity error and guaranteed monotonicity over the full temperature range. Typical full-scale gain TC is 5 ppm/°C.The AD667 is available in five performance grades. The AD667J and K are specified for use over the 0°C to +70°C temperature range and are available in a 28-pin molded plastic DIP (N) or PLCC (P) package. The AD667S grade is specified for the -55°C to +125°C range and is available in the ceramic DIP (D) or LCC (E) package. The AD667A and B are specified for use over the -25°C to +85°C temperature range and are available in a 28-pin hermetically sealed ceramic DIP (D) package.