The OPx177 family consists of very high precision, single, dual, and quad amplifiers featuring extremely low offset voltage and drift, low input bias current, low noise, and low power consump-tion. Outputs are stable with capacitive loads of over 1000 pF with no external compensation. Supply current is less than 500 μA per amplifier at 30 V. Internal 500 Ω series resistors protect the inputs, allowing input signal levels several volts beyond either supply without phase reversal.Unlike previous high voltage amplifiers with very low offset voltages, the OP1177 (single) and OP2177 (dual) amplifiers are available in tiny 8-lead surface-mount MSOP and 8-lead narrow SOIC packages. The OP4177 (quad) is available in TSSOP and 14-lead narrow SOIC packages. Moreover, specified performance in the MSOP and the TSSOP is identical to performance in the SOIC package. MSOP and TSSOP are available in tape and reel only.The OPx177 family offers the widest specified temperature range of any high precision amplifier in surface-mount packaging. All versions are fully specified for operation from −40°C to +125°C for the most demanding operating environments.Applications for these amplifiers include precision diode power measurement, voltage and current level setting, and level detection in optical and wireless transmission systems. Additional applications include line-powered and portable instrumentation and controls—thermocouple, RTD, strain-bridge, and other sensor signal conditioning—and precision filters.Applications Wireless base station control circuits Optical network control circuits Instrumentation Sensors and controls Thermocouples Resistor thermal detectors (RTDs) Strain bridges Shunt current measurements Precision filters

The OP497 is a quad op amp with precision performance in the space-saving, industry standard 16-lead SOlC package. Its combination of exceptional precision with low power and extremely low input bias current makes the quad OP497 useful in a wide variety of applications.Precision performance of the OP497 includes very low offset (120 dB. The OP497 has a power supply rejection of >120 dB which minimizes offset voltage changes experienced in battery-powered systems. The supply current of the OP497 is The OP497 uses a superbeta input stage with bias current cancellation to maintain picoamp bias currents at all temperatures. This is in contrast to FET input op amps whose bias currents start in the picoamp range at 25°C but double for every 10°C rise in temperature to reach the nanoamp range above 85°C. The input bias current of the OP497 is Combining precision, low power, and low bias current, the OP497 is ideal for a number of applications, including instrumentation amplifiers, log amplifiers, photodiode preamplifiers, and long-term integrators. For a single device, see the OP97 data sheet, and for a dual device, see the OP297 data sheet.

The AD585 is a complete monolithic sample-and-hold circuit consisting of a high performance operational amplifier in series with an ultralow leakage analog switch and a FET input integrating amplifier. An internal holding capacitor and matched applications resistors have been provided for high precision and applications flexibility.The performance of the AD585 makes it ideal for high speed 10- and 12-bit data acquisition systems, where fast acquisition time, low sample-to-hold offset, and low droop are critical. The AD585 can acquire a signal to ±0.01% in 3 µs maximum, and then hold that signal with a maximum sample-to-hold offset of 3 mV and less than 1 mV/ms droop, using the on-chip hold capacitor. If lower droop is required, it is possible to add a larger external hold capacitor.The high speed analog switch used in the AD585 exhibits aperture jitter of 0.5 ns, enabling the device to sample full scale (20 V peak-to-peak) signals at frequencies up to 78 kHz with 12-bit precision.The AD585 can be used with any user-defined feedback net-work to provide any desired gain in the sample mode. On-chip precision thin-film resistors can be used to provide gains of +1, -1, or +2. Output impedance in the hold mode is sufficiently low to maintain an accurate output signal even when driving the dynamic load presented by a successive-approximation A/D converter. However, the output is protected against damage from accidental short circuits.The control signal for the HOLD command can be either active high or active low. The differential HOLD signal is compatible with all logic families, if a suitable reference level is provided. An on-chip TTL reference level is provided for TTL compatibility.The AD585 is available in three performance grades. The JP grade is specified for the 0°C to +70°C commercial temperature range and packaged in a 20-pin PLCC. The AQ grade is specified for the -25°C to +85°C industrial temperature range and is packaged in a 14-pin cerdip. The SQ and SE grades are specified for the -55°C to +125°C military temperature range and are packaged in a 14-pin cerdip and 20-pin LCC.

The AD585 is a complete monolithic sample-and-hold circuit consisting of a high performance operational amplifier in series with an ultralow leakage analog switch and a FET input integrating amplifier. An internal holding capacitor and matched applications resistors have been provided for high precision and applications flexibility.The performance of the AD585 makes it ideal for high speed 10- and 12-bit data acquisition systems, where fast acquisition time, low sample-to-hold offset, and low droop are critical. The AD585 can acquire a signal to ±0.01% in 3 µs maximum, and then hold that signal with a maximum sample-to-hold offset of 3 mV and less than 1 mV/ms droop, using the on-chip hold capacitor. If lower droop is required, it is possible to add a larger external hold capacitor.The high speed analog switch used in the AD585 exhibits aperture jitter of 0.5 ns, enabling the device to sample full scale (20 V peak-to-peak) signals at frequencies up to 78 kHz with 12-bit precision.The AD585 can be used with any user-defined feedback net-work to provide any desired gain in the sample mode. On-chip precision thin-film resistors can be used to provide gains of +1, -1, or +2. Output impedance in the hold mode is sufficiently low to maintain an accurate output signal even when driving the dynamic load presented by a successive-approximation A/D converter. However, the output is protected against damage from accidental short circuits.The control signal for the HOLD command can be either active high or active low. The differential HOLD signal is compatible with all logic families, if a suitable reference level is provided. An on-chip TTL reference level is provided for TTL compatibility.The AD585 is available in three performance grades. The JP grade is specified for the 0°C to +70°C commercial temperature range and packaged in a 20-pin PLCC. The AQ grade is specified for the -25°C to +85°C industrial temperature range and is packaged in a 14-pin cerdip. The SQ and SE grades are specified for the -55°C to +125°C military temperature range and are packaged in a 14-pin cerdip and 20-pin LCC.

The ADV7127 is a high speed, DAC on a single monolithicchip. It consists of a 10-bit, video DAC with an on-board voltagereference, complementary outputs, a standard TTL inputinterface, and high impedance analog output current sources.The ADV7127 has a 10-bit wide input port. A single 5 V or3.3 V power supply and clock are all that are required to makethe device functional.The ADV7127 is fabricated in a complementary metal-oxidesemiconductor (CMOS) process. Its monolithic CMOSconstruction ensures greater functionality with low powerdissipation. The ADV7127 is available in a 24-lead TSSOPpackage which includes a power-down mode and an on-boardvoltage reference circuit.Product Highlights 240 MSPS throughput. Guaranteed monotonic to 10 bits. Compatible with a wide variety of high resolution color graphics systems including RS-343A and RS-170.Applications Digital video systems (1600 × 1200 at 100 Hz) High resolution color graphics Digital radio modulation Image processing Instrumentation Video signal reconstruction Direct digital synthesis (DDS) Wireless local area networks (LANs)

The MAX9205/MAX9207 serializers transform 10-bit-wide parallel LVCMOS/LVTTL data into a serial high-speed bus low-voltage differential signaling (LVDS) data stream. The serializers typically pair with deserializers like the MAX9206/MAX9208, which receive the serial output and transform it back to 10-bit-wide parallel data.The MAX9205/MAX9207 transmit serial data at speeds up to 400Mbps and 660Mbps, respectively, over PCB traces or twisted-pair cables. Since the clock is recovered from the serial data stream, clock-to-data and data-to-data skew that would be present with a parallel bus are eliminated.The serializers require no external components and few control signals. The input data strobe edge is selected by TCLK_R/F. Active-low PWRDN is used to save power when the devices are not in use. Upon power-up, a synchronization mode is activated, which is controlled by two SYNC inputs, SYNC1 and SYNC2.The MAX9205 can lock to a 16MHz to 40MHz system clock, while the MAX9207 can lock to a 40MHz to 66MHz system clock. The serializer output is held in high impedance until the device is fully locked to the local system clock, or when the device is in power-down mode.Both the devices operate from a single +3.3V supply, are specified for operation from -40°C to +85°C, and are available in 28-pin SSOP packages.ApplicationsAdd/Drop MultiplexersBackplane and Interconnect ApplicationsCell Phone Base Stations Digital Cross-ConnectsDSLAMNetwork Routers and Switches

The SSM2135 dual audio operational amplifier permits excel-lent performance in portable or low power audio systems, with an operating supply range of 4 V to 36 V or ±2 V to ±18 V. The unity-gain stable device has very low voltage noise of 5.2 nV/√Hz, and total harmonic distortion plus noise below 0.01% over normal signal levels and loads. Such characteristics are enhanced by wide output swing and load drive capability. A unique output stage1 permits output swing approaching the rail under moderate load conditions. Under severe loading, the SSM2135 still maintains a wide output swing with ultralow distortion. Particularly well suited for computer audio systems and portable digital audio units, the SSM2135 can perform preamplification, headphone and speaker driving, and balanced line driving and receiving. Additionally, the device is ideal for input signal conditioning in single-supply, Σ-Δ, analog-to-digital converter subsystems such as the AD1877. The SSM2135 makes an ideal single-supply stereo output amplifier for audio digital-to-analog converters (DACs) because of its low noise and distortion.The SSM2135 is available in an 8-lead plastic SOIC package and is guaranteed for operation over the extended industrial temperature range of −40°C to +85°C.

The ADCMP370 / ADCMP371 are general-purpose comparators with input offset voltages of 9 mV (max) and low power consumption, which make them ideal for battery-powered portable equipment.The ADCMP371 has a push-pull output stage, while the ADCMP370 has an open-drain output. The inputs on both parts and the output on the ADCMP370 can tolerate voltages up to 22 V, making them suitable for use as voltage detectors in portable equipment.They are available in space-efficient 5-lead SC70 packaging.APPLICATIONS Battery Management Systems A/D Converters Low Voltage Applications Battery Powered Electronics Portable Equipment

The ADCMP563/ADCMP564 are high speed comparatorsfabricated on Analog Devices’ proprietary XFCB process. Thedevices feature a 700 ps propagation delay with less than 75 psoverdrive dispersion. Dispersion, a measure of the difference inpropagation delay under differing overdrive conditions, is a particularlyimportant characteristic of high speed comparators. A separateprogrammable hysteresis pin is available on the ADCMP564.A differential input stage permits consistent propagation delaywith a wide variety of signals in the common-mode range from−2.0 V to +3.0 V. Outputs are complementary digital signals thatare fully compatible with ECL 10 K and 10 KH logic families.The outputs provide sufficient drive current to directly drivetransmission lines terminated in 50 Ω to −2 V. A latch input,which is included, permits tracking, track-and-hold, or sample-and-holdmodes of operation. The latch input pins contain internalpull-ups that set the latch in tracking mode when left open.The ADCMP563/ADCMP564 are specified over the industrialtemperature range (−40°C to +85°C).Applications Automatic test equipment High speed instrumentation Scope and logic analyzer front ends Window comparators High speed line receivers Threshold detection Peak detection High speed triggers Patient diagnostics Hand-held test instruments Zero crossing detectors Line receivers and signal restoration Clock drivers

The ADF4116/ADF4117/ADF4118 are frequency synthesizers which can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. Theyconsist of a low-noise digital PFD (Phase Frequency Detector), a precision charge pump, a programmable reference divider, programmable A and B counters and a dual-modulus prescaler (P/P+1). The A (5-bit)and B (13-bit) counters, in conjunction with the dual modulus prescaler (P/P+1), implement an N divider (N= BP+A). In addition, the 14-bit reference counter (R Counter), allows selectable REFIN frequencies at the PFD input. A complete PLL (Phase-LockedLoop) can be implemented if the synthesizer is used with an external loop filter and VCO (Voltage Controlled Oscillator).Control of all the on-chip registers is via a simple 3-wire interface.The devices operate with a 2.7V (± 10%) or 5V (± 10%) power supply and can be powered when not in use.