The ADP5091/ADP5092 are intelligent, integrated energy harvesting, ultralow power management unit (PMU) solutions that convert dc power from PV cells or TEGs. These devices charge storage elements such as rechargeable Li-Ion batteries, thin film batteries, super capacitors, or conventional capacitors, and power up small electronic devices and battery free systems.The ADP5091/ADP5092 provide efficient conversion of the harvested limited power from a 6 ?W to 600 mW range with submicrowatt operation losses. With the internal cold start circuit, the regulator can start operating at an input voltage as low as 380 mV. After cold startup, the regulator is functional at an input voltage range of 0.08 V to 3.3 V. An additional 150 mA regulated output can be programmed by an external resistor divider or the VID pin.The MPPT control keeps the input voltage ripple in a fixed range to maintain stable dc-to-dc boost conversion. The dynamic sensing mode and no sensing mode, both programming regulation points of the input voltage, allow extraction of the highest possible energy from the harvester. A programmable minimum operation threshold enables boost shutdown during a low input condition.As a low light indicator for a microprocessor, the LLD pin of the ADP5091 is the MINOP comparator output. However, the REG_GOOD flag of the ADP5092 monitors the REG_OUT voltage. In addition, the DIS_SW pin can temporarily shut down the boost regulator and is RF transmission friendly.The charging control function of the ADP5091/ADP5092 protects the rechargeable energy storage, which is achieved by monitoring the battery voltage with the programmable charging termination voltage and the shutdown discharging voltage. In addition, a programmable PGOOD flag monitors the SYS voltage.An optional primary cell battery can be connected and managed by an integrated power path management control block that is programmable to switch the power source from the energy harvester, rechargeable battery, and primary cell battery.The ADP5091/ADP5092 are available in a 24-lead LFCSP and are rated for a ?40?C to +125?C temperature range.Applications Photovoltaic (PV) cell energy harvesting Thermoelectric generators (TEGs) energy harvesting Industrial monitoring Self powered wireless sensor devices Portable and wearable devices with energy harvesting

The ADP5600 is an interleaved charge pump inverter with an integrated, negative, low dropout (LDO) linear regulator. The interleaved charge pump inverter exhibits reduced output voltage ripple and reflected input current noise over conventional inductive or conventional capacitive based solutions. The integrated LDO provides a rail with good regulation at sufficient power supply rejection ratio (PSRR).The ADP5600 charge pump operates via resistor programming or external clock synchronization at switching frequency range of 100 kHz to 1 MHz. Operating at a higher switching frequency allows the use of small input, output, and fly capacitors. To combine the high switching frequency with internal field effect transistors (FETs), compensation, and soft start gives a best-in-class total solution size for negative rail generation.The ADP5600 also features comprehensive fault protection for robust applications. These protections include overload protection, shorted fly capacitor protection, undervoltage lockout (UVLO), and thermal shutdown. For easy sequencing, the ADP5600 has a power-good pin.The integrated LDO of the ADP5600 uses an advanced proprie-tary architecture to provide high power supply rejection. It also achieves decent line and load transient response with only a small 2.2 ?F ceramic output capacitor. The output can be configured via the SEL1 and SEL2 pins to one of four fixed output voltages and is adjustable from ?0.505 V to ?VIN + 0.5 V via an external feedback divider.APPLICATIONSPowering the negative rail on bipolar/split supply ADC/DAC/AMP/mux applications

The ADP7102 is a CMOS, low dropout linear regulator that operates from 3.3 V to 20 V and provides up to 300 mA of output current. This high input voltage LDO is ideal for regulation of high performance analog and mixed signal circuits operating from 19 V to 1.22 V rails. Using an advanced proprietary architecture, it provides high power supply rejection, low noise, and achieves excellent line and load transient response with just a small 1 ?F ceramic output capacitor. The ADP7102 is available in seven fixed output voltage options and an adjustable version, which allows output voltages that range from 1.22 V to VIN ? VDO via an external feedback divider. The ADP7102 output noise voltage is 15 ?V rms and is independent of the output voltage. A digital power good output allows power system monitors to check the health of the output voltage. A user programmable precision undervoltage lockout function facilitates sequencing of multiple power supplies. The ADP7102 is available in 8-lead, 3 mm ? 3 mm LFCSP and 8-lead SOIC packages. The LFCSP offers a very compact solution and also provides excellent thermal performance for applications requiring up to 300 mA of output current in a small, low-profile footprint. APPLICATIONS Regulation to noise sensitive applications: ADC, DAC circuits, precision amplifiers, high frequency oscillators, clocks, and phase-locked loops Communications and infrastructure Medical and healthcare Industrial and instrumentation

The ADP7159 is an adjustable linear regulator that operates from 2.3 V to 5.5 V and provides up to 2 A of output current. Output voltages from 1.2 V to 3.3 V are possible depending on the model. Using an advanced proprietary architecture, the device provides high power supply rejection and ultralow noise, achieving excellentline and load transient response with only a 10 ?F ceramicoutput capacitor.The ADP7159 is available in four models that optimize powerdissipation and PSRR performance as a function of the inputand output voltage. The typical output noise of the ADP7159 regulator is 0.9 ?V rmsfrom 100 Hz to 100 kHz and 1.7 nV/?Hz for noise spectral densityfrom 10 kHz to 1 MHz. The ADP7159 is available in 10-lead,3 mm ? 3 mm LFCSP and 8-lead SOIC packages, making it notonly a very compact solution, but also providing excellent thermal performance for applications requiring up to 2 A of outputcurrent in a small, low profile footprint.Applications Regulation to noise sensitive applications: phase-locked loops (PLLs), voltage controlled oscillators (VCOs), and PLLs with integrated VCOs Communications and infrastructure Backhaul and microwave links

RF Amplifier Low Noise Amplifier, LNA

The HMC472ALP4E are broadband 6-bit GaAs IC digital attenuators in low cost leadless surface mount packages. This single positive control line per bit digital attenuator incorporates off chip AC ground capacitors for near DC operation, making it suitable for a wide variety of RF and IF applications. Covering DC to 3.8 GHz, the insertion loss is less than 2.0 dB typical. The attenuator bit values are 0.5 (LSB), 1, 2, 4, 8, and 16 dB for a total attenuation of 31.5 dB. Attenuation accuracy is excellent at ? 0.25 dB typical step error with an IIP3 of +54 dBm. Six TTL/CMOS control inputs are used to select each attenuation state. A single Vdd bias of +5V is required.APPLICATIONSThe HMC472ALP4E is ideal for: 3G Infrastructure & access points? Cellular/3G, LTE & UMB WiMAX, WiBN & Fixed Wireless? Test Equipment and Sensors GSM, WCDMA & TD-SCDMA

The AD633 is a functionally complete, four-quadrant, analog multiplier. It includes high impedance, differential X and Y inputs, and a high impedance summing input (Z). The low impedance output voltage is a nominal 10 V full scale provided by a buried Zener. The AD633 is the first product to offer these features in modestly priced 8-lead PDIP and SOIC packages.The AD633 is laser calibrated to a guaranteed total accuracy of 2% of full scale. Nonlinearity for the Y input is typically less than 0.1% and noise referred to the output is typically less than 100 ?V rms in a 10 Hz to 10 kHz bandwidth. A 1 MHz bandwidth, 20 V/?s slew rate, and the ability to drive capacitive loads make the AD633 useful in a wide variety of applications where simplicity and cost are key concerns.The versatility of the AD633 is not compromised by its simplicity. The Z input provides access to the output buffer amplifier, enabling the user to sum the outputs of two or more multipliers, increase the multiplier gain, convert the output voltage to a current, and configure a variety of applications.The AD633 is available in 8-lead PDIP and SOIC packages. It is specified to operate over the 0?C to 70?C commercial temperature range (J Grade) or the ?40?C to +85?C industrial temperature range (A Grade).Product Highlights The AD633 is a complete four-quadrant multiplier offered in low cost 8-lead SOIC and PDIP packages. The result is a product that is cost effective and easy to apply. No external components or expensive user calibration are required to apply the AD633. Monolithic construction and laser calibration make the device stable and reliable. High (10 M?) input resistances make signal source loading negligible. Power supply voltages can range from ?8 V to ?18 V. The internal scaling voltage is generated by a stable Zener diode; multiplier accuracy is essentially supply insensitive.Applications Multiplication, division, squaring Modulation/demodulation, phase detection Voltage-controlled amplifiers/attenuators/filters

The AD6688-3000EBZ supports the AD6688-3000, a 14-bit, 3GSPS dual analog-to-digital converter (ADC). The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This device is designed support direct RF sampling analog signals of up to 5 GHz. The 3 dB bandwidth of the ADC input is greater than 9 GHz. The AD6688 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package. This reference design provides all of the support circuitry required to operate the ADC in its various modes and configurations. It is designed to interface directly with the ADS7-V2EBZ data capture card, allowing users to download captured data for analysis. The device control and subsequent data analyses can now be done using the ACE software package.

The AD8122 is a triple, high speed, differential receiver and equalizer that compensates for the transmission losses of UTP and coaxial cables up to 300 meters in length. Various gain stages are summed together to best approximate the inverse frequency response of the cable. Each channel features a high impedance differential input that is ideal for interfacing directly with the cable.The AD8122 has two control inputs for optimal cable compensation, one LPF control input, an input to select between UTP and coax cable, and an output offset adjust input. The cable compensation inputs are used to compensate for different cable lengths; the VPEAK input controls the amount of high frequency peaking and the VGAIN input adjusts the broadband flat gain, which compensates for the flat cable loss. The VFILTER input controls the cutoff frequency of output lowpass filters on each channel. Selection between UTP and coaxial cable compensation responses is determined by the binary COAX/UTP?input, which can be left floating in UTP applications. The VOFFSET pin allows the dc voltage at the output to be adjusted, which can be useful in dc-coupled systems.For added flexibility, the gains of each channel can be set to x1 or x2 using the associated GAIN control pins.The AD8122 is available in a 6 mm ? 6 mm, 40-lead LFCSP and is rated to operate over the extended temperature range of ?40?C to +85?C.APPLICATIONS Keyboard-video-mouse (KVM) Digital signage RGB video over UTP cables Professional video projection and distribution HD video Security video

The AD8319 is a demodulating logarithmic amplifier, capable of accurately converting an RF input signal to a corresponding decibel-scaled output. It employs the progressive compression technique over a cascaded amplifier chain, each stage of which is equipped with a detector cell. The device can be used in either measurement or controller modes. The AD8319 maintains accurate log conformance for signals of 1 MHz to 8 GHz and provides useful operation to 10 GHz. The input dynamic range is typically 40 dB (re: 50 ?) with error less than ?1 dB. The AD8319 has 8 ns/10 ns response time (fall time/rise time) that enables RF burst detection to a pulse rate of beyond 50 MHz. The device provides unprecedented logarithmic intercept stability vs. ambient temperature conditions. A supply of 3.0 V to 5.5 V is required to power the device. Current consumption is typically 22 mA, and it decreases to 200 ?A when the device is disabled.?The AD8319 can be configured to provide a control voltage to a power amplifier or a measurement output from the VOUT pin. Because the output can be used for controller applications, special attention was paid to minimize wideband noise. In this mode, the setpoint control voltage is applied to the VSET pin.The feedback loop through an RF amplifier is closed via VOUT, the output of which regulates the amplifier?s output to a magnitude corresponding to VSET. The AD8319 provides 0 V to (VPOS ? 0.1 V) output capability at the VOUT pin, suitable for controller applications. As a measurement device, VOUT is externally connected to VSET to produce an output voltage, VOUT, that is a decreasing linear-in-dB function of the RF input signal amplitude.The logarithmic slope is ?22 mV/dB, determined by the VSET interface. The intercept is 15 dBm (re: 50 ?, CW input) using the INHI input. These parameters are very stable against supply and temperature variations.The AD8319 is fabricated on a SiGe bipolar IC process and is available in a 2 mm ? 3 mm, 8-lead LFCSP_VD for an operating temperature range of ?40?C to +85?C.ApplicationsRF transmitter PA setpoint controls and level monitoring Power monitoring in radiolink transmitters RSSI measurement in base stations, WLANs, WiMAX, and radars