High Performance, Narrow-Band Transceiver IC Features: High performance, low power, narrow-band transceiver Enhanced performance ADF7021-N with external VCO Frequency bands using external VCO: 80 MHz to 960 MHz Improved adjacent channel power (ACP) and adjacent channel rejection (ACR) compared with the ADF7021-N Programmable IF filter bandwidths: 9 kHz, 13.5 kHz, and 18.5 kHz Modulation schemes: 2FSK, 3FSK, 4FSK, MSK Spectral shaping: Gaussian and raised cosine filtering Data rates: 0.05 kbps to 24 kbps Power supply: 2.3 V to 3.6 V See data sheet for additional Features

24-Bit, 8.5 mW, 109 dB, 128 kSPS/64 kSPS/32 kSPS ADCs Features: Download AD7766-2-KGD Data Sheet. Available as Known Good Die and fully guaranteed in data sheet specifications Oversampled successive approximation (SAR) architecture High performance ac and dc accuracy, low power 115.5 dB dynamic range, 32 kSPS (AD7766-2) 112.5 dB dynamic range, 64 kSPS (AD7766-1) 109.5 dB dynamic range, 128 kSPS (AD7766) −112 dB THD Exceptionally low power 8.5 mW, 32 kSPS (AD7766-2) 10.5 mW, 64 kSPS (AD7766-1) 15 mW, 128 kSPS (AD7766) High dc accuracy 24 bits, no missing codes (NMC) INL: ±6 ppm (typical), ±15 ppm (maximum) Low temperature drift Zero error drift: 15 nV/°C Gain error drift: 0.4 ppm/°C See data sheet for additional features

2.5 V to 5.5 V, 500 A, Quad Voltage Output 10-Bit DAC in 10-Lead Packages Features: 4 buffered 10-Bit DACs in 10-lead MSOP and 10-lead LFCSP A, W Version: ±4 LSB INL, B Version: ±2.5 LSB INL Low power operation: 500 µA @ 3 V, 600 µA @ 5 V 2.5 V to 5.5 V power supply Guaranteed monotonic by design over all codes Power-down to 80 nA @ 3 V, 200 nA @ 5 V Double-buffered input logic Output range: 0 V to VREF Power-on reset to 0 V Simultaneous update of outputs (LDAC function) Low power-, SPI®-, QSPI™-, MICROWIRE™-, and DSP-compatible 3-wire serial interface On-chip, rail-to-rail output buffer amplifiers Temperature range –40°C to +105°C Qualified for automotive applications

Integrated, Precision Battery Sensor for Automotive Features: High precision ADC Dual channel, simultaneous sampling, 16-bit Σ-Δ ADCs Programmable ADC throughput from 10 Hz to 1 kHz On-chip 5 ppm/ºC voltage reference Current channel Fully differential, buffered input Programmable gain ADC input range: −200 mV to +300 mV Digital comparator with current accumulator feature Voltage channel Buffered, on-chip attenuator for 12 V battery input JTAG port supports code download and debug Memory 64 kB Flash/EE memory options, 4-kB SRAM 10,000-cycle Flash/EE endurance, 20-year Flash/EE retention In-circuit download via JTAG and LIN On-chip peripherals LIN 2.1-compatible slave SPI GPIO port 1 × general-purpose timer Wake-up and watchdog timers On-chip power-on-reset See data sheet for additional features

Low Noise Precision Dual Op Amp Features: Very low noise density of 5 nV/√Hz at 1 kHz maximum  Excellent input offset voltage of 75 μV maximum Low offset voltage drift of 1 μV/°C maximum  Very high gain of 1500 V/mV minimum Outstanding CMR of 106 dB minimum  Slew rate of 2.4 V/μs typical  Gain bandwidth product of 5 MHz typical Industry-standard 8-lead dual pinout

4.0 Gbps Dual Driver

Software Selectable, True Bipolar Input, 8-Channel, 12-Bit Plus Sign A/D Converter Features: 12-Bit plus Sign SAR ADC True Bipolar Input Ranges Software Selectable Input Ranges: ± 10V, ± 5V, ± 2.5V, 0 to 10V Eight Analog Input Channels with Channel Sequencer Single Ended, True Differential and Pseudo Differential Analog Input Capability High Analog Input Impedance Low Power: 26 mW Full Power Signal Bandwidth: >13 MHz Internal 2.5 V Reference High Speed Serial Interface - 1 MSPS Throughput For four and two channel equivalent devices, see AD7324, AD7322

CMOS, 5 V/+5 V/+3 V, Triple SPDT Switch Features: ±2 V to ±6 V dual-supply operation 2 V to 12 V single-supply operation Temperature range: −40°C to +125°C  <0.2 nA leakage currents  52 Ω on resistance over full signal range  Rail-to-rail switching operation  16-lead LFCSP and TSSOP packages  Typical power consumption: <0.1 μW  TTL-/CMOS-compatible inputs  Package upgrades to 74HC4053 and MAX4053/MAX4583

The HMC611LP4(E) Logarithmic Detector/Controller converts RF signals at its input, to a proportional DC voltage at its output. The HMC611LP4(E) employs a successive compression topology which delivers extremely high dynamic range and conversion accuracy over a wide input frequency range. As the input power is increased, successive amplifiers move into saturation one by one creating an accurate approximation of the logarithm function.The output of a series of square law detectors is summed, converted into voltage domain and buffered to drive the LOGOUT output. For detection mode, the LOGOUT pin is shorted to the VSET input, and will provide a nominal logarithmic slope of -25mV/dB and an intercept of 18 dBm (22 dBm for ƒ ≥ 5.8 GHz). The HMC611LP4(E) can also be used in the controller mode where an external voltage is applied to the VSET pin, to create an AGC or APC feedback loop.Applications Cellular/PCS/3G WiMAX, WiBro, WLAN, Fixed Wireless & Radar Power Monitoring & Control Circuitry Receiver Signal Strength Indication (RSSI) Automatic Gain & Power Control

3 AXIS 2 G LOW COST ACCELEROMETER T&R