The ADCMP563/ADCMP564 are high speed comparatorsfabricated on Analog Devices’ proprietary XFCB process. Thedevices feature a 700 ps propagation delay with less than 75 psoverdrive dispersion. Dispersion, a measure of the difference inpropagation delay under differing overdrive conditions, is a particularlyimportant characteristic of high speed comparators. A separateprogrammable hysteresis pin is available on the ADCMP564.A differential input stage permits consistent propagation delaywith a wide variety of signals in the common-mode range from−2.0 V to +3.0 V. Outputs are complementary digital signals thatare fully compatible with ECL 10 K and 10 KH logic families.The outputs provide sufficient drive current to directly drivetransmission lines terminated in 50 Ω to −2 V. A latch input,which is included, permits tracking, track-and-hold, or sample-and-holdmodes of operation. The latch input pins contain internalpull-ups that set the latch in tracking mode when left open.The ADCMP563/ADCMP564 are specified over the industrialtemperature range (−40°C to +85°C).Applications Automatic test equipment High speed instrumentation Scope and logic analyzer front ends Window comparators High speed line receivers Threshold detection Peak detection High speed triggers Patient diagnostics Hand-held test instruments Zero crossing detectors Line receivers and signal restoration Clock drivers

The ADF4116/ADF4117/ADF4118 are frequency synthesizers which can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. Theyconsist of a low-noise digital PFD (Phase Frequency Detector), a precision charge pump, a programmable reference divider, programmable A and B counters and a dual-modulus prescaler (P/P+1). The A (5-bit)and B (13-bit) counters, in conjunction with the dual modulus prescaler (P/P+1), implement an N divider (N= BP+A). In addition, the 14-bit reference counter (R Counter), allows selectable REFIN frequencies at the PFD input. A complete PLL (Phase-LockedLoop) can be implemented if the synthesizer is used with an external loop filter and VCO (Voltage Controlled Oscillator).Control of all the on-chip registers is via a simple 3-wire interface.The devices operate with a 2.7V (± 10%) or 5V (± 10%) power supply and can be powered when not in use.

The ADG411 is a monolithic CMOS device comprising four independently selectable switches. It is designed on an enhanced LC2MOS process which provides low power dissipation yet gives high switching speed and low on resistance.The ADG411 switches are turned on with a logic low on the appropriate control input. Each switch conducts equally well in both directions when ON and each has an input signal range that extends to the supplies. All switches exhibit break-before-make switching action for use in multiplexer applications. Inherent in the design is low charge injection for minimum transients when switching the digital inputs.

The ADG436 is a monolithic CMOS device comprising two independently selectable SPDT switches. It is designed on an LC2MOS process which provides low power dissipation yet gives high switching speed and low on resistance.Each switch conducts equally well in both directions when ON and has an input signal range which extends to the power supplies. In the OFF condition, signal levels up to the supplies are blocked. All switches exhibit break-before-make switching action for use in multiplexer applications. Inherent in the design is low charge injection for minimum transients when switching the digital inputs.

The ADG451 is a monolithic CMOS device comprising four independently selectable switches. It is designed on an enhanced LC2MOS process which provides low power dissipation yet gives high switching speed and low on resistance. The ADG451 switches are turned on with a logic low on the appropriate control input. Each switch conducts equally well in both directions when ON and each has an input signal range that extends to the supplies. All switches exhibit break-before-make switching action for use in multiplexer applications. Inherent in the design is low charge injection for minimum transients when switching the digital inputs.APPLICATIONS Relay Replacement Audio and Video Switching Automatic Test Equipment Precision Data Acquisition Battery-Powered Systems Sample Hold Systems Communication Systems PBX, PABX Systems Avionics

The ADG452 is a monolithic CMOS device comprising four independently selectable switches. It is designed on an enhanced LC2MOS process which provides low power dissipation yet gives high switching speed and low on resistance.The ADG452 switches are turned on with a logic high on the appropriate control input. Each switch conducts equally well in both directions when ON and each has an input signal range that extends to the supplies. All switches exhibit break-before-make switching action for use in multiplexer applications. Inherent in the design is low charge injection for minimum transients when switching the digital inputs.

The HMC311SC70(E) is a GaAs InGaP Heterojunction Bipolar Transistor (HBT) Gain Block MMIC SMT DC to 8 GHz amplifier. Packaged in an industry standard SC70, the amplifier can be used as either a cascadable 50 Ohm gain stage or to drive the LO port of HMC mixers with up to +15 dBm output power. The HMC311SC70(E) offers 15 dB of gain and an output IP3 of +30 dBm while requiring only 54 mA from a +5V supply. The Darlington topology results in reduced sensitivity to normal process variations, and yields excellent gain stability over temperature while requiring a minimal number of external bias components.Applications Cellular / PCS / 3G WiBro / WiMAX / 4G Fixed Wireless & WLAN CATV, Cable Modem & DBS Microwave Radio & Test Equipment

The HMC1034LP6GE is a low-noise, wide-band clock generator IC with a fractional-N Phase Locked Loop (PLL) that features an integrated Voltage Controlled Oscillator (VCO). The device provides differential clock outputs between 125MHz and 3GHz range. The HMC1034LP6GE features low noise Phase Detector (PD) and Delta-Sigma modulator, capable of operating at up to 100MHz, permit wider loop-bandwidths with excellent spectral performance.The HMC1034LP6GE features industry leading phase noise and jitter performance, across the operating range, that enable it to improve link level jitter performance, Bit-Error-Rates (BER) and eye diagram metrics. The superior noise floor (<-165dBc/Hz) makes the HMC1034LP6GE an ideal source for a variety of applications–such as clock references for high speed data converters, physical layer devices (PHY), serializer/deserializer (SERDES) circuits, FPGAs and processors. The HMC1034LP6GE can also be used as an LO for 10G/40G/100G optical modules and transponders, as well as primary reference clock for 10G/40G/100G line cards, and for jitter attenuation and frequency translation.The differential output of the HMC1034LP6GE includes a 2-bit output amplitude control which may be set via the SPI serial programming interface, and an output Mute function. The Delta-Sigma Modulator of the HMC1034LP6GE features Hittite’s Exact Frequency Mode, which enables users to generate output frequencies with close to 0 Hz frequency error.APPLICATIONS 10G/40G/100G Optical Modules, Transponders, Line Cards OTN and SONET/SDH Applications 1G/10G Ethernet Line Cards High Frequency Processor Clocks Low Jitter SAW Oscillator Replacement  Fiber Channel Interface Clocks Cellular/4G Infrastructure DDS Replacement 10G Optical Modules, Transponders, Line Cards

The HMC1035LP6GE is a low-noise, wide-band 3.3 V clock generator IC with a fractional-N Phase Locked Loop (PLL) that features an integrated Voltage Controlled Oscillator (VCO). The device provides differential clock outputs between 25 MHz and 2500 MHz range. The HMC1035LP6GE features a low noise Phase Detector (PD) and Delta-Sigma modulator, capable of operating at up to 100 MHz which permits wider loop-bandwidths and excellent spurious performance.The HMC1035LP6GE features industry leading phase noise and jitter performance, across the operating range, that enable it to improve link level jitter performance, Bit-Error-Rates (BER) and eye diagram metrics. The superior noise floor (<-162 dBc/Hz) makes the HMC1035LP6GE an ideal source for a variety of applications–such as clock references for high speed data converters, physical layer devices (PHY), serializer/deserializer (SER DES) circuits, FPGAs and processors. The HMC1035LP6GE can also be used as an LO for 10G/40G/100G optical modules and transponders, as well as primary reference clock for 10G/40G/100G line cards, and for jitter attenuation and frequency translation.The differential output of the HMC1035LP6GE can be set to either External Termination, which could be used for LVPECL operation, or Internal Termination for operation in an LVDS compatible mode or LVPECL. Additionally, an ouput swing adjustment makes the device flexible and compatible with a wide variety of signal level requirements. The output can be internally terminated to reduce component count and cost or could be terminated externally using standard LVPECL termination methods. An Output Mute function allows the user to shut off the outputs, such as may be required for board testing or debugging. The LVPECL/LVDS, amplitude select and Output Mute function are all programmed SPI serial programming.The HMC1035LP6GE is designed to select between a Power Priority or a Performance Priority mode. The Power Priority setting reduces the current consumption of the part, whereas the Performance Priority setting improves the Jitter and Phase Noise performance.The 24 bit Delta-Sigma Modulator further enhances Hittite’s Exact Frequency Mode, which enables users to generate output frequencies with 0 Hz frequency error in many applications.APPLICATIONS 10G/40G/100G Optical Modules, Transponders, Line Cards OTN and SONET /SDH Applications Data Converters, Sample Clock Generation Cellular/4G Infrastructure High Frequency Processor/FPGA Clocks Any Frequency Clock Rate Generation Low Jitter SAW Oscillator Replacement DDS Replacement Frequency Translation Frequency Margining

The HMC207AS8E is a miniature double- balanced mixer in an 8 lead plastic surface mount Small Outline IC (SOIC) package. This passive MMIC mixer is constructed of GaAs Schottky diodes and novel planar transformer baluns on the chip. The device can be used as an upconverter, downconverter, biphase modulator (de)modulator, or phase comparator. The consistent MMIC performance will improve system operation and assure regulatory compliance. The high LO suppression of 45 to 50 dB yields excellent carrier suppression for modulator applications.Applications Base Stations  Cable Modems  Portable Wireless