Dual 12-Bit nanoDAC with 5 ppm/C On-Chip Reference Features: Low power, smallest pin-compatible, dual nanoDAC AD5663R: 16 bits AD5643R: 14 bits AD5623R: 12 bits User-selectable external or internal reference External reference default On-chip 1.25 V/2.5 V, 5 ppm/°C reference 10-lead MSOP and 3 mm × 3 mm LFCSP 2.7 V to 5.5 V power supply Guaranteed monotonic by design See data sheet for additional featuresAD5623R-EP supports defense and aerospace applications (AQEC standard) Download AD5623R-EP Data Sheet (pdf) Extended temperature range: −55°C to +105°C Controlled manufacturing baseline One assembly/test site One fabrication site Enhanced product change notification Qualification data available on request V62/14633-01XE DSCC Drawing Number

The fourth generation of SHARC® Processors now includes the low power floating point DSP products – the ADSP-21478 and ADSP-21479 and offers increased performance, hardware-based filter accelerators, audio and application-focused peripherals, and new memory configurations capable of supporting a single chip solution. All devices are pin-compatible with each other and completely code-compatible with all prior SHARC Processors. These newest members of the fourth generation SHARC Processor family are based on a single-instruction, multiple-data (SIMD) core, which supports both 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats and their low power make them particularly suitable for battery powered applications or where a higher ambient operating temperature is required.The ADSP-21478 offers a very low power and high performance – 266 MHz/1596 MFLOPs – in a BGA and LQFP package within the fourth generation SHARC Processor family. This feature of power makes the ADSP-21478 particularly well suited to address the automotive audio and many industrial control segments where low power is a requirement. In addition to its high core performance, the ADSP-21478 includes additional processing blocks such as FIR, IIR, and FFT accelerators to increase the total performance of the system. There is a new feature called Variable Instruction Set Architecture (VISA) that allows the code size to be decreased by 20% to 30% and increase the memory size availability. The fourth generation DSP allows the ability to connect to external memory by providing a glueless interface to 16-bit wide SDR SDRAMs.Fourth-generation SHARC Processors also integrate application-specific peripherals designed to simplify hardware design, minimize design risks, and ultimately reduce time to market. Grouped together, and broadly named the Digital Applications Interface (DAI), these functional blocks may be connected to each other or to external pins via the software-programmable Signal Routing Unit (SRU). The SRU is an innovative architectural feature that enables complete and flexible routing amongst DAI blocks. Peripherals connected through the SRU include but are not limited to serial ports, SPI ports, S/PDIF Tx/Rx, and an 8-Channel asynchronous sample rate converter block. The fourth generation SHARC allows data from the serial ports to be directly transferred to external memory by the DMA controller. Other peripherals such as UART and Two-Wire Interface are routed through a Digital Peripheral Interface (DPI).

OP-AMP, 10.4MHZ, 6 TO 40V, MSOP-8;

ADC 10BIT 100KSPS MSOP-8; Resolution (Bits):10bit; Sampling Rate:100kSPS; Supply Voltage Type:Single; Supply Voltage Min:2.7V; Supply Voltage Max:5.5V; ADC / DAC Case Style:MSOP; No. of Pins:8Pins; Input Channel Type:Single Ended; Data Interface:SPI; Operating Temperature Min:-40°C; Operating Temperature Max:85°C; Packaging:Each; Product Range:Single 10-Bit SAR ADCs; Automotive Qualification Standard:-; MSL:MSL 1 - Unlimited; SVHC:No SVHC (20-Jun-2016); Supply Current:2mA

RF Amplifier IC WiMAX / WiBro 2.3GHz ~ 2.7GHz 16-QFN (3x3)

RF Mixer IC Radar Up Converter 8.5GHz ~ 13.5GHz 24-QFN (4x4)

The AD5308 / AD5318 / AD5328 are octal 8-, 10-, and 12-bit buffered voltage output DACs in a 16-lead TSSOP. They operate from a single 2.5 V to 5.5 V supply, consuming 0.7 mA typical at 3 V. Their on-chipoutput amplifiers allow the outputs to swing rail-to-rail with a slew rate of 0.7 V/μs. The AD5308 / AD5318 / AD5328 use a versatile 3-wire serial interface that operates at clock rates up to 30 MHz and is compatible with standard SPI, QSPI, MICROWIRE, and DSP interface standards.The references for the eight DACs are derived from two reference pins (one per DAC quad). These reference inputs can be configured as buffered, unbuffered, or VDD inputs. The parts incorporate a power-on reset circuit, which ensures that the DAC outputs power up to 0 V and remain there until a valid write to the device takes place. The outputs of all DACs may be updated simultaneously using the asynchronous LDAC input. The parts contain a power-down feature that reduces the current consumption of the devices to 400 nA at 5 V (120 nA at 3 V). The eight channels of the DAC may be powered down individually.All three parts are offered in the same pinout, which allows users to select the resolution appropriate for their application without redesigning their circuit board.APPLICATIONS Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Optical networking Automatic test equipment Mobile communications Programmable attenuators Industrial process control

ADSP-BF561 EZ-KIT Lite® Blackfin® Blackfin® DSP Embedded Evaluation Board

ADSP-BF707 BLIP Blackfin® DSP Embedded Evaluation Board

PWM PROBING BOARD, ARM, CORTEX-M4;