The ADUX1020 is a highly efficient photometric sensor with an integrated 14-bit analog-to-digital converter (ADC) and a 20-bit burst accumulator that works in concert with a flexible light emitting diode (LED) driver. It is designed to modulate a LED and measure the corresponding optical return signal. The digital engine includes circuitry and control for data aggregation and proximity detection.The data output and device configuration use a 1.8 V I2C interface. The control circuitry includes flexible LED pulse width and period generation combined with synchronous detection. This circuitry is complemented by a low noise, low power, and wide dynamic range configurable analog front end (AFE), clock generation, LED driver, and digital logic for position and smart sample mode (event driven x, y coordinates, relative z data). This complete AFE features ambient light rejection, avoiding corruption due to external interference.One inexpensive standard surface mount, broad angle or narrow angle IR LED (depending upon application) is required. This LED mounts externally to the ADUX1020.Packaged in a small clear mold 2 mm × 3 mm, 8-lead LFCSP, the ADUX1020 is specified over an operating temperature range of −40°C to +85°C.Applications Gesture for user interface (UI )control in portable devices Industrial/automation monitoring Presence detection Angle sensing

The LTC3649 is a high efficiency 60V, 4A synchronous monolithic step-down regulator. The regulator features a single resistor programmable output voltage, internal compensation and high efficiencies over a wide VOUT range.The step-down regulator operates from an input voltage range of 3.1V to 60V and provides an adjustable rail-to-rail output range from (VIN – 0.5V) to ground while delivering up to 4A of output current. The switching frequency is also adjusted with an external resistor. A user-selectable mode input is provided to allow the user to trade off ripple noise for efficiency at light loads; Burst Mode operation provides the highest efficiency at light loads, while forced continuous mode provides low output ripple. The MODE/SYNC pin can also be used to allow the user to synchronize the switching frequency to an external clock.The LTC3649 operates with a peak current mode architecture that allows for fast transient response with inherent cycle-to-cycle current limit protection. It also features programmable output current limit, current monitoring and input voltage regulation.Applications Industrial Applications Automotive Applications

The LTC6951 is a high performance, low noise, Phase Locked Loop (PLL) with a fully integrated VCO. The low noise VCO uses no external components and is internally calibrated to the correct output frequency with no external system support.The clock generation section provides five outputs based on the VCO prescaler signal with individual dividers for each output. Four outputs feature very low noise, low skew CML logic. The fifth output is low noise LVDS. All outputs can be synchronized and set to precise phase alignment using the programmable delays.Choose the LTC6951-1 if any desired output frequency falls in the ranges 2.5GHz to 2.7GHz, 1.66GHz to 1.8GHz, or 1.25GHz to 1.35GHz. Choose the LTC6951 for all other frequencies.Applications High Performance Data Converter Clocking Wireless Infrastructure Test and Measurement

The LTC4367 protects applications where power supply input voltages may be too high, too low or even negative. It does this by controlling the gate voltages of a pair of external N-channel MOSFETs to ensure that the output stays within a safe operating range.The LTC4367 withstands voltages between –40V and 100V and has an operating range of 2.5V to 60V, while consuming only 70μA in normal operation.Two comparator inputs allow configuration of the overvoltage (OV) and undervoltage (UV) set points using an external resistive divider. A shutdown pin provides external control for enabling and disabling the MOSFETs as well as placing the device in a low current shutdown state. A fault output indicates that the GATE pin is pulling low when the part is in shutdown or the input voltage is outside the UV and OV set points.The LTC4367 has a 32ms turn-on delay that debounces live connections and blocks 50Hz to 60Hz AC power. For fast recovery after faults, the LTC4367-1 has a reduced turn-on delay of 500μs.Applications Portable InstrumentationIndustrial AutomationAutomotive Surge (Load Dump) ProtectionNetwork Equipment

The AD4003/AD4007/AD4011 are high accuracy, high speed, low power, 18-bit, Easy Drive, precision successive approximation register (SAR) analog-to-digital converters (ADCs) that operate from a single power supply, VDD. The reference voltage, VREF, is applied externally and can be set independent of the supply voltage. The AD4003/AD4007/AD4011 power scales linearly with throughput. Easy Drive features reduce both signal chain complexity and power consumption while enabling higher channel density. The reduced input current, particularly in high-Z mode, coupled with a long signal acquisition phase, eliminates the need for a dedicated ADC driver. Easy Drive broadens the range of companion circuitry that is capable of driving these ADCs (see Figure 2 in the data sheet).Input span compression eliminates the need to provide a negative supply to the ADC driver amplifier while preserving access to the full ADC code range. The input overvoltage clamp protects the ADC inputs against overvoltage events, minimizing disturbances on the reference pin and eliminating the need for external protection diodes. Fast device throughput up to 2 MSPS allows users to accurately capture high frequency signals and to implement oversampling techniques to alleviate the challenges associated with antialias filter designs. Decreased serial peripheral interface (SPI) clock rate requirements reduce digital input and output power consumption, broadens digital host options, and simplifies the task of sending data across digital isolation. The SPI-compatible serial user interface is compatible with 1.8 V, 2.5 V, 3 V, and 5 V logic by using the separate VIO logic supply.APPLICATIONS Automated test equipment Machine automation Medical equipment Battery-powered equipment Precision data acquisition systems Instrumentation and control systems

The AD4000/AD4004/AD4008 are high accuracy, high speed, low power, 16-bit, Easy Drive, precision successive approximation register (SAR) analog-to-digital converters (ADCs) that operate from a single power supply, VDD. The reference voltage, VREF, is applied externally and can be set independent of the supply voltage. The AD4000/AD40004/AD4008 power scales linearly with throughput. Easy Drive features reduce both signal chain complexity and power consumption while enabling higher channel density. The reduced input current, particularly in high-Z mode, coupled with a long signal acquisition phase, eliminates the need for a dedicated ADC driver. Easy Drive broadens the range of companion circuitry that is capable of driving these ADCs (see Figure 2 in the data sheet). Input span compression eliminates the need to provide a negative supply to the ADC driver amplifier while preserving access to the full ADC code range. The input overvoltage clamp protects the ADC inputs against overvoltage events, minimizing disturbances on the reference pin and eliminating the need for external protection diodes. Fast device throughput up to 2 MSPS allows users to accurately capture high frequency signals and to implement oversampling techniques to alleviate the challenges associated with antialias filter designs. Decreased serial peripheral interface (SPI) clock rate requirements reduce digital input and output power consumption, broadens digital host options, and simplifies the task of sending data across digital isolation. The SPI-compatible serial user interface is compatible with 1.8 V, 2.5 V, 3 V, and 5 V logic by using the separate VIO logic supply.APPLICATIONS Automated test equipment Machine automation Medical equipment Battery-powered equipment Precision data acquisition systems Instrumentation and control systems

The AD6684 is a 135 MHz bandwidth, quad intermediate frequency (IF) receiver. It consists of four 14-bit, 500 MSPS ADCs and various digital processing blocks consisting of four wideband DDCs, an NSR, and VDR monitoring. The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This device is designed to support communications applications. The analog full power bandwidth of the device is 1.4 GHz. The quad ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. The AD6684 is optimized for wide input bandwidth, excellent linearity, and low power in a small package. The analog inputs and clock signal input are differential. Each pair of ADC data outputs are internally connected to two DDCs through a crossbar mux. Each DDC consists of up to five cascaded signal processing stages: a 48-bit frequency translator, NCO, and up to four half-band decimation filters. Each ADC output is connected internally to an NSR block. The integrated NSR circuitry allows improved SNR performance in a smaller frequency band within the Nyquist bandwidth. The device supports two different output modes selectable via the serial port interface (SPI). With the NSR feature enabled, the outputs of the ADCs are processed such that the AD6684 supports enhanced SNR performance within a limited portion of the Nyquist bandwidth while maintaining a 9-bit output resolution. Each ADC output is also connected internally to a VDR block. This optional mode allows full dynamic range for defined input signals. Inputs that are within a defined mask (based on DPD applications) are passed unaltered. Inputs that violate this defined mask result in the reduction of the output resolution. With VDR, the dynamic range of the observation receiver is determined by a defined input frequency mask. For signals falling within the mask, the outputs are presented at the maximum resolution allowed. For signals exceeding defined power levels within this frequency mask, the output resolution is truncated. This mask is based on DPD applications andsupports tunable real IF sampling, and zero IF or complex IF receive architectures. Operation of the AD6684 in the DDC, NSR, and VDR modes is selectable via SPI-programmable profiles (the default mode is NSR at startup).In addition to the DDC blocks, the AD6684 has several functions that simplify the AGC function in the communications receiver. The programmable threshold detector allows monitoring of the incoming signal power using the fast detect output bits of the ADC. If the input signal level exceeds the programmable threshold, the fast detect indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition at the ADC input. Users can configure each pair of IF receiver outputs onto either one or two lanes of Subclass 1 JESD204B-based high speed serialized outputs, depending on the decimation ratio and the acceptable lane rate of the receiving logic device. Multiple device synchronization is supported through the SYSREF±, SYNCINB±AB, and SYNCINB±CD input pins. The AD6684 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using the 1.8 V capable, 3-wire SPI. The AD6684 is available in a Pb-free, 72-lead LFCSP and is specified over the −40°C to +105°C junction temperature range. Product Highlights Low power consumption per channel. JESD204B lane rate support up to 15 Gbps. Wide full power bandwidth supports IF sampling of signals up to 1.4 GHz. Buffered inputs ease filter design and implementation. Four integrated wideband decimation filters and NCO blocks supporting multiband receivers. Programmable fast overrange detection. On-chip temperature diode for system thermal management.Applications Communications Diversity multiband, multimode digital receivers 3G/4G, W-CDMA, GSM, LTE, LTE-A HFC digital reverse path receivers Digital predistortion observation paths General-purpose software radios

The AD7124-4 is a low power, low noise, completely integrated analog front end for high precision measurement applications. The device contains a low noise, 24-bit Σ-Δ analog-to-digital converter (ADC), and can be configured to have 4 differential inputs or 7 single-ended or pseudo differential inputs. The onchip low gain stage ensures that signals of small amplitude can be interfaced directly to the ADC.One of the major advantages of the AD7124-4 is that it gives the user the flexibility to employ one of three integrated power modes. The current consumption, range of output data rates, and rms noise can be tailored with the power mode selected. The device also offers a multitude of filter options, ensuring that the user has the highest degree of flexibility.The AD7124-4 can achieve simultaneous 50 Hz and 60 Hz rejection when operating at an output data rate of 25 SPS (single cycle settling), with rejection in excess of 80 dB achieved at lower output data rates.The AD7124-4 establishes the highest degree of signal chain integration. The device contains a precision, low noise, low drift internal band gap reference, and also accepts an external differential reference, which can be internally buffered. Other key integrated features include programmable low drift excitation current sources, burnout currents, and a bias voltage generator, which sets the common-mode voltage of a channel to AVDD/2. The low-side power switch enables the user to power down bridge sensors between conversions, ensuring the absolute minimal power consumption of the system. The device also allows the user the option of operating with either an internal clock or an external clock.The integrated channel sequencer allows several channels to be enabled simultaneously, and the AD7124-4 sequentially converts on each enabled channel, simplifying communication with the device. As many as 16 channels can be enabled at any time; a channel being defined as an analog input or a diagnostic such as a power supply check or a reference check. This unique feature allows diagnostics to be interleaved with conversions.The AD7124-4 also supports per channel configuration. The device allows eight configurations or setups. Each configuration consists of gain, filter type, output data rate, buffering, and reference source. The user can assign any of these setups on a channel by channel basis.The AD7124-4 also has extensive diagnostic functionality integrated as part of its comprehensive feature set. These diagnostics include a cyclic redundancy check (CRC), signal chain checks, and serial interface checks, which lead to a morerobust solution. These diagnostics reduce the need for external components to implement diagnostics, resulting in reduced board space needs, reduced design cycle times, and cost savings. The failure modes effects and diagnostic analysis (FMEDA) of a typical application has shown a safe failure fraction (SFF) greater than 90% according to IEC 61508.The device operates with a single analog power supply from 2.7 V to 3.6 V or a dual 1.8 V power supply. The digital supply has a range of 1.65 V to 3.6 V. It is specified for a temperature range of −40°C to +105°C. The AD7124-4 is housed in a 32-lead LFCSP package or a 24-lead TSSOP package.Applications Temperature measurement  Pressure measurement  Industrial process control  Instrumentation Smart transmitters Smart transmitters

The AD7124-4 is a low power, low noise, completely integrated analog front end for high precision measurement applications. The device contains a low noise, 24-bit Σ-Δ analog-to-digital converter (ADC), and can be configured to have 4 differential inputs or 7 single-ended or pseudo differential inputs. The onchip low gain stage ensures that signals of small amplitude can be interfaced directly to the ADC.One of the major advantages of the AD7124-4 is that it gives the user the flexibility to employ one of three integrated power modes. The current consumption, range of output data rates, and rms noise can be tailored with the power mode selected. The device also offers a multitude of filter options, ensuring that the user has the highest degree of flexibility.The AD7124-4 can achieve simultaneous 50 Hz and 60 Hz rejection when operating at an output data rate of 25 SPS (single cycle settling), with rejection in excess of 80 dB achieved at lower output data rates.The AD7124-4 establishes the highest degree of signal chain integration. The device contains a precision, low noise, low drift internal band gap reference, and also accepts an external differential reference, which can be internally buffered. Other key integrated features include programmable low drift excitation current sources, burnout currents, and a bias voltage generator, which sets the common-mode voltage of a channel to AVDD/2. The low-side power switch enables the user to power down bridge sensors between conversions, ensuring the absolute minimal power consumption of the system. The device also allows the user the option of operating with either an internal clock or an external clock.The integrated channel sequencer allows several channels to be enabled simultaneously, and the AD7124-4 sequentially converts on each enabled channel, simplifying communication with the device. As many as 16 channels can be enabled at any time; a channel being defined as an analog input or a diagnostic such as a power supply check or a reference check. This unique feature allows diagnostics to be interleaved with conversions.The AD7124-4 also supports per channel configuration. The device allows eight configurations or setups. Each configuration consists of gain, filter type, output data rate, buffering, and reference source. The user can assign any of these setups on a channel by channel basis.The AD7124-4 also has extensive diagnostic functionality integrated as part of its comprehensive feature set. These diagnostics include a cyclic redundancy check (CRC), signal chain checks, and serial interface checks, which lead to a morerobust solution. These diagnostics reduce the need for external components to implement diagnostics, resulting in reduced board space needs, reduced design cycle times, and cost savings. The failure modes effects and diagnostic analysis (FMEDA) of a typical application has shown a safe failure fraction (SFF) greater than 90% according to IEC 61508.The device operates with a single analog power supply from 2.7 V to 3.6 V or a dual 1.8 V power supply. The digital supply has a range of 1.65 V to 3.6 V. It is specified for a temperature range of −40°C to +105°C. The AD7124-4 is housed in a 32-lead LFCSP package or a 24-lead TSSOP package.Applications Temperature measurement  Pressure measurement  Industrial process control  Instrumentation Smart transmitters Smart transmitters

The AD7284 contains all the functions required for the general-purpose monitoring of stacked Li-Ion batteries, as used in hybrid electric vehicles and battery backup applications.The AD7284 has multiplexed cell voltage and auxiliary, analog-to-digital converter (ADC) measurement channels supporting four to eight cells of battery management. The device provides a maximum total unadjusted error, TUE, (cell voltage accuracy) of ±3 mV that includes all the internal errors from input to output. The primary ADC resolution is 14 bits.The AD7284 also includes an integrated secondary measurement path that validates the data on the primary ADC. Other diagnostic features include the detection of open inputs, communication, and power supply related faults.The AD7284 cell balancing interface outputs control the external field effect transistors (FETs) to allow discharging of individual cells.There are two on-chip 2.5 V voltage references: one reference for the primary measurement path, and one for the secondary measurement path.The AD7284 operates from one VDD supply, ranging from 10 V to 40 V. The device provides eight differential analog input channels to accommodate large common-mode signals across the full VDD range. Each channel allows an input signal range, VPINx − VPIN(x − 1) and VSINx – VSIN(x − 1), of 0 V to 5 V, where x = 0 to 8. The input pins assume a series stack of eight cells. The AD7284 includes four auxiliary ADC input channels that can be used for temperature measurement or system diagnostics.The AD7284 has a differential daisy-chain interface that allows multiple devices to be stacked without the need for individual device isolation. By design, this interface allows both device to device communication within the same module and communication between devices on different modules.Applications Li-Ion battery monitoring Electric and hybrid electric vehicles Stationary power applications