Robust, Industrial, Low Latency and Low Power 10 Mbps, 100 Mbps, and 1 Gbps Ethernet PHY Features: 10BASE-Te/100BASE-TX/1000BASE-T IEEE® 802.3™ compliant MII, RMII, and RGMII MAC interfaces 1000BASE-T RGMII latency transmit < 68 ns, receive < 226 ns 100BASE-TX MII latency transmit< 52 ns, receive < 248 ns EMC test standards IEC 61000-4-5 surge (±4 kV) IEC 61000-4-4 electrical fast transient (EFT) (±4 kV) IEC 61000-4-2 ESD (±6 kV contact discharge) IEC 61000-4-6 conducted immunity (10 V) EN55032 radiated emissions (Class A) EN55032 conducted emissions (Class A) Unmanaged configuration using multilevel pin strapping EEE in accordance with IEEE 802.3az Start of packet detection for IEEE 1588 time stamp support Enhanced link detection Configurable LED Crystal oscillator frequency/25 MHz clock input frequency (50 MHz for RMII) 25 MHz/125 MHz synchronous clock output Small package and wide temperature range 40-lead, 6 mm × 6 mm LFCSP Specified for −40°C to +105°C ambient operation Low power consumption 330 mW for 1000BASE-T 140 mW for 100BASE-TX 3.3 V/2.5 V/1.8 V MAC interface VDDIO supply Integrated power supply monitoring and POR

Low Complexity, 2-Port Ethernet Switch with Integrated 10BASE-T1L PHYs Features: 10BASE-T1L IEEE® Std 802.3cg-2019™ compliant Supports 1.0 V p-p & 2.4 V p-p transmit Levels Cable reach Up to 1700 meters with 1.0 V p-p transmit level Up to 1700 meters with 2.4 V p-p transmit level Low power consumption Low power consumption - single supply 80 mW typ Dual supply 1.0 V p-p: 77 mW typical Integrated switch with SPI interface 10 Mbps full duplex 16 MAC addresses supported for frame forwarding Supports OPEN Alliance 10BASE-T1x MACPHY SPI MDIO memory map accessible via SPI Supports high & low priority queues Total buffer memory of 28 kB shared between ports and host Autonegotiation capability Managed or unmanaged configuration Cut through or store and forward operation IEEE 1588 time stamp capture on transmit and receive Diagnostics Frame generator and checker Multiple loopback modes IEEE test mode support Port dedicated statistics counters Link and cable diagnostics 25 MHz crystal or external clock input Single or dual supply with 1.8 V or 3.3 V operation Integrated power supply monitoring and POR Small package: 48-lead, 7 mm × 7 mm LFCSP Temperature range Industrial: 40°C to +85°C Extended: 40°C to +105°C

Precision MEMS IMU Module Features: Triaxial, digital gyroscope  ±125°/sec, ±500°/sec, ±2000°/sec dynamic range models 2°/hr in-run bias stability (ADIS16465-1)  0.15°/√hr angular random walk (ADIS16465-1 and ADIS16465-2)  ±0.05° axis to axis misalignment error  Triaxial, digital accelerometer, ±8 g 3.6 μg in-run bias stability Triaxial, delta angle, and delta velocity outputs Factory calibrated sensitivity, bias, and axial alignment Calibration temperature range: −40°C to +85°C   SPI-compatible data communications Programmable operation and control  Automatic and manual bias correction controls Data ready indicator for synchronous data acquisition External sync modes: direct, pulse, scaled, and output On demand self test of inertial sensors On demand self test of flash memory Single-supply operation (VDD): 3.0 V to 3.6 V 2000 g mechanical shock survivability Operating temperature range: −40°C to +105°C

400 MHz TO 4000 MHz Low Noise Amplifier Features: Operation from 400 MHz to 4000 MHz Noise figure of 0.8 dB at 900 MHz Requires few external components Integrated active bias control circuit Integrated dc blocking capacitors Adjustable bias for low power applications Single-supply operation from 3 V to 5 V Gain of 20.8 dB at 900 MHz OIP3 of 37.0 dBm at 900 MHz P1dB of 21.8 dBm at 900 MHz Small footprint LFCSP Pin-compatible version with 21.5 dB gain available

Silicon SPDT Switch, Reflective, 35 GHz to 44 GHz Features:Reflective design Low insertion loss: 1.8 dB at 44 GHz High isolation: 28 dB at 44 GHz High input linearity 0.1 dB power compression (P0.1dB): 37 dBm Third-order intercept (IP3): 52 dBm High RF power handling: 28 dBm average 36 dBm peak Single supply operation: 3.3V Internal negative voltage generator (NVG) RF settling time (0.1 dB final RF output): 45 ns 20-terminal, 3 mm × 3 mm, land grid array package Pin compatible with the ADRF5300: 24 GHz - 32 GHz

0.5 dB LSB, 6-Bit, Silicon Digital Attenuator, 100 MHz to 40 GHz Features:Ultrawideband frequency range: 100 MHz to 40 GHz Attenuation range: 0.5 dB steps to 31.5 dB Low insertion loss with impedance match 2.1 dB up to 18 GHz 2.9 dB up to 26 GHz 4.8 dB up to 40 GHz Attenuation accuracy with impedance match ±(0.10 + 1.0% of attenuation state) up to 18 GHz ±(0.15 + 0.8% of attenuation state) up to 26 GHz ±(0.35 + 2.5% of attenuation state) up to 40 GHz Typical step error with impedance match ±0.18 dB up to 18 GHz ±0.23 dB up to 26 GHz ±0.51 dB up to 40 GHz High input linearity P0.1dB insertion loss state: 30 dBm P0.1dB other attenuation states: 27 dBm IP3: 50 dBm typical High RF input power handling: 27 dBm average, 30 dBm peak Tight distribution in relative phase No low frequency spurious signals SPI and parallel mode control, CMOS/LVTTL compatible RF settling time (0.1 dB of final RF output): 250 ns 24-terminal, 4 mm × 4 mm LGA package Pin compatible with ADRF5720, low frequency cutoff version

Dual Narrow/Wideband RF Transceiver Features: 2 2 highly integrated transceiver Frequency range of 30 MHz to 6000 MHz Transmitter and receiver bandwidth from 12 kHz to 40 MHz Two fully integrated, fractional-N, RF synthesizers LVDS and CMOS synchronous serial data interface options Low power monitor and sleep modes Multichip synchronization capabilities Fast frequency hopping Dynamic profile switching for dynamic data rates and sample rates Fully programmable via a 4-wire SPI 12 mm 12 mm, 196-ball CSP_BGA

Integrated Dual RF Receiver Features: Dual receivers Maximum Receiver BW: 200 MHz Fully integrated, fractional-N, RF synthesizers Fully integrated clock synthesizer Multichip phase synchronization for RF LO and baseband clocks JESD204B datapath interface Tuneable range: 75 MHz to 6000 MHz

Integrated Dual RF Tx, Rx, and Observation Rx Features: Dual transmitters Dual receivers Dual input shared observation receiver Maximum receiver bandwidth: 200 MHz Maximum tunable transmitter synthesis bandwidth: 450 MHz Maximum observation receiver bandwidth: 450 MHz Fully integrated fractional-N RF synthesizers Fully integrated clock synthesizer Multichip phase synchronization for RF LO and baseband clocks JESD204B datapath interface Tuning range (center frequency): 75 MHz to 6000 MHz

Integrated, Dual RF Transceiver with Observation Path Features: Dual differential Tx Dual differential Rx Observation receiver with 2 inputs Fully integrated, ultralow power DPD actuator and adaptation engine for PA linearization Sniffer receiver with 3 inputs Tunable range: 300 MHz to 6000 MHz Linearization signal BW to 40 MHz Tx synthesis BW to 250 MHz Rx BW: 8 MHz to 100 MHz Supports FDD and TDD operation Fully integrated independent fractional-N RF synthesizers for Tx, Rx, ORx, and clock generation JESD204B digital interface