DA CONVERTOR ROHS COMPLIANT: YES

VOLTAGE DIGITAL POTENTIOMETER ROHS COMPLIANT: YES

DA CONVERTOR ROHS COMPLIANT: YES

INSTRUMENT AMPLIFIER ROHS COMPLIANT: YES

DIFF-AMP, 500KHZ, -40 TO 85DEG C, NSOIC ROHS COMPLIANT: YES

MODULATION / DEMODULATION ROHS COMPLIANT: YES

DISPLAY INTERFACE, 10BIT, 1.9V, LQFP-80; IC Interface Type:I2C; Interface Applications:LCD Monitors and Projectors, Plasma Display Panels, RGB Graphics Processing; Supply Voltage Min:1.7V; Supply Voltage Max:1.9V; No. of Pins:80Pins RoHS Compliant: Yes

Operational Amplifier, Dual, 19 MHz, 2, 35 V/ s, 3V to 36V, MSOP, 8 RoHS Compliant: Yes

The AD621 is an easy to use, low cost, low power, high accuracy instrumentation amplifier which is ideally suited for a wide range of applications. Its unique combination of high performance, small size and low power, outperforms discrete in amp implementations. High functionality, low gain errors and low gain drift errors are achieved by the use of internal gain setting resistors. Fixed gains of 10 and 100 can be easily set via external pin strapping. The AD621 is fully specified as a total system, therefore, simplifying the design process.For portable or remote applications, where power dissipation, size and weight are critical, the AD621 features a very low supply current of 1.3 mA max and is packaged in a compact 8-pin SOIC, 8-pin plastic DIP or 8-pin cerdip. The AD621 also excels in applications requiring high total accuracy, such as precision data acquisition systems used in weigh scales and transducer interface circuits. Low maximum error specifications including nonlinearity of 10 ppm, gain drift of 5 ppm°/C, 50 µV offset voltage and 0.6 mV/°C offset drift ('B' grade), make possible total system performance at a lower cost than has been previously achieved with discrete designs or with other monolithic instrumentation amplifiers.When operating from high source impedances, as in ECG and blood pressure monitors, the AD621 features the ideal combination of low noise and low input bias currents. Voltage noise is specified as 9 nV/(root) Hz at 1 kHz and 0.28 µV p-p from 0.1 Hz to 10 Hz. Input current noise is also extremely low at 0.1 pA/Hz. The AD621 outperforms FET input devices with an input bias current specification of 1.5 nA max over the full industrial temperature range.

The AD6636 is a (Digital) Receive Signal Processor intended for direct IF sampling or highly sampled baseband radios requiring wide-bandwidth input signals. It has been optimized for the demanding filtering requirements of wideband standards like, CDMA2000, UMTS, and TD-SCDMA. The AD6636 is designed to be used as part of radio system that uses either an IF sampling ADC, or a baseband sampling ADC.The AD6636 has the following signal processing stages: a Frequency Translator, a 5th order Cascaded Integrated Comb filter, two sets of Cascaded Fixed Coefficient Finite Impulse Response (FIR) and Half Band filters, three cascaded programmable coefficient Sum of Product FIR filters, an Interpolating Half Band Filter (LHB) and a digital Automatic Gain Control (AGC) Block. Multiple modes are supported for clocking data into and out of the chip to provide flexibility for interfacing to a wide variety of digitizers. Programming and control is accomplished via serial or microport interfaces.The AD6636 features a fractional clock multiplier that uses the ADC clock to produce a digital down converter master clock up to 200 MHz. This internal phased-locked loop (PLL) allows optimum digital clock rates, regardless of the converter sampling rate, enabling the best possible digital signal decimation and filtering. Three 16-bit parallel output ports accommodate high data rate 3G applications. An on-chip interpolating half band filter can also be used to further increase the output rate while still allowing for very efficient filters. In addition, each channel has a digital AGC for output data scaling.