The AD9265 is a 16-bit, 125 MSPS analog-to-digital converter (ADC). The AD9265 is designed to support communications applications where high performance combined with low cost, small size, and versatility is desired.The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic to provide 16-bit accuracy at 125 MSPS data rates and guarantees no missing codes over the full operating temperature range.The ADC features a wide bandwidth differential sample-and-hold analog input amplifier supporting a variety of user-selectable input ranges. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate.Combined with power and cost savings over previously available ADCs, the AD9265 is suitable for applications in communications, instrumentation and medical imaging. A differential clock input controls all internal conversion cycles. A duty cycle stabilizer provides the means to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance over a wide range of input clock duty cycles. An integrated voltage reference eases design considerations.The ADC output data format is either parallel 1.8 V CMOS or LVDS (DDR). A data output clock is provided to ensure proper latch timing with receiving logic.Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface. Flexible power-down options allow significant power savings, when desired. An optional on-chip dither function is available to improve SFDR performance with low power analog input signals.The AD9265 is available in a Pb-free, 48-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.APPLICATIONS Communications Multimode digital receivers (3G) GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, and TD-SCDMA Smart antenna systems General-purpose software radios Broadband data applications Ultrasound equipmentPRODUCT HIGHLIGHTS On-chip dither option for improved SFDR performance with low power analog input. Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz. Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs. Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock duty cycle stabilizer, DCS, power-down, test modes, and voltage reference mode. Pin compatibility with the AD9255, allowing a simple migration from 16 bits down to 14 bits.

The AD9265 is a 16-bit, 125 MSPS analog-to-digital converter (ADC). The AD9265 is designed to support communications applications where high performance combined with low cost, small size, and versatility is desired.The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic to provide 16-bit accuracy at 125 MSPS data rates and guarantees no missing codes over the full operating temperature range.The ADC features a wide bandwidth differential sample-and-hold analog input amplifier supporting a variety of user-selectable input ranges. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate.Combined with power and cost savings over previously available ADCs, the AD9265 is suitable for applications in communications, instrumentation and medical imaging. A differential clock input controls all internal conversion cycles. A duty cycle stabilizer provides the means to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance over a wide range of input clock duty cycles. An integrated voltage reference eases design considerations.The ADC output data format is either parallel 1.8 V CMOS or LVDS (DDR). A data output clock is provided to ensure proper latch timing with receiving logic.Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface. Flexible power-down options allow significant power savings, when desired. An optional on-chip dither function is available to improve SFDR performance with low power analog input signals.The AD9265 is available in a Pb-free, 48-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.APPLICATIONS Communications Multimode digital receivers (3G) GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, and TD-SCDMA Smart antenna systems General-purpose software radios Broadband data applications Ultrasound equipmentPRODUCT HIGHLIGHTS On-chip dither option for improved SFDR performance with low power analog input. Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz. Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs. Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock duty cycle stabilizer, DCS, power-down, test modes, and voltage reference mode. Pin compatibility with the AD9255, allowing a simple migration from 16 bits down to 14 bits.

The AD9266 is a monolithic, single-channel 1.8 V supply,16-bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS analog-to-digitalconverter (ADC). It features a high performance sample-and-holdcircuit and on-chip voltage reference.The product uses multistage differential pipeline architecturewith output error correction logic to provide 16-bit accuracy at80 MSPS data rates and to guarantee no missing codes over thefull operating temperature range.The ADC contains several features designed to maximizeflexibility and minimize system cost, such as programmableclock and data alignment and programmable digital test patterngeneration. The available digital test patterns include built-indeterministic and pseudorandom patterns, along with customuser-defined test patterns entered via the serial port interface (SPI).A differential clock input with a selectable internal 1-to-8 divideratio controls all internal conversion cycles. An optional duty cyclestabilizer (DCS) compensates for wide variations in the clock dutycycle while maintaining excellent overall ADC performance.The interleaved digital output data is presented in offset binary,gray code, or twos complement format. A DCO is provided toensure proper latch timing with receiving logic. Both 1.8 V and3.3 V CMOS levels are supported.The AD9266 is available in a 32-lead RoHS-compliant LFCSPand is specified over the industrial temperature range (−40°Cto +85°C).Product Highlights The AD9266 operates from a single 1.8 V analog power supply and features a separate digital output driver supply to accommodate 1.8 V to 3.3 V logic families. The sample-and-hold circuit maintains excellent performance for input frequencies up to 200 MHz and is designed for low cost, low power, and ease of use. A standard serial port interface supports various product features and functions, such as data output formatting, internal clock divider, power-down, DCO and data output (D15_D14 to D1_D0) timing and offset adjustments, and voltage reference modes. The AD9266 is packaged in a 32-lead RoHS-compliant LFCSP that is pin compatible with the AD9609 10-bit ADC, the AD9629 12-bit ADC, and the AD9649 14-bit ADC, enabling a simple migration path between 10-bit and 16-bit converters sampling from 20 MSPS to 80 MSPS.Applications Communications Diversity radio systems Multimode digital receivers GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA Smart antenna systems Battery-powered instruments Handheld scope meters Portable medical imaging Ultrasound Radar/LIDAR PET/SPECT imaging

The ADF41020 frequency synthesizer can be used to implement local oscillators as high as 18 GHz in the up conversion and down conversion sections of wireless receivers and transmitters. It consists of a low noise, digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider, and high frequency programmable feedback dividers (A, B, and P). A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). The synthesizer can be used to drive external microwave VCOs via an active loop filter. Its very high bandwidth means a frequency doubler stage can be eliminated, simplifying system architecture and reducing cost. The ADF41020 is software-compatible with the existing ADF4106/ADF4107/ADF4108 family of devices from Analog Devices, Inc. Their pinouts match very closely with the exception of the ADF41020’s single-ended RF input pin, meaning only a minor layout change is required when updating current designs.Applications Microwave point-to-point/multipoint radios Wireless infrastructure VSAT radios Test equipment Instrumentation

Fast settling, highly accurate, low power, 8-/16-channel, multiplexed ADC for low bandwidth input signals with integrated input buffers.Integrated precision, 2.5 V, low drift (3.5 ppm/°C), band gap reference and integrated oscillator.Eight flexible setups with configurability for output data rate, digital filter mode, offset/gain error correction, reference selection, buffer enables and more. This per channel configurability extends to the output data rate used for each channel when using sinc5 + sinc1 filter.Sinc5 + sinc1 filter maximizes channel scan rate, and sinc3 filter maximizes resolution and enhanced 50 Hz/60 Hz rejection, with four selectable options to maximize rejection.Integrated diagnostic features, including CRC, register checksum, temperature sensor, crosspoint multiplexer, burnout currents, and GPIOs/GPOs.Applications Process control: PLC/DCS modules Voltage, current, temperature, and pressure measurement Flow meters Medical and scientific multichannel instrumentation Seismic instrumentation Chemical analysis instrumentation: chromatography

The ADAS3022 is a complete 16-bit, 1 MSPS, successive approximation–based analog-to-digital data acquisition system, which is manufactured on Analog Devices, Inc., proprietary iCMOS® high voltage industrial process technology. The device integrates an 8-channel, low leakage multiplexer; a high impedance programmable gain instrumentation amplifier (PGIA) stage with high common-mode rejection; a precision, low drift 4.096 V reference and buffer; and a 16-bit charge redistribution analog-to-digital converter (ADC) with successive approximation register (SAR) architecture. The ADAS3022 can resolve eight single-ended inputs or four fully differential inputs up to ±24.576 V when using ±15 V supplies. In addition, the device can accept the commonly used bipolar differential, bipolar single-ended, pseudo bipolar, or pseudo unipolar input signals, as shown in Table 1, thus enabling the use of almost any direct sensor interface.The ADAS3022 simplifies design challenges by eliminating signal buffering, level shifting, amplification/attenuation, common-mode rejection, settling time, and any other analog signal conditioning challenge while allowing a smaller form factor, faster time to market, and lower cost.APPLICATIONS  Multichannel data acquisition and system monitoring Process control Power line monitoring Automated test equipment Instrumentation

The ADE7880 is high accuracy, 3-phase electrical energy measurement IC with serial interfaces and three flexible pulse outputs. The ADE7880 device incorporates second-order sigma-delta (Σ-Δ) analog-to-digital converters (ADCs), a digital integrator, reference circuitry, and all of the signal processing required to perform the total (fundamental and harmonic) active, and apparent energy measurements, rms calculations, as well as fundamental-only active and reactive energy measurements. In addition, the ADE7880 computes the rms of harmonics on the phase and neutral currents and on the phase voltages, together with the active, reactive, and apparent power, and the power factor and harmonic distortion on each harmonic for all phases. Total harmonic distortion plus noise (THD + N) is computed for all currents and voltages. A fixed function digital signal processor (DSP) executes this signal processing. The DSP program is stored in the internal ROM memory.The ADE7880 is suitable for measuring active, reactive, and apparent energy in various 3-phase configurations, such as wye or delta services with both three and four wires. The ADE7880 provides system calibration features for each phase, that is, rms offset correction, phase calibration, and gain calibration. The CF1, CF2, and CF3 logic outputs provide a wide choice of power information: total active powers, apparent powers, or the sum of the current rms values, and fundamental active and reactive powers.The ADE7880 contains waveform sample registers that allow access to all ADC outputs. The devices also incorporate power quality measurements, such as short duration low or high voltage detections, short duration high current variations, line voltage period measurement, and angles between phase voltages and currents. Two serial interfaces, SPI and I2C, can be used to communicate with the ADE7880. A dedicated high speed interface, the high speed data capture (HSDC) port, can be used in conjunction with I2C to provide access to the ADC outputs and real-time power information. The ADE7880 also has two interrupt request pins, IRQ0 and IRQ1, to indicate that an enabled interrupt event has occurred. Three specially designed low power modes ensure the continuity of energy accumulation when the ADE7880 is in a tampering situation. The ADE7880 is available in the 40-lead LFCSP, Pb-free package, pin-for-pin compatible with ADE7854, ADE7858, ADE7868, and ADE7878 devices.APPLICATIONS Energy metering systems Power quality monitoring Solar inverters Process monitoring Protective devices

The ADV7282 / ADV7282-M are versatile one-chip, multiformat video decoders. The ADV7282 / ADV7282-M automatically detects standard analog baseband video signals compatible with worldwide NTSC, PAL, and SECAM standards in the form of composite, S-Video, and component video.The ADV7282 converts the analog video signals into a YCrCb 4:2:2 video data stream that is compatible with the 8-bit ITU-R BT.656 interface standard.The ADV7282-M converts the analog video signals into an 8-bit YCrCb 4:2:2 video data stream that is output over a mobile industry processor interface (MIPI®) CSI-2 interface.The analog video inputs of the ADV7282/ADV7282-M accept single-ended, pseudo differential, and fully differential signals. The ADV7282 / ADV7282-M contain a deinterlacer (I2P converter) and short to battery detection capability with two STB diagnostic pins. The ADV7282 provides four analog inputs. The ADV7282-M provides six analog inputs and three general-purpose outputs.The ADV7282 / ADV7282-M are programmed via a 2-wire, serial bidirectional port (I2C compatible) and is fabricated in a 1.8 V CMOS process. The LFCSP package option makes the decoder ideal for space-constrained portable applications.APPLICATIONS Smartphone/multimedia handsets Automotive infotainment DVRs for video security Media players

The SSM3302 is a fully integrated, high efficiency, stereo Class-D audio amplifier. The application circuit requires minimal externalcomponents and operates from a single 7 V to 18 V supply. The device is capable of delivering 2 × 10 W of continuous output power into a 4 Ω load (or 2 × 8 W into 8 Ω) with 98 dB. Spread spectrum pulse density modulation (PDM) is used toprovide lower EMI radiated emissions compared with other Class-D architectures. The SSM3302 includes an optional modulation select pin (ultralow EMI emission mode) that significantly reduces the radiated emissions at the Class-D outputs, particularly above 100 MHz. The SSM3302 can pass FCC Class-B emissions testing with an unshielded 20 inch cable using common-mode choke-based filtering.The fully differential input of the SSM3302 provides excellent rejection of common-mode noise on the input. The device also includes a highly flexible gain select pin that only requires one series resistor to choose a gain between 9 dB and 24 dB, with no change to the input impedance. The benefit of this is to improve gain matching between multiple SSM3302 devices within a single application compared with using external resistors to set gain.The SSM3302 includes an integrated voltage regulator thatgenerates a 5 V rail.The SSM3302 has a micropower shutdown mode with a typical shutdown current of 10 μA. Shutdown is enabled by applying a logic low to the SD pin. The device also includes pop-and-click suppression circuitry that minimizes voltage glitches at the output during turn on and turn off, reducing audible noise during activation and deactivation.Other included features to simplify system level integration of the SSM3302 are input low-pass filtering to suppress out-ofband DAC noise interference to the pulse density modulator, fixed input impedance to simplify component selection across multiple platform production builds, and a thermal warning indicator pin.The SSM3302 is specified over the commercial temperaturerange (−40°C to +85°C). It has built-in thermal shutdown andoutput short-circuit protection. It is available in a halide-free,40-lead, 6 mm × 6 mm lead frame chip scale package (LFCSP).APPLICATIONS Mobile computing Flat panel televisions Media docking stations Portable electronics Sound bars

The ADA4004-1/ADA4004-2/ADA4004-4 are 1.8 nV/√Hz precision amplifiers featuring 40 μV offset, 0.7 μV/°C drift, 12 MHz bandwidth, and low 1.7 mA per amplifier supply current.The ADA4004-1/ADA4004-2/ADA4004-4 are designed on the high performance iPolar™ process, enabling improvements such as reduced noise and power consumption, increased speed and stability, and smaller footprint size. Novel design techniques enable the ADA4004-1/ADA4004-2/ADA4004-4 to achieve 1.8 nV/√Hz voltage noise density and a low 6 Hz 1/f noise corner frequency while consuming just 1.7 mA per amplifier. The small package saves board space, reduces cost, and improves layout flexibility.Applications for these amplifiers include high precision controls, PLL filters, high performance precision filters, medical and analytical instrumentation, precision power supply controls, ATE, and data acquisition systems. Operation is fully specified from ±5 V to ±15 V from −40°C to +125°C.The ADA4004-1, ADA4004-2, and ADA4004-4 are members of a growing series of low noise op amps offered by Analog Devices, Inc. (see Table 1).ApplicationsPrecision instrumentationFilter blocksMicrophone preamplifiersIndustrial controlThermocouples and RTDsReference buffers