The ADG731/ADG725 are monolithic, CMOS, 32-channel/dual 16-channel analog multiplexers with a serially controlled 3-wire interface. The ADG731 switches one of 32 inputs (S1–S32) to a common output, D. The ADG725 can be configured as a dual mux switching one of 16 inputs to one output, or a differential mux switching one of 16 inputs to a differential output.These mulitplexers utilize a 3-wire serial interface that is compatible with SPI®, QSPI™, MICROWIRE™, and some DSP interface standards. On power-up, the Internal Shift Register contains all zeros and all switches are in the OFF state.These multiplexers are designed on an enhanced submicron process that provides low power dissipation yet gives high switching speed with very low on resistance and leakage currents. They operate from a single supply of 1.8 V to 5.5 V or a ±2.5 V dual supply, making them ideally suited to a variety of applications. On resistance is in the region of a few ohms, is closely matched between switches, and is very flat over the full signal range.These parts can operate equally well as either multiplexers or demultiplexers and have an input signal range that extends to the supplies. In the OFF condition, signal levels up to the supplies are blocked. All channels exhibit break-before-make switching action, preventing momentary shorting when switching channels.The ADG731 and ADG725 are serially controlled 32-channel, and dual/differential 16-channel multiplexers, respectively. They are available in either a 48-lead LFCSP or TQFP package.Product Highlights 3-Wire Serial Interface. 1.8 V to 5.5 V Single-Supply or ±2.5 V Dual-Supply Operation. These parts are specified and guaranteed with 5 V ± 10%, 3 V ± 10% single-supply, and ± 2.5 V ±10% dual-supply rails. On Resistance of 4 W. Guaranteed Break-Before-Make Switching Action. 7 mm ×7 mm 48-Lead Chip Scale Package (LFCSP) or 48-Lead TQFP Package.APPLICATIONS Optical Applications Data Acquisition Systems Communication Systems Relay Replacement Audio and Video Switching Battery-Powered Systems Medical Instrumentation Automatic Test Equipment

The ADG731 / ADG725 are monolithic, CMOS, 32-channel/dual 16-channel analog multiplexers with a serially controlled 3-wire interface. The ADG731 switches one of 32 inputs (S1–S32) to a common output, D. The ADG725 can be configured as a dual mux switching one of 16 inputs to one output, or a differential mux switching one of 16 inputs to a differential output.These mulitplexers utilize a 3-wire serial interface that is compatible with SPI®, QSPI™, MICROWIRE™, and some DSP interface standards. On power-up, the Internal Shift Register contains all zeros and all switches are in the OFF state.These multiplexers are designed on an enhanced submicron process that provides low power dissipation yet gives high switching speed with very low on resistance and leakage currents. They operate from a single supply of 1.8 V to 5.5 V or a ±2.5 V dual supply, making them ideally suited to a variety of applications. On resistance is in the region of a few ohms, is closely matched between switches, and is very flat over the full signal range.These parts can operate equally well as either multiplexers or demultiplexers and have an input signal range that extends to the supplies. In the OFF condition, signal levels up to the supplies are blocked. All channels exhibit break-before-make switching action, preventing momentary shorting when switching channels.The ADG731 and ADG725 are serially controlled 32-channel, and dual/differential 16-channel multiplexers, respectively. They are available in either a 48-lead LFCSP or TQFP package.PRODUCT HIGHLIGHTS 3-Wire Serial Interface. 1.8 V to 5.5 V Single-Supply or ±2.5 V Dual-Supply Operation. These parts are specified and guaranteed with 5 V ± 10%, 3 V ± 10% single-supply, and ± 2.5 V ±10% dual-supply rails. On Resistance of 4 W. Guaranteed Break-Before-Make Switching Action. 7 mm × 7 mm 48-Lead Chip Scale Package (LFCSP) or 48-Lead TQFP Package.APPLICATIONS Optical Applications Data Acquisition Systems Communication Systems Relay Replacement Audio and Video Switching Battery-Powered Systems Medical Instrumentation Automatic Test Equipment

The ADG731 / ADG725 are monolithic, CMOS, 32-channel/dual 16-channel analog multiplexers with a serially controlled 3-wire interface. The ADG731 switches one of 32 inputs (S1–S32) to a common output, D. The ADG725 can be configured as a dual mux switching one of 16 inputs to one output, or a differential mux switching one of 16 inputs to a differential output.These mulitplexers utilize a 3-wire serial interface that is compatible with SPI®, QSPI™, MICROWIRE™, and some DSP interface standards. On power-up, the Internal Shift Register contains all zeros and all switches are in the OFF state.These multiplexers are designed on an enhanced submicron process that provides low power dissipation yet gives high switching speed with very low on resistance and leakage currents. They operate from a single supply of 1.8 V to 5.5 V or a ±2.5 V dual supply, making them ideally suited to a variety of applications. On resistance is in the region of a few ohms, is closely matched between switches, and is very flat over the full signal range.These parts can operate equally well as either multiplexers or demultiplexers and have an input signal range that extends to the supplies. In the OFF condition, signal levels up to the supplies are blocked. All channels exhibit break-before-make switching action, preventing momentary shorting when switching channels.The ADG731 and ADG725 are serially controlled 32-channel, and dual/differential 16-channel multiplexers, respectively. They are available in either a 48-lead LFCSP or TQFP package.PRODUCT HIGHLIGHTS 3-Wire Serial Interface. 1.8 V to 5.5 V Single-Supply or ±2.5 V Dual-Supply Operation. These parts are specified and guaranteed with 5 V ± 10%, 3 V ± 10% single-supply, and ± 2.5 V ±10% dual-supply rails. On Resistance of 4 W. Guaranteed Break-Before-Make Switching Action. 7 mm × 7 mm 48-Lead Chip Scale Package (LFCSP) or 48-Lead TQFP Package.APPLICATIONS Optical Applications Data Acquisition Systems Communication Systems Relay Replacement Audio and Video Switching Battery-Powered Systems Medical Instrumentation Automatic Test Equipment

The ADG733 and ADG734 are low voltage, CMOS devicescomprising three independently selectable SPDT (single pole,double throw) switches and four independently selectable SPDTswitches respectively.Low power consumption and operating supply range of 1.8 V to5.5 V and dual ±2.5 V make the ADG733 and ADG734 ideal forbattery powered, portable instruments. All channels exhibitbreak-before-make switching action preventing momentaryshorting when switching channels. An EN input on the ADG733 isused to enable or disable the device. When disabled, all channelsare switched OFF.These 2–1 multiplexers/SPDT switches are designed on anenhanced submicron process that provides low power dissipationyet gives high switching speed, very low on resistance, high signalbandwidths, and low leakage currents. On resistance is in theregion of a few ohms, is closely matched between switches, and isvery flat over the full signal range. These parts can operate equallywell in either direction and have an input signal range that extendsto the supplies.The ADG733 is available in small TSSOP and QSOP packages,while the ADG734 is available in a small TSSOP package.PRODUCT HIGHLIGHTS Single/Dual Supply Operation. The ADG733 and ADG734 are fully specified and guaranteed with 3 V and 5 V single supply rails and ±2.5 V dual supply rails. Low On Resistance (2.5 Ω typical) Low Power Consumption (<0.01 µW) Guaranteed Break-Before-Make Switching ActionAPPLICATIONS Data Acquisition Systems Communication Systems Relay Replacement Audio and Video Switching Battery Powered Systems

The AD4001/AD4005 are high accuracy, high speed, low power, 16-bit, Easy Drive, precision successive approximation register (SAR) analog-to-digital converters (ADCs) that operate from a single power supply, VDD. The reference voltage, VREF, is applied externally and can be set independent of the supply voltage. The AD4001/AD4005 power scales linearly with throughput. Easy Drive features reduce both signal chain complexity and power consumption while enabling higher channel density. The reduced input current, particularly in high-Z mode, coupled with a long signal acquisition phase, eliminates the need for a dedicated ADC driver. Easy Drive broadens the range of companion circuitry that is capable of driving these ADCs (see Figure 2 in the data sheet).Input span compression eliminates the need to provide a negative supply to the ADC driver amplifier while preserving access to the full ADC code range. The input overvoltage clamp protects the ADC inputs against overvoltage events, minimizing disturbances on the reference pin and eliminating the need for external protection diodes. Fast device throughput up to 2 MSPS allows users to accurately capture high frequency signals and to implement oversampling techniques to alleviate the challenges associated with antialias filter designs. Decreased serial peripheral interface (SPI) clock rate requirements reduce digital input and output power consumption, broadens digital host options, and simplifies the task of sending data across digital isolation. The SPI-compatible serial user interface is compatible with 1.8 V, 2.5 V, 3 V, and 5 V logic by using the separate VIO logic supply.APPLICATIONS Automated test equipment Machine automation Medical equipment Battery-powered equipment Precision data acquisition systems Instrumentation and control systems

The AD4001/AD4005 are high accuracy, high speed, low power, 16-bit, Easy Drive, precision successive approximation register (SAR) analog-to-digital converters (ADCs) that operate from a single power supply, VDD. The reference voltage, VREF, is applied externally and can be set independent of the supply voltage. The AD4001/AD4005 power scales linearly with throughput. Easy Drive features reduce both signal chain complexity and power consumption while enabling higher channel density. The reduced input current, particularly in high-Z mode, coupled with a long signal acquisition phase, eliminates the need for a dedicated ADC driver. Easy Drive broadens the range of companion circuitry that is capable of driving these ADCs (see Figure 2 in the data sheet).Input span compression eliminates the need to provide a negative supply to the ADC driver amplifier while preserving access to the full ADC code range. The input overvoltage clamp protects the ADC inputs against overvoltage events, minimizing disturbances on the reference pin and eliminating the need for external protection diodes. Fast device throughput up to 2 MSPS allows users to accurately capture high frequency signals and to implement oversampling techniques to alleviate the challenges associated with antialias filter designs. Decreased serial peripheral interface (SPI) clock rate requirements reduce digital input and output power consumption, broadens digital host options, and simplifies the task of sending data across digital isolation. The SPI-compatible serial user interface is compatible with 1.8 V, 2.5 V, 3 V, and 5 V logic by using the separate VIO logic supply.APPLICATIONS Automated test equipment Machine automation Medical equipment Battery-powered equipment Precision data acquisition systems Instrumentation and control systems

The AD4003/AD4007/AD4011 are high accuracy, high speed, low power, 18-bit, Easy Drive, precision successive approximation register (SAR) analog-to-digital converters (ADCs) that operate from a single power supply, VDD. The reference voltage, VREF, is applied externally and can be set independent of the supply voltage. The AD4003/AD4007/AD4011 power scales linearly with throughput. Easy Drive features reduce both signal chain complexity and power consumption while enabling higher channel density. The reduced input current, particularly in high-Z mode, coupled with a long signal acquisition phase, eliminates the need for a dedicated ADC driver. Easy Drive broadens the range of companion circuitry that is capable of driving these ADCs (see Figure 2 in the data sheet).Input span compression eliminates the need to provide a negative supply to the ADC driver amplifier while preserving access to the full ADC code range. The input overvoltage clamp protects the ADC inputs against overvoltage events, minimizing disturbances on the reference pin and eliminating the need for external protection diodes. Fast device throughput up to 2 MSPS allows users to accurately capture high frequency signals and to implement oversampling techniques to alleviate the challenges associated with antialias filter designs. Decreased serial peripheral interface (SPI) clock rate requirements reduce digital input and output power consumption, broadens digital host options, and simplifies the task of sending data across digital isolation. The SPI-compatible serial user interface is compatible with 1.8 V, 2.5 V, 3 V, and 5 V logic by using the separate VIO logic supply.APPLICATIONS Automated test equipment Machine automation Medical equipment Battery-powered equipment Precision data acquisition systems Instrumentation and control systems

The AD5592R/AD5592R-1 have eight I/Ox pins (I/O0 to I/O7) that can be independently configured as digital-to-analog converter (DAC) outputs, analog-to-digital converter (ADC) inputs, digital outputs, or digital inputs. When an I/Ox pin is configured as an analog output, it is driven by a 12-bit DAC. The output range of the DAC is 0 V to VREF or 0 V to 2 × VREF. When an I/Ox pin is configured as an analog input, it is connected to a 12-bit ADC via an analog multiplexer. The input range of the ADC is 0 V to VREF or 0 V to 2 × VREF. The ADC has a total throughput rate of 400 kSPS. The I/Ox pins can also be configured as digital, general-purpose input or output (GPIO) pins. The state of the GPIO pins can be set or read back by accessing the GPIO write data register or the GPIO read configuration register, respectively, via a serial peripheral interface (SPI) write or read operation.The AD5592R/AD5592R-1 have an integrated 2.5 V, 20 ppm/°C reference, which is turned off by default, and an integrated temperature indicator, which gives an indication of the die temperature. The temperature value is read back as part of an ADC read sequence.The AD5592R/AD5592R-1 are available in 16-ball, 2 mm × 2 mm WLCSP, 16-lead, 3 mm × 3 mm LFCSP, and 16-lead TSSOP. The AD5592R/AD5592R-1 operate over a temperature range of −40 °C (TA) to +125 °C (TJ).APPLICATIONS Control and monitoring General-purpose analog and digital inputs/outputs

The AD5592R/AD5592R-1 have eight I/Ox pins (I/O0 to I/O7) that can be independently configured as digital-to-analog converter (DAC) outputs, analog-to-digital converter (ADC) inputs, digital outputs, or digital inputs. When an I/Ox pin is configured as an analog output, it is driven by a 12-bit DAC. The output range of the DAC is 0 V to VREF or 0 V to 2 × VREF. When an I/Ox pin is configured as an analog input, it is connected to a 12-bit ADC via an analog multiplexer. The input range of the ADC is 0 V to VREF or 0 V to 2 × VREF. The ADC has a total throughput rate of 400 kSPS. The I/Ox pins can also be configured as digital, general-purpose input or output (GPIO) pins. The state of the GPIO pins can be set or read back by accessing the GPIO write data register or the GPIO read configuration register, respectively, via a serial peripheral interface (SPI) write or read operation.The AD5592R/AD5592R-1 have an integrated 2.5 V, 20 ppm/°C reference, which is turned off by default, and an integrated temperature indicator, which gives an indication of the die temperature. The temperature value is read back as part of an ADC read sequence.The AD5592R/AD5592R-1 are available in 16-ball, 2 mm × 2 mm WLCSP, 16-lead, 3 mm × 3 mm LFCSP, and 16-lead TSSOP. The AD5592R/AD5592R-1 operate over a temperature range of −40 °C (TA) to +125 °C (TJ).APPLICATIONS Control and monitoring General-purpose analog and digital inputs/outputs

The AD5593R has eight input/output (I/O) pins, which can beindependently configured as digital-to-analog converter (DAC)outputs, analog-to-digital converter (ADC) inputs, digital outputs,or digital inputs. When an I/O pin is configured as an analogoutput, it is driven by a 12-bit DAC. The output range of theDAC is 0 V to VREF or 0 V to 2 × VREF. When an I/O pin isconfigured as an analog input, it is connected to a 12-bit ADCvia an analog multiplexer. The input range of the ADC is 0 V toVREF or 0 V to 2 × VREF. The I/O pins can also be configured tobe general-purpose, digital input or output (GPIO) pins. Thestate of the GPIO pins can be set or read back by accessing theGPIO write data register and GPIO read configuration registers,respectively, via an I2C write or read operation.The AD5593R has an integrated 2.5 V, 20 ppm/°C reference thatis turned off by default and an integrated temperature indicatorthat gives an indication of the die temperature. The temperaturevalue is read back as part of an ADC read sequence.The AD5593R is available in 16-lead TSSOP and LFCSP, as wellas a 16-ball WLCSP, and operates over a temperature range of−40°C to +105°C.APPLICATIONS Control and monitoring General-purpose analog and digital I/O