The ADXRS620 is a complete angular rate sensor (gyroscope)that uses the Analog Devices, Inc. surface-micromachiningprocess to create a functionally complete and low cost angularrate sensor integrated with all required electronics on one chip.The manufacturing technique for this device is the same highvolume BiMOS process used for high reliability automotiveairbag accelerometers.The ADXRS620 is an automotive grade gyroscope that has 100% pin, package, temperature, and function compatible to the available industrial grade ADXRS652 gyro. Automotive grade gyroscopes have more extensive guaranteed min/max specifications due to automotive testing.The output signal, RATEOUT (1B, 2A), is a voltageproportional to angular rate about the axis normal to the topsurface of the package. The output is ratiometric with respect toa provided reference supply. A single external resistor can beused to lower the scale factor. An external capacitor sets thebandwidth. Other external capacitors are required for operation.A temperature output is provided for compensation techniques.Two digital self-test inputs electromechanically excite thesensor to test proper operation of both the sensor and the signalconditioning circuits. The ADXRS620 is available in a 7 mm ×7 mm × 3 mm BGA ceramic package.APPLICATIONS Vehicle chassis rollover sensing Inertial measurement units Platform stabilization

The ADXRS623 is a complete angular rate sensor (gyroscope)that uses the Analog Devices, Inc. surface-micromachiningprocess to create a functionally complete and low cost angularrate sensor integrated with all required electronics on one chip.The manufacturing technique for this device is the same highvolume BiMOS process used for high reliability automotiveairbag accelerometers.The ADXRS623 is an automotive grade gyroscope. Automotive grade gyroscopes have more extensive guaranteed min/max specifications due to automotive testing.The output signal, RATEOUT (1B, 2A), is a voltageproportional to the angular rate about the axis that is normal tothe top surface of the package. The output is ratiometric withrespect to a provided reference supply. A single externalresistor between SUMJ and RATEOUT can be used to lowerthe scale factor. An external capacitor sets the bandwidth. Otherexternal capacitors are required for operation.A temperature output is provided for compensation techniques.Two digital self-test inputs electromechanically excite thesensor to test proper operation of both the sensor and the signalconditioning circuits. The ADXRS623 is available in a 7 mm ×7 mm × 3 mm BGA chip scale package.APPLICATIONS Inertial measurement units Platform stabilization Robotics

The SSM2375 is a fully integrated, high efficiency, Class-D audioamplifier. It is designed to maximize performance for mobilephone applications. The application circuit requires a minimumof external components and operates from a single 2.5 V to 5.5 Vsupply. It is capable of delivering 3 W of continuous output powerwith 100 dB.Spread-spectrum pulse density modulation (PDM) is used toprovide lower EMI-radiated emissions compared with otherClass-D architectures. The inherent randomized nature ofspread-spectrum PDM eliminates the clock intermodulation(beating effect) of several amplifiers in close proximity.The SSM2375 includes an optional modulation select pin(ultralow EMI emissions mode) that significantly reduces theradiated emissions at the Class-D outputs, particularly above100 MHz. In ultralow EMI emissions mode, the SSM2375can pass FCC Class B radiated emission testing with 50 cm,unshielded speaker cable without any external filtering.The device also includes a highly flexible gain select pin thatallows the user to select a gain of 0 dB, 3 dB, 6 dB, 9 dB, or12 dB. The gain selection feature improves gain matchingbetween multiple SSM2375 devices within a single applicationas compared to using external resistors to set the gain.The SSM2375 has a micropower shutdown mode with a typicalshutdown current of 20 nA. Shutdown is enabled by applyinga logic low to the SD pin.The device also includes pop-and-click suppression circuitry.This suppression circuitry minimizes voltage glitches at theoutput during turn-on and turn-off, reducing audible noiseon activation and deactivation.Other features that simplify system-level integration of theSSM2375 include input low-pass filtering to suppress out-of-bandDAC noise interference to the PDM modulator and fixed-inputimpedance to simplify component selection across multipleplatform production builds.The SSM2375 is specified over the industrial temperature rangeof −40°C to +85°C. It has built-in thermal shutdown and outputshort-circuit protection. It is available in a halide-free, 9-ball,1.5 mm × 1.5 mm wafer level chip scale package (WLCSP).Applications Mobile phones MP3 players Portable electronics

The SSM2380 is a fully integrated, high efficiency, stereo, Class-D audio amplifier. It is designed to maximize performance for mobile phone applications. The application circuit requires a minimum of external components and operates from a single 2.5 V to 5.5 V supply. It is capable of delivering 2 W of continuous output power with 100 dB.Spread-spectrum pulse density modulation is used to provide lower EMI-radiated emissions compared with other Class-D architectures. An added benefit of spread-spectrum Σ-Δ modu-lation is that no synchronization (SYNC) is needed when using multiple Class-D amplifiers. For applications that require long speaker cables (>10 cm), the SSM2380 includes a user-selectable ultralow EMI emissions mode that eliminates the need for EMI filters at the Class-D outputs.The SSM2380 has a micropower shutdown mode with a typicalshutdown current of 20 nA. Shutdown is enabled by applying alogic low to the SD pin or through an optional independent channel soft shutdown via I2C.The device also includes pop-and-click suppression circuitry. Thissuppression circuitry minimizes voltage glitches at the outputduring turn-on and turn-off, reducing audible noise on activationand deactivation.The fully differential inputs of the SSM2380 provides excellentrejection of common-mode noise on the input. Input couplingcapacitors can be omitted if the dc input common-mode voltage isapproximately VDD/2.The SSM2380 is specified over the commercial temperature range(−40°C to +85°C). It has built-in thermal shutdown and outputshort-circuit protection. It is available in a 16-ball, 2 mm × 2 mmwafer level chip scale package (WLCSP).Applications Mobile phones MP3 players Portable electronics

The AD9650 is a dual, 16-bit, 25 MSPS/65 MSPS/80 MSPS/ 105 MSPS analog-to-digital converter (ADC) designed for digitizing high frequency, wide dynamic range signals with input frequencies of up to 300 MHz.The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth, differential sample-and-hold analog input amplifiers, and shared integrated voltage reference, which eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.The ADC output data can be routed directly to the two external 16-bit output ports or multiplexed on a single 16-bit bus. These outputs can be set to either 1.8 V CMOS or LVDS.Flexible power-down options allow significant power savings, when desired.Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface.The AD9650 is available in a 64-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.PRODUCT HIGHLIGHTS On-chip dither option for improved SFDR performance with low power analog input. Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz. Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs. Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, and test modes. Pin compatible with the AD9268 and other dual families, AD9269, AD9251, AD9231, and AD9204. This allows a simple migration across resolutions and bandwidth. APPLICATIONS Industrial instrumentation X-Ray, MRI, and ultrasound equipment High speed pulse acquisition Chemical and spectrum analysis Direct conversion receivers Multimode digital receivers Smart antenna systems General-purpose software radios

The AD9650 is a dual, 16-bit, 25 MSPS/65 MSPS/80 MSPS/ 105 MSPS analog-to-digital converter (ADC) designed for digitizing high frequency, wide dynamic range signals with input frequencies of up to 300 MHz.The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth, differential sample-and-hold analog input amplifiers, and shared integrated voltage reference, which eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.The ADC output data can be routed directly to the two external 16-bit output ports or multiplexed on a single 16-bit bus. These outputs can be set to either 1.8 V CMOS or LVDS.Flexible power-down options allow significant power savings, when desired.Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface.The AD9650 is available in a 64-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.PRODUCT HIGHLIGHTS On-chip dither option for improved SFDR performance with low power analog input. Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz. Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs. Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, and test modes. Pin compatible with the AD9268 and other dual families, AD9269, AD9251, AD9231, and AD9204. This allows a simple migration across resolutions and bandwidth. APPLICATIONS Industrial instrumentation X-Ray, MRI, and ultrasound equipment High speed pulse acquisition Chemical and spectrum analysis Direct conversion receivers Multimode digital receivers Smart antenna systems General-purpose software radios

The AD9737A/AD9739A are 11-bit and 14-bit, 2.5 GSPS high performance RF DACs that are capable of synthesizing wideband signals from dc up to 3 GHz. The AD9737A/AD9739A are pin and functionally compatible with the AD9739 with the exception that the AD9737A/AD9739A do not support synchronization or RZ mode, and are specified to operate between 1.6 GSPS and 2.5 GSPS. By elimination of the synchronization circuitry, some nonideal artifacts such as images and discrete clock spurs remain stationary on the AD9737A/AD9739A between power-up cycles, thus allowing for possible system calibration. AC linearity and noise performance remain the same between the AD9739 and the AD9737A/AD9739A.The inclusion of on-chip controllers simplifies system integration. A dual-port, source synchronous, LVDS interface simplifies the digital interface with existing FGPA/ASIC technology. On-chip controllers are used to manage external and internal clock domain variations over temperature to ensure reliable data transfer from the host to the DAC core. A serial peripheral interface (SPI) is used for device configuration as well as readback of status registers.The AD9737A/AD9739A are manufactured on a 0.18 µm CMOS process and operate from 1.8 V and 3.3 V supplies. They are supplied in a 160-ball chip scale ball grid array for reduced package parasitics.Product Highlights Ability to synthesize high quality wideband signals with bandwidths of up to 1.25 GHz in the first or second Nyquist zone. A proprietary quad-switch DAC architecture provides exceptional ac linearity performance while enabling mixmode operation. A dual-port, double data rate, LVDS interface supports the maximum conversion rate of 2500 MSPS. On-chip controllers manage external and internal clock domain skews. Programmable differential current output with an 8.66 mA to 31.66 mA range.Applications Broadband communications systems DOCSIS CMTS systems Military jammers Instrumentation, automatic test equipment Radar, avionics

The AD9739 is a 14-bit, 2.5 GSPS high performance RF digital-to-analog converter (DAC) capable of synthesizing widebandsignals from dc up to 3.0 GHz. Its DAC core features a quad-switch architecture that provides exceptionally low distortion performance with an industry-leading direct RF synthesiscapability. This feature enables multicarrier generation up to the Nyquist frequency in baseband mode as well as second andthird Nyquist zones in mix mode. The output current can be programmed over the 8.66 mA to 31.66 mA range.The inclusion of on-chip controllers simplifies system integration. A dual-port, source synchronous, LVDS interface simplifies thedigital interface with existing FGPA/ASIC technology. On-chipcontrollers are used to manage external and internal clock domainvariations over temperature to ensure reliable data transfer from the host to the DAC core. Multichip synchronization is possible with an on-chip synchronization controller. A serial peripheral interface (SPI) is used for device configuration as well as readbackof status registers.The AD9739 is manufactured on a 0.18 μm CMOS process andoperates from 1.8 V and 3.3 V supplies. It is supplied in a 160-ballchip scale ball grid array for reduced package parasitics.Product Highlights Ability to synthesize high quality wideband signals with bandwidths of up to 1.25 GHz in the first or second Nyquist zone. A proprietary quad-switch DAC architecture provides exceptional ac linearity performance while enabling mix mode operation. A dual-port, double data rate, LVDS interface supports the maximum conversion rate of 2500 MSPS. On-chip controllers manage external and internal clock domain skews. A multichip synchronization capability. Programmable differential current output with an 8.66 mA to 31.66 mA range.Applications Broadband communications systems  Military jammers Instrumentation, automatic test equipment  Radar, avionics

The AD9789 is a flexible QAM encoder/interpolator/upconverter combined with a high performance, 2400 MSPS, 14-bit RF digital-to-analog converter (DAC). The flexible digital interface can accept up to four channels of complex data. The QAM encoder supports constellation sizes of 16, 32, 64, 128, and 256 with SRRC filter coefficients for all standards.The on-chip rate converter supports a wide range of baud rates with a fixed DAC clock. The digital upconverter can place the channels from 0 to 0.5 × fDAC. This permits four contiguous channels to be synthesized and placed anywhere from dc to fDAC.The AD9789 includes a serial peripheral interface (SPI) for device configuration and status register readback. The flexible digital interface can be configured for data bus widths of 4, 8, 16, and 32 bits. It can accept real or complex data.The AD9789 operates from 1.5 V, 1.8 V, and 3.3 V supplies for a total power consumption of 1.6 W. It is supplied in a 164-ball chip scale package ball grid array for lower thermal impedance and reduced package parasitics. No special power sequencing is required. The clock receiver powers up muted to prevent start-up noise.Product Highlights Highly integrated and configurable QAM mappers, interpolators, and upconverters for direct synthesis of one to four DOCSIS- or DVB-C-compatible channels in a block. Low noise and intermodulation distortion (IMD) performance enable high quality synthesis of signals up to 1 GHz. Flexible data interface supports LVDS for improved SFDR or CMOS input data for less demanding applications. Interface is configurable from 4-bit nibbles to 32-bit words and can run at up to 150 MHz CMOS or 150 MHz LVDS double data rate (DDR). Manufactured on a CMOS process, the AD9789 uses a proprietary switching technique that enhances dynamic performance.Applications Broadband communications systems CMTS/DVB Cellular infrastructure Point-to-point wireless

The ADA4062-2 and ADA4062-4 are dual and quad JFET-input amplifiers with industry-leading performance. They offer lower power, offset voltage, drift, and ultralow bias current. The ADA4062-2 B grade (SOIC package) features a typical low offset voltage of 0.5 mV, an offset drift of 4 μV/°C, and a bias current of 2 pA.The ADA4062 family is ideal for various applications, including process control, industrial and instrumentation equipment, active filtering, data conversion, buffering, and power control and monitoring. With a low supply current of 165 μA per amplifier, they are well suited for lower power applications.The ADA4062 family is also specified for the extended industrial temperature range of −40°C to +125°C. The ADA4062-2 is available in lead-free, 8-lead SOIC, 8-lead MSOP, and 10-lead LFCSP (1.6 mm × 1.3 mm × 0.55 mm) packages, and the ADA4062-4 is available in a lead-free, 14-lead TSSOP package.ApplicationsPower control and monitoringActive filtersIndustrial/process controlBody probe electronicsData acquisitionIntegratorsInput buffering