4.0 Gbps Dual Driver

Low Cost, 300 MHz Rail-to-Rail Amplifier (Single with Disable) Features: Low cost Single (AD8061), dual (AD8062) Single with disable (AD8063) Low offset voltage: 6 mV High speed 300 MHz, −3 dB bandwidth (G = 1) 650 V/μs slew rate 8.5 nV/√Hz at 5 V 35 ns settling time to 0.1% with 1 V step Operates on 2.7 V to 8 V supplies Input voltage range = −0.2 V to +3.2 V with Vs = 5 V Excellent video specifications (RL = 150 Ω, G = 2) Gain flatness: 0.1 dB to 30 MHz 0.01% differential gain error 0.04° differential phase error 35 ns overload recovery Low power 6.8 mA/amplifier typical supply current 400 μA when disabled

Software Selectable, True Bipolar Input, 8-Channel, 12-Bit Plus Sign A/D Converter Features: 12-Bit plus Sign SAR ADC True Bipolar Input Ranges Software Selectable Input Ranges: ± 10V, ± 5V, ± 2.5V, 0 to 10V Eight Analog Input Channels with Channel Sequencer Single Ended, True Differential and Pseudo Differential Analog Input Capability High Analog Input Impedance Low Power: 26 mW Full Power Signal Bandwidth: >13 MHz Internal 2.5 V Reference High Speed Serial Interface - 1 MSPS Throughput For four and two channel equivalent devices, see AD7324, AD7322

Single-Phase Multifunction Metering IC with di/dt Sensor Interface

CMOS, 5 V/+5 V/+3 V, Triple SPDT Switch Features: ±2 V to ±6 V dual-supply operation 2 V to 12 V single-supply operation Temperature range: −40°C to +125°C  <0.2 nA leakage currents  52 Ω on resistance over full signal range  Rail-to-rail switching operation  16-lead LFCSP and TSSOP packages  Typical power consumption: <0.1 μW  TTL-/CMOS-compatible inputs  Package upgrades to 74HC4053 and MAX4053/MAX4583

High Speed, Dual, 2 A MOSFET Driver, inverting A & non-inverting B input pins Features: Industry-standard-compatible pinout High current drive capability Precise threshold shutdown comparator UVLO with hysteresis Overtemperature warning signal Overtemperature shutdown 3.3 V-compatible inputs Rise time and fall time: 10 ns typical at 2.2 nF load Fast propagation delay See Data Sheet for additional features

24-Bit, 312 kSPS, 109 dB Sigma-Delta ADC with On-Chip Buffers and Serial Interface Features: High performance 24-bit Σ-Δ ADC 115 dB dynamic range at 78.125 kHz output data rate 109 dB dynamic range at 312.5 kHz output data rate 312.5 kHz maximum fully filtered output word rate Pin-selectable oversampling rates of 64×, 128×, and 256× Low power mode Flexible serial peripheral interface (SPI) Fully differential modulator input On-chip differential amplifier for signal buffering On-chip reference buffer Full band, low-pass, finite impulse response (FIR) filter Overrange alert pin Digital gain correction registers Power-down mode Synchronization of multiple devices via the SYNC pin Daisy chaining

Quad IF Receiver Features: 11-bit 200MSPS output data rate per channel Integrated Noise Shaping Requantizer (NSR) Performance with NSR enabled: SNR: 75.5 dBFS in 40 MHz band to 70 MHz @ 185 MSPS SNR: 73.7 dBFS in 60 MHz band to 70 MHz @ 185 MSPS Performance with NSR disabled: SNR: 66.5 dBFS to 70 MHz @ 185 MSPS SFDR: 83 dBc to 70 MHz @ 185 MSPS Low power: 1.2 W @ 185 MSPS 1.8 V analog supply operation 1.8 V LVDS (ANSI-644 levels) output 1-to-8 integer clock divider Internal ADC voltage reference 1.75 V p-p analog input range (programmable to 2.0 V p-p) Differential analog inputs with 800 MHz bandwidth See data sheet for additional features

2.1 Maximum On Resistance, 15 V/+12/5 V iCMOS Dual SPST Switches Features: 2.4 maximum on resistance 0.5 maximum on resistance flatness 200 mA continuous current Fully specified at +12 V, ±15 V, ±5 V No VL supply required 3 V logic-compatible inputs Rail-to-rail operation 10-lead MSOP and 10-lead, 3 mm × 3 mm LFCSP packages

ADM6346 - UltraLow Power, Microprocessor RESET Circuit