Stereo PDM to I2S/TDM Converter Features: 2 channels of PDM audio inputs from digital microphones 64× decimation ratio of PDM to PCM audio data 24-bit resolution to support high sound pressure level (SPL) microphones 126 dB A-weighted SNR 4 kHz to 96 kHz output sampling rate Bit clock rates of 64×, 128×, 192×, 256×, 384×, or 512× the output sampling rate Automatic PDM clock generation Automatic power-down when BCLK is removed 0.36 mA DVDD operating current at 48 kHz sampling rate and 1.8 V supply Slave I2S or TDM output interface Up to TDM-16 supported Configurable TDM slots I/O supply voltage from 1.70 V to 3.63 V DVDD core supply voltage from 1.10 V to 1.98 V 4 μA typical DVDD shutdown current 9-ball, 1.26 mm × 1.26 mm, 0.4 mm pitch WLCSP Power-on reset

18-Cell Battery Monitor with Daisy Chain Interface Features: Measures up to 18 battery cells in series 3 mV maximum total measurement error Stackable architecture for high voltage systems Built-in isoSPI interface 1 Mb isolated serial communications Uses a single twisted pair, up to 100 meters Low EMI susceptibility and emissions Bidirectional for broken wire protection 290 μs to measure all cells in a system Synchronized voltage and current measurement 16-bit Δ-Σ ADC with programmable third-order noise filter Passive cell balancing up to 200 mA (maximum) with programmable pulsewidth modulation 9 general purpose digital I/O or analog inputs Temperature or other sensor inputs Configurable as an I2C or SPI master 6 μA sleep mode supply current 64-lead LQFP_EP package

Ultrafast SiGe Voltage Comparator (Featuring Reduced Swing PECL Output Drivers) Features: 180 ps propagation delay 25 ps overdrive and slew rate dispersion 8 GHz equivalent input rise time bandwidth 100 ps minimum pulse width 37 ps typical output rise/fall 10 ps deterministic jitter (DJ) 200 fs random jitter (RJ) −2 V to +3 V input range with +5 V/−5 V supplies On-chip terminations at both input pins Resistor-programmable hysteresis Differential latch control Power supply rejection > 70 dB

Dual Channel, Configurable, IsolatedDigital Input Features: Dual channel, configurable, isolated digital input Programmable trip threshold On-chip debounce filter On-chip data and power Isolation Application circuit monitors wide voltage range 10 V dc to 300 V dc 8 V rms to 240 V rms ac (with 10 ms + pickup) Negative dc protected Programmable wetting current Pulse up to 50 mA Constant current up to 6.3 mA Safety and regulatory approvals UL recognition 3750 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice #5A (pending) CSA 61010-1: 300 V rms VDE certificate of conformity (pending) DIN V VDE V 0884-11 (VDE V 0884-11):2017-1 VIORM = 565 V peak EMC robust solution supports relay protection system level requirements ADC samples available for system diagnostics Internal SAR ADC with PGA Single 3.3 V Supply Integrated isoPower, isolated dc-to-dc converter Interfaces SPI DOUTx output reflects state of digital input IRQ interrupt pin Operating temperature: −40°C to +125°C 20-lead, LGA package with 6.8 mm creepage

Multichannel ISM Band FSK/GFSK/OOK/GOOK/ASK Transmitter Features: Single-chip, low power UHF transmitter 75 MHz to 1 GHz frequency operation Multichannel operation using fractional-N PLL 2.3 V to 3.6 V operation On-board regulator Programmable output power −16 dBm to +14 dBm, 0.4 dB steps Data rates: dc to 179.2 kbps Low current consumption 868 MHz, 10 dBm, 21 mA 433 MHz, 10 dBm, 17 mA 315 MHz, 0 dBm, 10 mA Programmable low battery voltage indicator 24-lead TSSOP

I2C CMOS 8 10 Unbuffered Analog Switch Array with Dual/Single Supplies Features: I2C-compatible Interface 3.4 MHz High Speed I2C Option 32-lead LFCSP_VQ (5 mm × 5 mm) Double-buffered Input Logic Simultaneous Update of Multiple Switches Up to 300 MHz Bandwidth Fully Specified at Dual ±5 V/single +12 V Operation On Resistance 35 Ω Maximum Low Quiescent Current < 20 μA

User Defined Fault Protection and Detection, 0.8 pC QINJ, 8:1 Multiplexer Features: User defined secondary supplies set overvoltage level Overvoltage protection up to −55 V and +55 V Power-off protection up to −55 V and +55 V Overvoltage detection on source pins Minimum secondary supply level: 4.5 V single-supply Interrupt flags indicate fault status Low charge injection (QINJ): 0.8 pC Low drain/source on capacitance: 19 pF Latch-up immune under any circumstance Known state without digital inputs present VSS to VDD analog signal range ±5 V to ±22 V dual-supply operation 8V to 44 V single-supply operation Fully specified at ±15 V, ±20 V, +12 V, and +36 V 

0.4 CMOS, Dual DPDT Switch in WLCSP/LFCSP/TSSOP Features: 1.8 V to 5.5 V operation Ultralow on resistance 0.4 Ω typical 0.6 Ω maximum at 5 V supply Excellent audio performance, ultralow distortion 0.07 Ω typical 0.14 Ω maximum RON flatness High current carrying capability 400 mA continuous 600 mA peak current at 5 V Automotive temperature range: −40°C to +125°C Rail-to-rail switching operation Typical power consumption (<0.1 μW)

0 Hz/dc to 14 GHz, Single-Pole, Four-Throw MEMS Switch with Integrated Driver Features: Fully operational down to 0 Hz/dc On resistance: 2.9 Ω (maximum) Off leakage: 0.5 nA (maximum) −3 dB bandwidth 11 GHz (typical) for RF1, RF4 14 GHz (typical) for RF2, RF3 RF performance characteristics Insertion loss: 0.26 dB (typical) at 2.5 GHz Isolation: 24 dB (typical) at 2.5 GHz IIP3: 69 dBm (typical) RF power: 36 dBm (maximum) Actuation lifetime: 1 billion cycles (minimum) Hermetically sealed switch contacts On switching time: 75 μs (maximum) Integrated driver removes the need for an external driver Supply voltage: 3.0 V to 3.6 V CMOS-/LVTTL-compatible Parallel and SPI interface Independently controllable switches Switch is in an open state with no power supply present Requirement to avoid floating nodes on all RFx pins (see the Floating Node section in data sheet) 24-lead, 5 mm × 4 mm × 0.95 mm, LFCSP Operating temperature range: 0°C to 85°C

SPI Interface, 1.5 RON, 15 V/+12 V, Quad SPST Switch, Mux Configurable Features: SPI interface with error detection Includes CRC, invalid read/write address, and SCLK count error detection Supports burst mode and daisy-chain mode Industry-standard SPI Mode 0 and Mode 3 interface compatible Guaranteed break-before-make switching allowing external wiring of switches to deliver multiplexer configurations 1.5 typical on resistance at 25°C 0.3 typical on resistance flatness at 25°C 0.1 typical on resistance match between channels at 25°C VSS to VDD analog signal range Fully specified at ±15 V, ±5 V, and +12 V 1.8 V logic compatibility with 2.7 V ≤ VL ≤ 3.3 V 24-lead LFCSP