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Texas Instruments
DRV3245BEPHPRQ1
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Texas Instruments
TPS650947A0RSKT
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Texas Instruments
AM5729BABCXA
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Texas Instruments
DS90UB949ATRGCRQ1
|
Texas Instruments
INA190A3QDCKRQ1
|
Texas Instruments
OPA189IDBVT
|
Texas Instruments
OPA818IDRGR
|
Texas Instruments
OPA818IDRGT
|
Texas Instruments
INA821IDGKR
|
Texas Instruments
TMP235AEDBZTQ1
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Price |
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RoHS |
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Y |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
Lead Status |
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Y |
Y |
Y |
Y |
Y |
See ti.com |
Y |
Y |
Y |
Y |
Architecture |
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Gate driver |
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CMOS |
FET / CMOS Input,Voltage FB |
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Control interface |
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1xPWM,3xPWM,6xPWM |
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Features |
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Current sense Amplifier,Phase Comparators,SPI/I2C,Watchdog timer |
Comm control,Dynamic voltage scaling,Enable,Enable pin,I2C control,Overcurrent protection,Power good,Power sequencing,Synchronous rectification,Thermal shutdown,UVLO fixed |
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Low-EMI Point-to-Point Communication |
Bi-directional,Low-side Capable,Ultra precise |
EMI Hardened,High Cload Drive,MUX Friendly,Zero Drift |
Decompensated |
Decompensated |
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Industry standard pinout |
Gate drive(A) |
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1 |
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Operating temperature range(C) |
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-40 |
-40 |
-40 to 105,0 to 90 |
-40 |
-40 to 125 |
-40 to 125 |
-40 |
-40 to 125 |
-40 to 125 |
-40 to 125,-40 to 150 |
Package area(mm^2) |
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81 |
64 |
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81 |
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9 |
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Package size (L x W)(mm) |
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9 x 9 |
8 x 8 |
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9 x 9 |
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3 x 3 |
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Package type |
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HTQFP |
VQFN |
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VQFN |
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WSON |
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Pin count |
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48 |
64 |
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64 |
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8 |
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Rating |
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Automotive |
Catalog |
Catalog |
Automotive |
Automotive |
Catalog |
Catalog |
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Catalog |
Automotive |
TI functional safety category |
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Functional Safety-Compliant |
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Functional Safety-Capable |
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Vs ABS(max)(V) |
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45 |
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Vs(min)(V) |
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4.5 |
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TI.com inventory |
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2984 |
3153 |
470 |
198416 |
65525 |
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28255 |
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Approx. price(US$) |
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3.804 | 1ku |
3.194 | 1ku |
37.638 | 1ku |
9.231 | 1ku |
1.227 | 1ku |
0.96 | 1ku |
3.255 | 1ku |
3.1 | 1ku |
2.21 | 1ku |
0.18 | 1ku |
Configurability |
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Factory programmable,Software configurable |
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Iout(max)(A) |
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21 |
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Iq(typ)(mA) |
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0.3 |
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LDO |
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4 |
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Pitch(mm) |
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0.4 |
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Processor name |
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Apollo Lake |
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Processor supplier |
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Intel/Altera |
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Product type |
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Processor and FPGA |
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Analog output |
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Regulated outputs(#) |
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12 |
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Shutdown current (ISD)(typ)(A) |
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65 |
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Step-down DC/DC controller |
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3 |
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Step-down DC/DC converter |
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3 |
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Step-up DC/DC controller |
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0 |
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Step-up DC/DC converter |
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0 |
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Switching frequency(max)(kHz) |
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3100 |
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Switching frequency(typ)(kHz) |
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2500 |
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Vin(max)(V) |
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21 |
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Vin(min)(V) |
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5.6 |
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Vout(max)(V) |
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3.575 |
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Vout(min)(V) |
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-0.3 |
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Arm MHz (Max.) |
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1500 |
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Graphics acceleration |
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1 2D,2 3D |
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PCIe |
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2 PCIe Gen 2 |
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Display type |
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3 LCD and 1 HDMI 1.4a |
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Ethernet MAC |
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10/100/1000,2-Port 1Gb Switch,4-Port 10/100 PRU EMAC |
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Package size |
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mm2 |
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mm2 |
mm2 |
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mm2 |
mm2 |
mm2 |
Arm CPU |
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2 Arm Cortex-A15 |
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Operating system |
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Linux,Android,RTOS |
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Protocols |
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Ethernet,ICSS,Profinet,Profibus |
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CPU |
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32-bit |
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Security |
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Cryptographic acceleration,Debug security,Device identity,Isolation firewalls,Secure boot & storage & programming,Software IP protection |
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Package Group |
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FCBGA|760 |
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SC70|6 |
SOIC|8,SOT-23|5,VSSOP|8 |
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SON|8 |
SOIC|8,VSSOP|8 |
SC70|5,SOT-23|3 |
Hardware accelerators |
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4 Embedded Vision Engines (EVE) |
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Co-processor(s) |
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Arm Cortex-M4,PRU-ICSS,Embedded Vision Engine (EVE) |
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Color depth(bps) |
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24 |
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Diagnostics |
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BIST |
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EMI reduction |
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SSC Compatible |
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Function |
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Serializer |
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Input compatibility |
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HDMI |
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Output compatibility |
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FPD-Link III LVDS |
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Signal conditioning |
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Adaptive Equalizer |
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Gain(V/V) |
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100,200,25,50,500 |
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Gain error(%) |
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0.2,0.3,0.4 |
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Number of channels(#) |
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1 |
1 |
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1 |
1 |
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Supply voltage(Min)(V) |
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1.7 |
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2.3 |
Common mode voltage(Min)(V) |
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-0.2 |
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CMRR(Min)(dB) |
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132 |
146 |
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140 |
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Input offset drift (+/-)(Typ)(uV/C) |
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0.01 |
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Gain error drift (+/-)(ppm/C) |
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2 |
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Bandwidth(kHz) |
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45,37,35,32,27 |
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Comparators(#) |
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0 |
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Input offset (+/-)(Max)(uV) |
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15 |
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35 |
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Iq(Max)(mA) |
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0.09 |
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Gain error drift (+/-)(Max)(ppm/C) |
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7 |
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Supply voltage(Max)(V) |
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5.5 |
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5.5 |
Common mode voltage(Max)(V) |
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40 |
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Total supply voltage(Max)(+5V=5, +/-5V=10) |
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36 |
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13 |
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Rail-to-rail |
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In to V-,Out |
No |
No |
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Output current(Typ)(mA) |
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65 |
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Slew rate(Typ)(V/us) |
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20 |
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Offset drift(Typ)(uV/C) |
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0.005 |
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Total supply voltage(Min)(+5V=5, +/-5V=10) |
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4.5 |
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6 |
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Output swing headroom (to positive supply)(Typ)(V) |
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-0.02 |
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Vn at 1 kHz(Typ)(nV/rtHz) |
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5.2 |
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Input common mode headroom (to negative supply)(Typ)(V) |
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-0.1 |
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Input bias current(Max)(pA) |
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300 |
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Output swing headroom (to negative supply)(Typ)(V) |
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0.02 |
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Input common mode headroom (to positive supply)(Typ)(V) |
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-2.5 |
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Iq per channel(Typ)(mA) |
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1.3 |
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GBW(Typ)(MHz) |
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14 |
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2700 |
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CMRR(Typ)(dB) |
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168 |
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Iq per channel(Max)(mA) |
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1.7 |
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Vos (offset voltage @ 25 C)(Max)(mV) |
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0.003 |
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1.25 |
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2nd harmonic(dBc) |
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-84 |
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3rd harmonic(dBc) |
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-106 |
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Acl, min spec gain(V/V) |
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7 |
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BW at Acl(MHz) |
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765 |
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CMRR(typ)(dB) |
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90 |
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Frequency of harmonic distortion measurement(MHz) |
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1 |
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GBW(typ)(MHz) |
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2700 |
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Input bias current(max)(pA) |
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25 |
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Iout(typ)(mA) |
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60 |
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Iq per channel(typ)(mA) |
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27.7 |
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Number of channels |
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1 |
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Offset drift(typ)(V/C) |
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3 |
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Slew rate(typ)(V/s) |
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1400 |
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TI package name |
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DRG |
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Total supply voltage (+5 V = 5, 5 V = 10)(max)(V) |
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13 |
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Total supply voltage (+5 V = 5, 5 V = 10)(min)(V) |
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6 |
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Vn at 1 kHz(typ)(nVHz) |
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8.5 |
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Vn at flatband(typ)(nVHz) |
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2.2 |
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Vos (offset voltage at 25C)(max)(mV) |
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1.25 |
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BW @ Acl(MHz) |
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765 |
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Vs(Max)(V) |
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36 |
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Gain error (+/-)(Max)(%) |
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0.025 |
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Input bias current (+/-)(Max)(nA) |
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0.5 |
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Gain(Max)(V/V) |
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10000 |
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Iq(Typ)(mA) |
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0.6 |
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Noise at 0.1 Hz-10 Hz(Typ)(uVpp) |
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0.14 |
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Gain(Min)(V/V) |
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1 |
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Gain non-linearity (+/-)(Max)(%) |
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0.001 |
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Input offset drift (+/-)(Max)(uV/C) |
|
|
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0.4 |
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Noise at 1 kHz(Typ)(nV/rt (Hz)) |
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7 |
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Bandwidth at min gain(Typ)(MHz) |
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4.7 |
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Vs(Min)(V) |
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4.5 |
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Supply current(Max)(uA) |
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12 |
Local sensor accuracy(Max)(+/- C) |
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1.5 |
Interface |
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Analog output |
Sensor gain(mV/Deg C) |
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10 |