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SN74AHC1G08DCKR
|
| Price |
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| RoHS |
|
See ti.com |
Compliant |
Yes |
Compliant |
Compliant |
Y |
Compliant |
Compliant |
Compliant |
Compliant |
| Lead Status |
|
See ti.com |
No |
Yes |
No |
No |
Y |
See ti.com |
No |
No |
No |
| Fail safe |
|
Idle,Open,Short |
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| VCC1(Min)(V) |
|
1.71 |
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| Rating |
|
Catalog |
|
Catalog |
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Catalog |
Catalog |
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| Package size |
|
mm2 |
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| Surge Voltage Capability(Vpk) |
|
4000 |
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| Datarate(Mbps) |
|
1 |
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| Package Group |
|
SSOP|16 |
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BGA |
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|
LQFP|100,LQFP|64,VQFN|56 |
TSSOP|24 |
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| VCC2(Max)(V) |
|
5.5 |
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| CSA 61010-1 reinforced working(Vrms) |
|
300 |
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| Number of nodes |
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256 |
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| HBM ESD(kV) |
|
16 |
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| CSA 60950-1 basic working(Vrms) |
|
370 |
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| VCC1(Max)(V) |
|
5.5 |
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| CSA isolation rating(Vrms) |
|
3000 |
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| DIN V VDE V 0884-10 working voltage(Vpk) |
|
566 |
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| Isolation rating(Vrms) |
|
2500 |
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| Integrated transformer driver |
|
No |
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| Operating temperature range(C) |
|
-40 to 125 |
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-40 to 125 |
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| Approx. price(US$) |
|
2.15 | 1ku |
|
|
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|
4.85 | 1ku |
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| VCC2(Min)(V) |
|
4.5 |
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| Duplex |
|
Half |
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| SINAD(dB) |
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|
58 |
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| Sample Rate(Max)(MSPS) |
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3600 |
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| Operating Temperature Range(C) |
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-40 to 85 |
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-40 to 125 |
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| Interface |
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Parallel LVDS |
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| Resolution(Bits) |
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12 |
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| DNL(Max)(+/-LSB) |
|
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|
0.4 |
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| # Input Channels |
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2 |
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| SNR(dB) |
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|
58.6 |
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| INL(Max)(+/-LSB) |
|
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|
2.5 |
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| Power Consumption(Typ)(mW) |
|
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|
4180 |
|
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| Package Size |
|
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|
mm2 |
|
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| Reference Mode |
|
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|
Int |
|
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| Approx. Price (US$) |
|
|
|
2474.77 | 100u |
|
|
|
3.38 | 1ku |
|
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| ENOB(Bits) |
|
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|
9.4 |
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| Input Buffer |
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|
Yes |
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| Analog Input BW(MHz) |
|
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|
2800 |
|
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| SFDR(dB) |
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|
73 |
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| Input Range(Vp-p) |
|
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|
0.8 |
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| Architecture |
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Folding Interpolating |
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| RAM(KB) |
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|
100 |
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| I2C |
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1 |
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| Sigma-delta filter |
|
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|
4,3 |
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| Total processing (MIPS) |
|
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100 |
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| UART(SCI) |
|
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2 |
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| Flash(KB) |
|
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128 |
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| Features |
|
|
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|
FPU32,Configurable Logic Block,AEC Q100 |
Adjustable Switching Frequency,Current Limiting,Enable/Shutdown,Error Amplifier,Green Mode,Light Load Efficiency,Programmable Slope Compensation,Soft Start,Soft Switching,Synchronization Pin,Thermal Shutdown |
|
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| High-resolution PWM (ch) |
|
|
|
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|
16 |
|
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| USB |
|
|
|
|
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|
0 |
|
|
|
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| Frequency(MHz) |
|
|
|
|
|
|
100 |
|
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| DMA(Ch) |
|
|
|
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|
6 |
|
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| ADC (Ch) |
|
|
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|
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|
21,14,12 |
|
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| ADC resolution |
|
|
|
|
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|
12-bit |
|
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| PWM(Ch) |
|
|
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|
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|
16 |
|
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| CAN(#) |
|
|
|
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|
2 |
|
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| SPI |
|
|
|
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|
2 |
|
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| QEP |
|
|
|
|
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|
2,1 |
|
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| Topology |
|
|
|
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|
Phase-Shifted Full-Bridge |
|
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| Frequency(Max)(kHz) |
|
|
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|
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|
1000 |
|
|
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| Frequency(Min)(kHz) |
|
|
|
|
|
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|
50 |
|
|
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| UVLO Thresholds On/Off(V) |
|
|
|
|
|
|
|
7.3/6.7 |
|
|
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| Duty Cycle(Max)(%) |
|
|
|
|
|
|
|
97 |
|
|
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| Control Method |
|
|
|
|
|
|
|
Current,Peak Current Mode,Voltage |
|
|
|
| VCC(Max)(V) |
|
|
|
|
|
|
|
17 |
|
|
|
| VCC(Min)(V) |
|
|
|
|
|
|
|
8 |
|
|
|
| Gate Drive(Typ)(A) |
|
|
|
|
|
|
|
0.2 |
|
|
|
