10-Bit, 100 MSPS+ TxDAC D/A Converter Features: Member of Pin-Compatible TxDAC Product Family 125 MSPS Update Rate 10-Bit Resolution Excellent Spurious Free Dynamic Range Performance SFDR to Nyquist @ 40 MHz Output: 52 dBc Differential Current Outputs: 2 ma to 20 mA Edge-Triggered Latches See datasheet for additional features

16-Bit 160 MSPS 2x/4x/8x Interpolating Dual TxDAC+ D/A Converter Features: 16-bit resolution, 160 MSPS/400 MSPS input/output data rate Selectable 2×/4×/8× interpolating filter Programmable channel gain and offset adjustment fS/4, fS/8 digital quadrature modulation capability Fully compatible SPI® port Direct IF transmission mode for 70 MHz + IFs Enables image rejection architecture See datasheet for additional features

Dual, 12-Bit, 1 GSPS, Digital-to-Analog Converter Features: Low power: 1.0 W @ 1 GSPS, 600 mW @ 500 MSPS, full operating conditions Single carrier W-CDMA ACLR = 80 dBc @ 80 MHz IF Analog output: adjustable 8.7 mA to 31.7 mA, RL = 25 Ω to 50 Ω Novel 2×, 4×, and 8× interpolator/coarse complex modulator allows carrier placement anywhere in DAC bandwidth Auxiliary DACs allow control of external VGA and offset control Multiple chip synchronization interface High performance, low noise PLL clock multiplier Digital inverse sinc filter 100-lead, exposed paddle TQFP

10-/12-Bit Mixed Signal Front-End (MxFE) Processor for Broadband Communications Features: Dual 10-/12-Bit, 64 MSPS Sampling A/D Converter with Independent Reference, Input Buffers, Programmable Gain Amplifiers (PGA), Decimation Filters and a Digital Hilbert Block Dual 12-/14-bit, 128 MSPS D/A Converter with Digital Hilbert and Interpolation Filters, Digital I/Q or Real-Signal Up-Converters, By passable Digital Up-Converters A Versatile Mixed Signal Front-End Processor with Dual Receive and Dual Transmit Channels Internal Clock Distribution Block including a Phase-Locked Loop and Timing Generation circuitry Programmable Output Clocks, SPI Port, Programmable Sigma Delta Outputs, Auxiliary DAC outputs, Auxiliary ADC inputs

Broadband Modem Mixed-Signal Front End Features: Low cost, 3.3 V CMOS MxFE® for broadband modems 10-bit digital-to-analog converter (DAC) 2×/4× interpolation filter 250 MSPS DAC update rate 10-bit, 75 MSPS ADC Low noise RxPGA Dual channel muxed input 6 dB input overload attenuator −12 dB to +48 dB (without attenuator) Third-order programmable low-pass filter Flexible digital datapath interface Half-duplex and full-duplex operation Programmable delay Tx driver disable signal Various power-down/reduction modes Internal clock multiplier (PLL) 2 auxiliary programmable clock outputs 64-lead LFCSP

High Performance 8-Bit Display Interface Features: 8-bit analog-to-digital converters 140 MSPS maximum conversion rate Low PLL clock jitter at 140 MSPS Automatic gain matching Automated offset adjustment 2:1 input mux Power-down via dedicated pin or serial register 4:4:4, 4:2:2, and DDR output format modes Variable output drive strength Odd/even field detection External clock input Regenerated Hsync output

110 MSPS/140 MSPS Analog Interface for Flat Panel Displays Features: Automated clamping level adjustment 140 MSPS maximum conversion rate 300 MHz analog bandwidth 0.5 V to 1.0 V analog input range 500 ps p-p PLL clock jitter at 110 MSPS 3.3 V power supply Full sync processing Sync detect for hot plugging Midscale clamping Power-down mode Low power: 500 mW typical 4:2:2 output format mode

Precision Wide-range (3 nA - 3 mA) High-Side Current Mirror Features: Accurately mirrors input current (1:1 ratio) over 6 decades - enables monitoring at low signal levels  Linearity 1% from 3 nA to 3 mA Stable mirror input voltage Voltage held 1 V below supply using internal reference or may be set externally providing greater flexibility in design Adjustable input current limit provides protection to the connected photodiode 2.7 V to 8 V single-supply operation Miniature 8-lead chip scale package (LFCSP 2 mm × 3 mm) saves valuable board space

10 MHz TO 10 GHz 67 dB TruPwr Detector Features: Accurate rms-to-dc conversion from 10 MHz to 10 GHz Single-ended ±1 dB dynamic range: 67 dB at 2.14 GHz    No balun or external input matching required Response independent of waveform types, such as GSM/CDMA/W-CDMA/TD-SCDMA/WiMAX/LTE Logarithmic slope: 55 mV/dB Temperature stability: <±1 dB from −40°C to +125°C Operating temperature: −55°C to +125°C Supply voltage: 4.75 V to 5.25 V Sleep current: 250 µA Pin-compatible with ADL5902 and AD8363

Microprocessor Supervisory in SOT-23 with Active High and Low Push-Pull Output Features: Reliable Low Cost Voltage Monitor with Reset Output Suitable for Monitoring 2.5 V, 3 V, 3.3 V, and 5 V Power Supply Voltages Reset Threshold Levels: 4.62 V, 4.35 V, 3.06 V, 2.88 V, 2.55 V, 2.31 V, and 2.18 V (Typ)Initialize Microprocessor Systems with Added Safety Open-Drain Output Choices (ADM1811, ADM1813, ADM1816, and ADM1818) Can Be Used with a Manual Push-Button to Generate a Reset (ADM1813, ADM1818) Available in 3-Lead SOT-23 and SC70 Packages Active High and Low Push-Pull Output Choices (ADM1810, ADM1812, ADM1815, and ADM1817)