The ADSP-2136x SHARC® processor is a member of the SIMD SHARC family of DSPs that feature Analog Devices, Inc., Super Harvard Architecture. The processor is source code-compatible with the ADSP-2126x and ADSP-2116x DSPs, as well as with first generation ADSP-2106x SHARC processors in SISD (single-instruction, single-data) mode. The ADSP-2136x are 32-/40-bit floating-point processors optimized for high performance automotive audio applications. They contain a large on-chip SRAM and ROM, multiple internal buses to eliminate I/O bottlenecks, and an innovative digital audio interface (DAI).As shown in the functional block diagram on Page 1, the ADSP-2136x uses two computational units to deliver a significant performance increase over the previous SHARC processors on a range of signal processing algorithms. With its SIMD computational hardware, the ADSP-2136x can perform two GFLOPS running at 333 MHz. 

The third generation of SHARC® Processors offers increased performance, audio and application-focused peripherals, and new memory configurations. The ADSP-21369 increases performance to 400MHz while simplifying algorithm development with the integration of a high-bandwidth and very flexible external memory interface. The ADSP-21369 is based on a single-instruction, multiple-data (SIMD) core which supports both 32-bit fixed-point and 32-/40-bit floating point arithmetic formats and is completely code-compatible with all prior SHARC Processors allowing for maximum reuse of legacy code.The ADSP-21369 increases the amount of on-chip memory to 2Mb SRAM and 6Mb ROM while integrating a variety of audio-specific and general purpose peripherals. Peripherals such as an all digital S/PDIF transmitter/receiver, 8-channel asynchronous sample rate converter, 8 high-speed serial ports, 4 precision clock generators, and multiple serial interfaces combine to ensure the ADSP-21369 maximizes system throughput while minimizing system bill of materials costs.

The third generation of SHARC®­ Processors, which includes the ADSP-21375 and ADSP-21371, offers increased performance, audio and application-focused peripherals, and memory configurations capable of supporting surround-sound decoder algorithms. All devices are pin-compatible and completely code-compatible with other SHARC Processors such as the ADSP-21367 and ADSP-21369. These members of the SHARC Processor family are based on a single-instruction, multiple-data (SIMD) core, which supports both 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats making them particularly suitable for high-performance audio applications.The ADSP-21371 offers a high performance at a very low cost 266 MHz/1596 MFLOPs -- within the third generation SHARC Processor family. This level of performance makes the ADSP-21371 particularly well suited to address the increasing requirements of the professional and automotive audio market segments while maintaining a low cost. In addition to its higher core performance, the ADSP-21371 includes additional value-added peripherals such as an S/PDIF transmitter/receiver. The ADSP-21371 also provides a direct interface to synchronous SDRAMs with a 32-bit interface that operates at 133 MHz.Third generation SHARC Processors also integrate application-specific peripherals designed to simplify hardware design, minimize design risks, and ultimately reduce time to market. Grouped together, and broadly named the Digital Audio Interface (DAI), these functional blocks may be connected to each other or to external pins via the software-programmable Signal Routing Unit (SRU). The SRU is an innovative architectural feature that enables complete and flexible routing amongst DAI blocks. Peripherals connected through the SRU include but are not limited to serial ports, SPI ports, and S/PDIF Tx/Rx.DEDICATED AUDIO COMPONENTS ADSP-21371—S/PDIF-compatible digital audio receiver/transmitter ADSP-21371—8 dual data line serial ports that operate at up to 33 Mbps on each data line — each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair 16 PWM outputs configured as four groups of four outputs ROM-based security features include JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multiplier/divider ratios Available in a 208-lead LQFP_EP package

The ADSP-BF522C Blackfin Processor combines high performance, power efficiency and system integration to enable highly optimized designs without compromises. With built-in peripheral selectivity the BF522C provides the greatest flexibility for today’s most demanding convergent signal processing applications. For battery powered applications that either enhance the multimedia experience or deliver a full Mobile TV implementation, the ADSP-BF522C represents the ideal solution to release design innovation.IP protection has become a necessary part of today’s embedded computing applications. The ADSP-BF522C provides a security scheme which balances flexibility and upgradeability with performance through the inclusion of a firmware-based solution including OTP (One Time Programmable) memory to enable users to implement private keys for secure access to program code.For space constrained audio applications the ADSP-BF522C supports an embedded low power stereo audio CODEC.

The ADSP-BF522C Blackfin Processor combines high performance, power efficiency and system integration to enable highly optimized designs without compromises. With built-in peripheral selectivity the BF522C provides the greatest flexibility for today’s most demanding convergent signal processing applications. For battery powered applications that either enhance the multimedia experience or deliver a full Mobile TV implementation, the ADSP-BF522C represents the ideal solution to release design innovation.IP protection has become a necessary part of today’s embedded computing applications. The ADSP-BF522C provides a security scheme which balances flexibility and upgradeability with performance through the inclusion of a firmware-based solution including OTP (One Time Programmable) memory to enable users to implement private keys for secure access to program code.For space constrained audio applications the ADSP-BF522C supports an embedded low power stereo audio CODEC.

The ADSP-BF525 offers up to 600 MHz performance and up to 1200 MMACs. This processor core is supported by an advanced DMA controller supporting one-and two-dimensional DMA transfers between on-chip memory, off-chip memory, and system peripherals. The combination of the processor core speed and the DMA controller allows for efficient processing of audio, voice, video, and image data.The ADSP-BF525 provides peripheral flexibility to complement its high performance processing. The HS USB OTG host direct memory access (HDMA) and NAND flash controller are just a few of the peripheral options on the ADSP-BF525 family—not to mention the availability of up to 48 GPIO ports.For applications where product differentiation represents a challenge for securing market leadership, the ADSP-BF525 enables developers to provide features and benefits to augment their product offerings without compromising cost or power. The scalability of the ADSP-BF525 makes it an ideal candidate for Premium Audio Players where differentiation of features can be realized without sacrificing system cost. Where the diversity of Multimedia applications and content security are key attributes the ADSP-BF525 provides processing flexibility and Lockbox™ Secure Technology to enable users to develop freely and without bounds.IP protection has become a necessary part of today’s embedded computing applications. The ADSP-BF525 provides a security scheme which balances flexibility and upgradeability with performance through the inclusion of a firmware-based solution including OTP (One Time Programmable) memory to enable users to implement private keys for secure access to program code.

The ADSP-BF525 offers up to 600 MHz performance and up to 1200 MMACs. This processor core is supported by an advanced DMA controller supporting one-and two-dimensional DMA transfers between on-chip memory, off-chip memory, and system peripherals. The combination of the processor core speed and the DMA controller allows for efficient processing of audio, voice, video, and image data.The ADSP-BF525 provides peripheral flexibility to complement its high performance processing. The HS USB OTG host direct memory access (HDMA) and NAND flash controller are just a few of the peripheral options on the ADSP-BF525 family—not to mention the availability of up to 48 GPIO ports.For applications where product differentiation represents a challenge for securing market leadership, the ADSP-BF525 enables developers to provide features and benefits to augment their product offerings without compromising cost or power. The scalability of the ADSP-BF525 makes it an ideal candidate for Premium Audio Players where differentiation of features can be realized without sacrificing system cost. Where the diversity of Multimedia applications and content security are key attributes the ADSP-BF525 provides processing flexibility and Lockbox™ Secure Technology to enable users to develop freely and without bounds.IP protection has become a necessary part of today’s embedded computing applications. The ADSP-BF525 provides a security scheme which balances flexibility and upgradeability with performance through the inclusion of a firmware-based solution including OTP (One Time Programmable) memory to enable users to implement private keys for secure access to program code.

The ADSP-BF531 / ADSP-BF532 / ADSP-BF533 processors are members of the Blackfin® family of products, incorporating the Analog Devices, Inc./Intel Micro Signal Architecture (MSA). Blackfin processors combine a dual-MAC state-of-the-art signal processing engine, the advantages of a clean, orthogonal RISC-like microprocessor instruction set, and single instruction, multiple data (SIMD) multimedia capabilities into a single instruction set architecture. The ADSP-BF531 / ADSP-BF532 / ADSP-BF533 processors are completely code and pin-compatible, differing only with respect to their performance and on-chip memory. Specific performance and memory configurations are shown in Table 1.PERIPHERALS Parallel peripheral interface PPI, supporting ITU-R 656 video data formats 2 dual-channel, full duplex synchronous serial ports, supporting eight stereo I2S channels 2 memory-to-memory DMAs 8 peripheral DMAs SPI-compatible port Three 32-bit timer/counters with PWM support Real-time clock and watchdog timer 32-bit core timer Up to 16 general-purpose I/O pins (GPIO) UART with support for IrDA Event handler Debug/JTAG interface On-chip PLL capable of frequency multiplication

The Blackfin® Processor family expands the performance envelope with the ADSP-BF561. With two high performance Blackfin Processor cores, flexible cache architecture, enhanced DMA subsystem, and Dynamic Power Management (DPM) functionality, the ADSP-BF561 can support complex control and signal processing tasks while maintaining extremely high datathroughput.The ADSP-BF561 is a functional extension of the popular Blackfin Processor family and is ideally suited for a broad range of industrial, instrumentation, medical, and consumer appliance applications—allowing for scalability based upon the required data bandwidth and mix of control, plus signal processing needed in the end product.High-Level of Integration 328 KBytes of on-chip memory configured as: 32 KBytes of L1 instruction memory SRAM/Cache per core 64 KBytes of L1 data memory SRAM/Cache per core 4 KBytes of L1 scratchpad memory per core 128 KBytes of low-latency shared L2 memory 32-bit Memory Controller providing glueless connection to multiple banks of SDRAM, SRAM, Flash or ROM. Two Parallel Peripheral Interfaces Units supporting ITU-R 656 video data formats. Two dual-channel, full-duplex, synchronous serial ports supporting eight stereo I2S channels. Dual 16 Channel DMA Controllers, supporting one and two-dimension transfers. SPI-compatible Port. UART with support for IrDA®. 12 timer/counters supporting PWM, pulsewidth and event count modes. 48 Programmable Flags/General Purpose I/O. Event Handler. Dual Watchdog timers. PLL capable of 1x to 63x frequency multiplication. 256-ball Mini-BGA and 297-ball Sparse PBGA packages.

The ADT7411 combines a 10-bit temperature-to-digitalconverter and a 10-bit 8-channel ADC in a 16-lead QSOP. This includes a band gap temperature sensor and a 10-bit ADC to monitor and digitize the temperature reading to a resolution of0.25°C. The ADT7411 operates from a single 2.7 V to 5.5 Vsupply. The input voltage on the ADC channels has a range of 0 V to 2.25 V and the input bandwidth is dc. The reference forthe ADC channels is derived internally. The ADT7411 providestwo serial interface options: a 4-wire serial interface compatiblewith SPI, QSPI, MICROWIRE, and DSP interface standards,and a 2-wire SMBus/I2C interface. It features a standby modethat is controlled via the serial interface.The ADT7411’s wide supply voltage range, low supply current,and SPI-/I2C-compatible interface make it ideal for a variety of applications, including PCs, office equipment, and domesticappliances.Applications Portable battery-powered instruments  PCs Smart battery chargers Telecommunications systems electronic test equipment Domestic appliances  Process controls