Fractional-N PLL with Integrated VCO SMT, 1.31 - 5.66 GHz Features: Ultra Low Phase Noise -112 dBc/Hz in Band Typ. Figure of Merit (FOM) -230 dBc Integer <180 fs RMS Jitter  24-Bit Step Size, 3 Hz Resolution Typ.  Exact Frequency Mode Built in Digital Self Test  40 Lead 6x6mm SMT Package: 36mm²

Low Noise Amplifier, 0.4 GHz to 11 GHz Features: Low noise figure: 1.4 dB typical Single positive supply (self biased) High gain: ≤15.5 dB typical High OIP3: ≤33 dBm typical RoHS-compliant, 2 mm × 2 mm, 6-lead LFCSPHMC8412TCPZ-EP Supports defense and aerospace applications (AQEC standard) Download the HMC8412TCPZ-EP data sheet (pdf) Military temperature range (−55°C to +125°C) Controlled manufacturing baseline 1 assembly/test site 1 fabrication site Product change notification Qualification data available on request V62/21602 DSCC Drawing Number

32 Gbps Limiting Amplifier SMT Features: Supports Data Rates up to 43 Gbps Low Power Dissipation: 300 mW @ VCC = +3.3V Differential Small Signal Gain: 30 dB High Input Sensitivity: 10 mVP-P Differential 3-dB Bandwidth: 26.5 GHz Adjustable Output Voltage Swing up to 800 mVP-P Differential 16 Lead 3x3mm SMT package: 9mm2

20 Gbps Clocked Comparator with RSPECL Output Stage Features: Propagation Delay Clock to Output: 120 ps Overdrive & Slew Rate Dispersion: 10 ps Minimum Pulse Width: 60 ps Resistor Programmable Hysteresis Differential Clock Control Input Bandwidth: 10 GHz Power Dissipation: 150 mW RSCML & RSECL Versions Available 16 Lead 3×3mm SMT Package: 9mm2

9 GHz to 12 GHz, GaAs, MMIC, I/Q Downconverter Features: Conversion gain: 11 dB (typical) at IFOUT = 100 MHz Image rejection: 25 dB (typical) at IFOUT = 100 MHz LO to RF isolation: 46 dB (typical) LO to IF isolation: 26 dB (typical) IF output frequency: dc to 3.5 GHz 32-lead, 4.9 mm × 4.9 mm ceramic leadless chip carrier

5.6 GHz to 8.6 GHz, GaAs, MMIC, I/Q Downconverter Features: Conversion gain: 13 dB typical Image rejection: 32 dBc typical Input P1dB compression: −6 dBm typical Input IP3: 3 dBm typical, 6.0 GHz to 8.6 GHz Noise figure: 2 dB typical LO to RF isolation: 48 dBm typical LO to IF isolation: 13 dBm typical RF to IF isolation: 10 dBm typical Amplitude balance: 0.2 dB typical Phase balance: −2° typical RF return loss: 10 dB typical LO return loss: 15 dB typical IF return loss: 15 dB typical Exposed paddle, 4 mm × 4 mm, 24-lead, LFCSP

5.6 GHz to 8.6 GHz, GaAs, MMIC, I/Q Downconverter Features: Conversion gain: 13 dB typical Image rejection: 32 dBc typical Input P1dB compression: −6 dBm typical Input IP3: 3 dBm typical, 6.0 GHz to 8.6 GHz Noise figure: 2 dB typical LO to RF isolation: 48 dBm typical LO to IF isolation: 13 dBm typical RF to IF isolation: 10 dBm typical Amplitude balance: 0.2 dB typical Phase balance: −2° typical RF return loss: 10 dB typical LO return loss: 15 dB typical IF return loss: 15 dB typical Exposed paddle, 4 mm × 4 mm, 24-lead, LFCSP

Analog Variable Gain Amplifier SMT, 5 - 12 GHz Features: Wide Gain Control Range: 22 dB Single Control Voltage: -1 to -4.5V Output IP3 @ Max Gain: +34 dBm Output P1dB: +22 dBm No External Matching 24 Lead 4x4 mm SMT Package: 16 mm²

Aerospace Monolithic JFET Input Operational Amplifier Features:Low Input Bias and Offset Currents Low Input Offset Voltage: 1.0mV typical Low Input Offset Voltage Drift: 3.0V/C typical Low Input Noise Current High Common-Mode Rejection Ratio: 100dB Low Supply Current

Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU Features: Analog I/O Multichannel, 12-bit, 1 MSPS ADC Up to 16 ADC channels Fully differential and single-ended modes 0 V to VREF analog input range12-bit voltage output DACs Up to 4 DAC outputs available On-chip voltage reference On-chip temperature sensor (±3°C) Voltage comparator Microcontroller ARM7TDMI core, 16-bit/32-bit RISC architecture JTAG port supports code download and debug Clocking options Trimmed on-chip oscillator (±3%) External watch crystal External clock source up to 44 MHz 41.78 MHz PLL with programmable divider See datasheet for additional features