Hot Swappable Dual I2C Isolator Features: Bidirectional I2C communication Open-drain interfaces Suitable for hot swap applications 30 mA current sink capability 1000 kHz operation 3.0 V to 5.5 V supply/logic levels 8-lead, RoHS compliant SOIC package See datasheet for additional features

3.75 kV, 6-Channel, SPIsolator Digital Isolator for SPI with Delay Clock Features: Supports up to 40 MHz SPI clock speed in delay clock mode Supports up to 17 MHz SPI clock speed in 4-wire mode 4 high speed, low propagation delay, SPI signal isolation channels 2 data channels at 250 kbps Delayed compensation clock line 20-lead SSOP with 5.1 mm creepage High temperature operation: 125°C High common-mode transient immunity: >25 kV/μs Safety and regulatory approvals UL recognition per UL 1577 3750 V rms for 1 minute CSA Component Acceptance Notice 5A VDE certificate of conformity DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 VIORM = 565 V peak

3.75 kV RMS Digital Isolators for Isolated USB 2.0 High, Full, and Low Speed Features: USB 2.0 signaling with automatic detection of low, full, and high speed connections 1.5 Mbps, 12 Mbps, and 480 Mbps data rates Bidirectional USB isolator for upstream and downstream ports Redriving and high speed data retiming for input jitter removal and an open eye Flexible clock input options 4.5 V to 5.5 V VBUSx or 3 V to 3.6V operation on each side 21 mA typical idle, low or full speed mode supply current 48 mA typical idle, high speed mode supply current Ultra low power standby in USB 2.0 suspend (L2) or disconnect 1.7 mA typical low power standby, upstream supply current 20 μA typical low power standby, downstream supply current ±6000 V IEC 61000-4-2 ESD protection across the isolation barrier Passed CISPR32/EN55032 Class B emissions High common-mode transient immunity: 50 kV/μs typical Safety and regulatory approvals (pending) UL (pending): 3750 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice 5A (pending) IEC 62368-1, IEC 61010-1, and IEC60601-1 VDE certificate of conformity (pending) DIN V VDE V 0884-11 (VDE V 0884-11):2017-01 VIORM = 849 VPEAK (working voltage) Operating temperature range: −55°C to +125°C Compact 20-lead SSOP with 5.3 mm creepage and clearance

Isolated Switch Regulator with Integrated Feedback Features:Isolated PWM feedback with built in compensationPrimary side transformer driver for up to 2.5 W output power with 5 V input voltageRegulated adjustable output: 3.3 V to 24 VUp to 80% efficiency200 kHz to 1 MHz adjustable oscillatorSoft start function at power-upPulse-by-pulse overcurrent protectionThermal shutdown5000 V rms isolation High common-mode transient immunity: >25 kV/s16-lead SOIC package with 8.3 mm creepageHigh temperature operation: 105C

Single-/Dual-Supply, High Voltage Isolated IGBT Gate Driver Features: 4 A peak drive output capability Output power device resistance < 1Ω Desaturation protection Isolated Fault output Soft Shutdown on Fault Isolated Fault and Ready functions Low propagation delay 55 ns typical Minimum pulse width: 50 ns Operating temperature range: −40°C to +125°C Output voltage range to 35 V See data sheet for additional features

11 A High Voltage Isolated Bipolar Gate Driver with Fault Detection, Miller Clamp Features: 11 A short-circuit source current (0 Ω gate resistance) 9 A short-circuit sink current (0 Ω gate resistance) 4.61 A peak current (2 Ω gate resistance) Output power device resistance: <1 Ω Output voltage range up to 30 V Multiple UVLO options on VDD2 Grade A: 14.5 V (typical) UVLO on VDD2 positive going threshold Grade B and Grade C: 11.5 V (typical) UVLO on VDD2 positive going threshold VDD1 input voltage range from 2.5 V to 6 V Desaturation protection Soft shutdown on desaturation fault Multiple desaturation detect comparator voltages Grade B: 9.2 V (typical) Grade A and Grade C: 3.5 V (typical) Miller clamp output with gate sense input Isolated fault and ready functions Low propagation delay: 75 ns (typical) Operating temperature range: −40°C to +125°C Creepage distance: 8.3 mm minimum CMTI: 100 kV/μs Safety and regulatory approvals (pending) 5000 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice 5A DIN V VDE V 0884-11 VIORM = 2150 V peak

Silicon SPDT Switch, Reflective, 35 GHz to 44 GHz Features:Reflective design Low insertion loss: 1.8 dB at 44 GHz High isolation: 28 dB at 44 GHz High input linearity 0.1 dB power compression (P0.1dB): 37 dBm Third-order intercept (IP3): 52 dBm High RF power handling: 28 dBm average 36 dBm peak Single supply operation: 3.3V Internal negative voltage generator (NVG) RF settling time (0.1 dB final RF output): 45 ns 20-terminal, 3 mm × 3 mm, land grid array package Pin compatible with the ADRF5300: 24 GHz - 32 GHz

Dual-Channel, 3.7 GHz to 5.3 GHz, Receiver Front End Features: Integrated dual-channel RF front end 2-stage LNA and high power SPDT switch On-chip bias and matching Single supply operation Gain High gain mode: 33 dB typical at 4.6 GHz Low gain mode: 18 dB typical at 4.6 GHz Low noise figure High gain mode: 1.6 dB typical at 4.6 GHz Low gain mode: 1.6 dB typical at 4.6 GHz High channel to channel isolation  Between RxOUT-ChA and RxOUT-ChB: 45 dB typical Between TERM-ChA and TERM-ChB: 53 dB typical  Low insertion loss: 0.5 dB typical at 4.6 GHz High power handling at TCASE = 105°C Full lifetime LTE average power (9 dB PAR): 40 dBm Single event (<10 sec operation) LTE average power (9 dB PAR): 43 dBm High OIP3: 31 dBm typical Power-down mode and low gain mode for LNA Low supply current High gain mode: 86 mA typical at 5 V Low gain mode: 36 mA typical at 5 V Power-down mode: 12 mA typical at 5 V Positive logic control 40-lead, 6 mm × 6 mm LFCSP 

0.5 dB LSB, 6-Bit, Silicon Digital Attenuator, 100 MHz to 40 GHz Features:Ultrawideband frequency range: 100 MHz to 40 GHz Attenuation range: 0.5 dB steps to 31.5 dB Low insertion loss with impedance match 2.1 dB up to 18 GHz 2.9 dB up to 26 GHz 4.8 dB up to 40 GHz Attenuation accuracy with impedance match ±(0.10 + 1.0% of attenuation state) up to 18 GHz ±(0.15 + 0.8% of attenuation state) up to 26 GHz ±(0.35 + 2.5% of attenuation state) up to 40 GHz Typical step error with impedance match ±0.18 dB up to 18 GHz ±0.23 dB up to 26 GHz ±0.51 dB up to 40 GHz High input linearity P0.1dB insertion loss state: 30 dBm P0.1dB other attenuation states: 27 dBm IP3: 50 dBm typical High RF input power handling: 27 dBm average, 30 dBm peak Tight distribution in relative phase No low frequency spurious signals SPI and parallel mode control, CMOS/LVTTL compatible RF settling time (0.1 dB of final RF output): 250 ns 24-terminal, 4 mm × 4 mm LGA package Pin compatible with ADRF5720, low frequency cutoff version

Dual Narrow/Wideband RF Transceiver Features: 2 2 highly integrated transceiver Frequency range of 30 MHz to 6000 MHz Transmitter and receiver bandwidth from 12 kHz to 40 MHz Two fully integrated, fractional-N, RF synthesizers LVDS and CMOS synchronous serial data interface options Low power monitor and sleep modes Multichip synchronization capabilities Fast frequency hopping Dynamic profile switching for dynamic data rates and sample rates Fully programmable via a 4-wire SPI 12 mm 12 mm, 196-ball CSP_BGA