10 GHz to 40 GHz, 1:4 Channel, 4 Frequency Multiplier/Filter Features: 4 input frequency multiplier with programmable harmonic filter Quad Differential Output PAs with independent Enable Control Input Frequency Range: 2.5 GHz to 10 GHz Output Frequency Range: 10 GHz to 40 GHz Input power: 20 dBm (50 ) Output power: 5 dBm differential (100 ) Harmonic rejection: 20 dBc to 40 dBc at all frequencies 3-Wire or 4-Wire SPI Control of all functions On-Chip Programmable State Machines for fast multiplier/filter and transmitter switching and control On-chip temperature sensor, output power detectors, and ADC DC power: 450 mW (2.5 V supply) 6 mm 6 mm, 40-terminal LGA package

0.5 GHz to 19 GHz Broadband Bi-Directional Single Channel True Time Delay Unit Features:0.5 GHz to 19 GHz frequency rangeProgrammable Time Delay: 7-bit resolutionProgrammable Time Delay ModesTD_Mode0: 0 to 508ps range, 4ps Standard resolutionTD_Mode1: 0 to 254ps range, 2ps High resolutionProgrammable Attenuation: 6-bit resolution31.5 dB adjustment range0.5 dB step sizeFully programmable via a 3-wire or 4-wire SPI interfaceSPI Programmable and Daisy Chaining selectablePower Dissipation: 1 mW with 1.2V and 1.0V Dual Supplies14-pin 2x3mm LFCSP

SigmaDSP Digital Audio Processor Features: Qualified for automotive applications Fully programmable audio DSP for enhanced sound processing Features SigmaStudio, a proprietary graphical programming tool for the development of custom signal flows Clock oscillator for generating master clock from crystal Up to 294.912 MHz, 32-bit SigmaDSP core at 1.2 V Up to 6144 SIMD instructions per sample at 48 kHz Up to 40 kWords of parameter/data RAM Up to 800 ms digital audio delay pool at 48 kHz Audio input/output and routing 4 serial input ports, 4 serial output ports 48-channel, 32-bit digital input/output up to a sample rate of 192 kHz Flexible configuration for TDM, I2S, left and right justified formats, and PCM Up to 8 stereo ASRCs from 1:8 up to 7.75:1 ratio and 139 dB DNR Stereo S/PDIF input and output Four PDM microphone input channels Multichannel, byte addressable, TDM serial ports Integer PLL and flexible clock generators Integrated die temperature sensor

Rail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator Features: Fully specified rail-to-rail at VCC = 2.5 V to 5.5 V Input common-mode voltage from −0.2 V to VCC + 0.2 V Low glitch TTL-/CMOS-compatible output stage 40 ns propagation delay Low power 1 mW at 2.5 V Shutdown pin Programmable hysteresis Power supply rejection > 60 dB −40°C to +125°C operation

Rail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator Features: Fully specified rail-to-rail at VCC = 2.5 V to 5.5 V Input common-mode voltage from −0.2 V to VCC + 0.2 V Low glitch TTL-/CMOS-compatible output stage 40 ns propagation delay Low power 1 mW at 2.5 V Shutdown pin Programmable hysteresis Power supply rejection > 60 dB −40°C to +125°C operation

3-Channel Sigma-Delta ADC with SPI Features: One (ADE7903) 24-bit, Σ-Δ ADC (simultaneously sampling with three ADE7912/ADE7913 ADCs) On-chip temperature sensor 4-wire SPI serial interface Standalone 24-bit, Σ-Δ ADC Up to four ADE7903 and ADE7912/ADE7913 devices clocked from a single crystal or an external clock Synchronization of multiple ADE7903 and ADE7912/ADE7913 devices ±31.25 mV peak input range for current channel ±500 mV peak input range for voltage channels Single 3.3 V supply 20-lead, wide body SOIC package Operating temperature: −40°C to +85°C

High Performance, Polyphase Energy, and Class S Power Quality Monitoring IC Features: 7 high performance, 24-bit Σ-Δ ADCs 101 dB SNR at 8 kSPS with PGA = 1 Wide input voltage range: ±1 V, 707 mV rms full scale at gain = 1 Differential inputs ±25 ppm/°C maximum channel drift (including ADC, internal VREF, PGA drift) enabling 10000:1 dynamic input range, Class 0.2 metrology with standard external components With the optional ADSW-PQ-CLS Power Quality Library, the complete IEC 61000-4-30 Class S power quality standard is implemented including: Power frequency 10 sec average Magnitude of the supply Dips and swells Interruptions Rapid voltage change Flicker Mains signaling voltage Underdeviation and overdeviation Voltage and current Magnitude Harmonics Interharmonics Unbalance THD Waveform recording Optional ADSW-PQ-CLS Power Quality Library compatible with ARM® Cortex microcontrollers VRMS one-cycle and IRMS one-cycle refreshed each cycle VRMS and IRMS filtered and updated every sample 10 cycle rms/12 cycle rms Period registers to calculate line frequency, one per phase Zero crossing and zero-crossing timeout Phase angle measurements Supports CTs Multipoint phase and gain compensations for CTs Rogowski coils with the addition of an external analog integrator Continuous resampled data available Waveform buffer Advanced metrology feature set Total and fundamental active power, volt amperes reactive (VAR), volt amperes (VA), watthour, VAR hour, and VA hour Total and fundamental IRMS and VRMS Power factor Supports active energy standards: IEC 62053-21 and IEC 62053-22, EN50470-3, OIML R46, and ANSI C12.20 Supports reactive energy standards: IEC 62053-23 and IEC 62053-24 High speed communication port: 20 MHz SPI Integrated temperature sensor with 12-bit successive approximation register (SAR) ADC ±3°C accuracy from −40°C to +85°C

High Performance, Polyphase Energy, and Class S Power Quality Monitoring IC Features: 7 high performance, 24-bit Σ-Δ ADCs 101 dB SNR at 8 kSPS with PGA = 1 Wide input voltage range: ±1 V, 707 mV rms full scale at gain = 1 Differential inputs ±25 ppm/°C maximum channel drift (including ADC, internal VREF, PGA drift) enabling 10000:1 dynamic input range, Class 0.2 metrology with standard external components With the optional ADSW-PQ-CLS Power Quality Library, the complete IEC 61000-4-30 Class S power quality standard is implemented including: Power frequency 10 sec average Magnitude of the supply Dips and swells Interruptions Rapid voltage change Flicker Mains signaling voltage Underdeviation and overdeviation Voltage and current Magnitude Harmonics Interharmonics Unbalance THD Waveform recording Optional ADSW-PQ-CLS Power Quality Library compatible with ARM® Cortex microcontrollers VRMS one-cycle and IRMS one-cycle refreshed each cycle VRMS and IRMS filtered and updated every sample 10 cycle rms/12 cycle rms Period registers to calculate line frequency, one per phase Zero crossing and zero-crossing timeout Phase angle measurements Supports CTs Multipoint phase and gain compensations for CTs Rogowski coils with the addition of an external analog integrator Continuous resampled data available Waveform buffer Advanced metrology feature set Total and fundamental active power, volt amperes reactive (VAR), volt amperes (VA), watthour, VAR hour, and VA hour Total and fundamental IRMS and VRMS Power factor Supports active energy standards: IEC 62053-21 and IEC 62053-22, EN50470-3, OIML R46, and ANSI C12.20 Supports reactive energy standards: IEC 62053-23 and IEC 62053-24 High speed communication port: 20 MHz SPI Integrated temperature sensor with 12-bit successive approximation register (SAR) ADC ±3°C accuracy from −40°C to +85°C

Phase Detector / PLL Frequency Synthesizer Features: 400 MHz bandwidth 2.7 to 3.3 V power supply Separate charge pump supply (VP) allows extended tuning voltage in 3 V systems Programmable charge pump currents 3-wire serial interface Analog and digital lock detect Hardware and software power-down mode 104  MHz phase detectorADF4002-EP supports defense and aerospace applications (AQEC standard) Download ADF4002-EP data sheet (pdf) Military temperature range: −55°C to +125°C Controlled manufacturing baseline One assembly/test site One fabrication site Enhanced product change notification Qualification data available on request V62/11607 DSCC Drawing Number

Microwave Wideband Synthesizer with Integrated VCO Features: Output frequency range: 800 MHz to 12.8 GHz Jitter = 18 fsRMS (Integration BW: 100 Hz to 100 MHz) Jitter = 27 fsRMS (ADC SNR Method) Wideband Noise Floor: -160 dBc/Hz @12 GHz PLL Specifications: -239 dBc/Hz: Normalized In-Band Phase Noise Floor -147 dBc/Hz: Normalized In-Band 1/f Noise Phase Detector Frequency up to 500 MHzReference Input Frequency up to 1 GHz Typical -100 dBc PFD spursReference to Output Delay Specifications: Part-to-Part Standard Deviation: 3 ps Temperature Drift: 0.03 ps/ Adjustment Step Size: <+/-0.1 ps Multi-chip Output Phase Alignment 3.3 V and 5 V Power supplies 7 mm x 7 mm 48 Lead LGA