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TLV5619IPWR

Texas Instruments TLV5619IPWR

TLV5623CDR

Texas Instruments TLV5623CDR

TLV5633CPW

Texas Instruments TLV5633CPW

TLV5636IDG4

Texas Instruments TLV5636IDG4

TLV5638CDRG4

Texas Instruments TLV5638CDRG4

TLV5638ID

Texas Instruments TLV5638ID

TLV5638IDR

Texas Instruments TLV5638IDR

TLV6001RIDBVT

Texas Instruments TLV6001RIDBVT

TLV62080DSGT

Texas Instruments TLV62080DSGT

TLV705285YFPT

Texas Instruments TLV705285YFPT

Price $1.19
RoHS Compliant Compliant Yes Compliant Compliant Yes Compliant Yes Compliant Compliant
Lead Status No No Yes No No Yes No Yes No Yes
Output Type Buffered Voltage Buffered Voltage Buffered Voltage Buffered Voltage Buffered Voltage Buffered Voltage Buffered Voltage
Package Group SOIC,TSSOP SOIC,VSSOP TSSOP,SOIC SOIC,VSSOP SOIC SOIC SOIC SC70,SOT-23 WSON DSBGA,DSLGA
Offset Error(Max)(%) N/A N/A N/A N/A N/A N/A N/A
Settling Time(s) 1 3 1 1 1 1 1
Priority 1 1 1 1 1 1 1
Sample / Update Rate(MSPS) 1 0.102 0.286 0.233 0.233 0.233 0.233
Rating Catalog Catalog Catalog Catalog Catalog Catalog Catalog Catalog Catalog Catalog
Resolution(Bits) 12 8 12 12 12 12 12
Internal Reference Drift(Max)(ppm/degC) N/A N/A N/A N/A N/A N/A N/A
Gain Error(Max)(%FSR) 0.5 0.6 0.3 0.6 0.6 0.6 0.6
Zero Code Error(Typ)(mV) 20 10 20 20 24 24 24
Output Range Min.(mA/V) 0 0 0 0 0 0 0
Special Features N/A N/A N/A N/A N/A N/A N/A Enable,Light Load Efficiency,Output Discharge,Power Good,Pre-Bias Start-Up,Synchronous Rectification,UVLO Fixed Enable,Soft Start
Operating Temperature Range(C) 0 to 70,-40 to 85 -40 to 85,0 to 70 -40 to 85,0 to 70 -40 to 85,0 to 70 -40 to 125,-40 to 85,0 to 70 -40 to 125,-40 to 85,0 to 70 -40 to 125,-40 to 85,0 to 70 -40 to 125 -40 to 125 -40 to 125
DAC Architecture String String String String String String String
Output Range Max.(mA/V) 5.1 5.1 5.1 5.1 5.1 5.1 5.1
Power Consumption(Typ)(mW) 4.3 2.1 2.7 4.5 4.5 4.5 4.5
Approx. Price (US$) 5.04 | 1ku 1.10 | 1ku 5.58 | 1ku 5.34 | 1ku 5.52 | 1ku 5.52 | 1ku 5.52 | 1ku 0.17 | 1ku 0.45 | 1ku 0.14 | 1ku
Interface Parallel SPI Parallel SPI SPI SPI SPI
Package Size mm2 mm2 mm2 mm2 mm2 mm2 mm2 mm2 mm2
INL(Max)(+/-LSB) 4 0.5 3 4 4 4 4
Code to Code Glitch(Typ)(nV-sec) 5 10 5 5 5 5 5
Reference Type Type Type Type Type Type Type
DAC Channels Channels Channels Channels Channels Channels Channels
GBW(Typ)(MHz) 1
Iq per channel(Max)(mA) 0.1
Slew Rate(Typ)(V/us) 0.5
Offset Drift(Typ)(uV/C) 2
Output Current(Typ)(mA) 15
CMRR(Min)(dB) 60
Input Bias Current(Max)(pA) 76
Iq per channel(Typ)(mA) 0.075
Architecture CMOS
Vos (Offset Voltage @ 25C)(Max)(mV) 4.5
Total Supply Voltage(Min)(+5V=5, +/-5V=10) 1.8
Rail-to-Rail In,Out
Total Supply Voltage(Max)(+5V=5, +/-5V=10) 5.5
Number of Channels(#) 1
CMRR(Typ)(dB) 76
Vn at 1kHz(Typ)(nV/rtHz) 28
Additional Features Cost Optimized,EMI Hardened
Iq(Typ)(mA) 0.03 0.03
Switching Frequency(Min)(kHz) 2000
Vout(Max)(V) 4 3.6
Duty Cycle(Max)(%) 100
Vout(Min)(V) 0.5 1.2
Vin(Max)(V) 6 5.5
Type Converter
Regulated Outputs(#) 1 1
Switching Frequency(Max)(kHz) 2000
Iout(Max)(A) 1 0.2
Vin(Min)(V) 2.5 2
Control Mode Constant on-time (COT)
Output Options Fixed Output
Noise(uVrms) 26
Fixed Output Options(V) 1.2,1.5,1.8,1.85,2.5,2.8,2.85,3,3.3,3.4,3.6
PSRR @ 100KHz(dB) 52
Output Capacitor Type Ceramic
Accuracy(%) 2
Vdo(Typ)(mV) 145