The AD9253 is a quad, 14-bit, 80 MSPS/105 MSPS/125 MSPSanalog-to-digital converter (ADC) with an on-chip sample-and-holdcircuit designed for low cost, low power, small size,and ease of use. The product operates at a conversion rate ofup to 125 MSPS and is optimized for outstanding dynamicperformance and low power in applications where a smallpackage size is critical.The ADC requires a single 1.8 V power supply and LVPECL-/CMOS-/LVDS-compatible sample rate clock for full performanceoperation. No external reference or driver components arerequired for many applications.The ADC automatically multiplies the sample rate clock for theappropriate LVDS serial data rate. A data clock output (DCO) forcapturing data on the output and a frame clock output (FCO)for signaling a new output byte are provided. Individual-channelpower-down is supported and typically consumes less than 2 mWwhen all channels are disabled. The ADC contains several featuresdesigned to maximize flexibility and minimize system cost, such as programmable output clock and data alignment and digitaltest pattern generation. The available digital test patternsinclude built-in deterministic and pseudorandom patterns, alongwith custom user-defined test patterns entered via the serial portinterface (SPI).The AD9253 is available in a RoHS-compliant, 48-lead LFCSP.It is specified over the industrial temperature range of ?40?C to+85?C. This product is protected by a U.S. patent.PRODUCT HIGHLIGHTS Small Footprint. Four ADCs are contained in a small, spacesaving package. Low power of 110 mW/channel at 125 MSPS with scalable power options. Pin compatible to the AD9633 12-bit quad ADC. Ease of Use. A data clock output (DCO) operates at frequencies of up to 500 MHz and supports double data rate (DDR) operation. User Flexibility. The SPI control offers a wide range of flexible features to meet specific system requirementsAPPLICATIONS Medical imaging and nondestructive ultrasound Quadrature radio receivers Diversity radio receivers Optical networking Test equipment

The HMC7043 is designed to meet the requirements of multicarrier GSM and LTE base station designs, and offers a wide range of clock management and distribution features to simplify baseband and radio card clock tree designs.The HMC7043 provides 14 low noise and configurable outputs to offer flexibility in interfacing with many different components in a base transceiver station (BTS) system, such as data converters, local oscillators, transmit/receive modules, field programmable gate arrays (FPGAs), and digital front-end ASICs. The HMC7043 can generate up to seven DCLK and SYSREF clock pairs per the JESD204B/JESD204C interface requirements.The system designer can generate a lower number of DCLK and SYSREF pairs, and configure the remaining output signal paths for independent phase and frequency. Both the DCLK and SYSREF clock outputs can be configured to support different signaling standards, including CML, LVDS, LVPECL, and LVCMOS, and different bias conditions to adjust for varying board insertion losses. One of the unique features of the HMC7043 is the independent flexible phase management of each of the 14 channels. All 14 channels feature both frequency and phase adjustment. The outputs can also be programmed for 50 ? or 100 ? internal and external termination options. The HMC7043 device features an RF SYNC feature that synchronizes multiple HMC7043 devices deterministically, that is, ensures that all clock outputs start with the same edge. This operation is achieved by rephrasing the nested HMC7043 or SYSREF control unit/divider, deterministically, and then restarting the output dividers with this new phase. The HMC7043 is offered in a 48-lead, 7 mm ? 7 mm LFCSP package with an exposed pad connected to ground. Applications JESD204B/JESD204C clock generation Cellular infrastructure (multicarrier GSM, LTE, W-CDMA) Data converter clocking Phase array reference distribution Microwave baseband cards

Demonstration circuit 761 is a low noise regulated charge pump featuring the LTC3204 (Burst Mode operation) in the 2X2 DFN package. There are two assembly versions, DC761A-A and DC761A-B for the LTC3204-5 (5V output) and LTC3204-3.3 (3.3V output) respectively. The DC761A-A produces a regulated 5V output from a 2.7V to 5.5V input. The guaranteed output load current is 150mA for VIN between 3.1V and 5.5V, and 65mA for VIN less than 3.1V. The DC761A-B produces a regulated 3.3V output from a 1.8V to 4.5V input. The guaranteed output current is 50mA from VIN between 1.9V and 4.5V, and 40mA for VIN less than 1.9V. The circuit requires only three tiny 0603 surface mount capacitors and uses minimal board space. No inductor or diodes are needed. The circuit features automatic Burst Mode® operation at light loads to maintain low supply current.

The AD8479 is a difference amplifier with a very high inputcommon-mode voltage range. The AD8479 is a precision devicethat allows the user to accurately measure differential signals inthe presence of high common-mode voltages up to ?600 V.The AD8479 can replace costly isolation amplifiers in applicationsthat do not require galvanic isolation. The device operates overa ?600 V common-mode voltage range and has inputs that areprotected from common-mode or differential mode transientsup to ?600 V.The AD8479 has low offset voltage, low offset voltage drift, low gain drift, low common-mode rejection drift, and excellent common-mode rejection ratio (CMRR) over a wide frequency range.The AD8479 is available in a space-saving 8-lead SOIC package and is operational over the ?40?C to +125?C temperature range.Applications High voltage current sensing Battery cell voltage monitors Power supply current monitors Motor controls Isolation

The LTC6954 is a family of very low phase noise clock distribution parts. Each part has three outputs and each output has an individually programmable frequency divider and delay. There are four members of the family, differing in their output logic signal type:LTC6954-1: Three LVPECL outputsLTC6954-2: Two LVPECL and one LVDS/CMOS outputsLTC6954-3: One LVPECL and two LVDS/CMOS outputsLTC6954-4: Three LVDS/CMOS outputsEach output is individually programmable to divide the input frequency by any integer from 1 to 63, and to delay each output by 0 to 63 input clock cycles. The output duty cycle is always 50%, regardless of the divide number. The LVDS/CMOS outputs are jumper selectable via the OUTxSEL pins to provide either an LVDS logic output or a CMOS logic output.The LTC6954 also features Linear Technology?s EZSync system for perfect clock synchronization and alignment every time.All device settings are controlled through an SPI-compatible serial port.Applications Clocking High Speed, High Resolution ADCs, DACs?and Data Acquisition Systems Low Jitter Clock Distribution

The DC2428A is a two-board demonstration system for the LTC2975 Power System Manager and LTM4644-1 quad 4A μModule regulator. The DC2382A contains all the circuitry needed to use the LTC2975 in a power system and control four power supplies. The DC2363A contains four power supplies (LTM4644-1) that the LTC2975 configures and controls. The DC2363A and DC2382A demo boards together provide a sophisticated 4-channel digitally programmable power supply system.

The LTC2063/LTC2064/LTC2065 are single, dual, and quad low power, zero-drift, 20kHz amplifiers. The LTC2063/LTC2064/LTC2065 enable high resolution measurement at extremely low power levels.Typical supply current is 1.4?A per amplifier with a maximum of 2?A. The available shutdown mode has been optimized to minimize power consumption in duty-cycled applications and features low charge loss during power-up, reducing total system power.The LTC2063/LTC2064/LTC2065?s self-calibrating circuitry results in very low input offset (5?V max) and offset drift (0.02?V/?C). The maximum input bias current is only 20pA and does not exceed 100pA over the full specified temperature range. The extremely low input bias current of the LTC2063/LTC2064/LTC2065 allows the use of high value power-saving resistors in the feedback network.With its ultralow quiescent current and outstanding precision, the LTC2063/LTC2064/LTC2065 can serve as a signal chain building block in portable, energy harvesting and wireless sensor applications.The LTC2063 is available in 6-lead SC70 and 5-lead TSOT-23 packages. The LTC2064 is available in 8-lead MSOP and 10-lead DFN packages. The LTC2065 is available in 14-lead TSSOP and 16-lead 3mm ? 3mm QFN packages. These devices are fully specified over the ?40?C to 85?C and ?40?C to 125?C temperature ranges.Applications Signal Conditioning in Wireless Mesh Networks Portable Instrumentation Systems Low-Power Sensor Conditioning Gas Detection Temperature Measurement Medical Instrumentation Energy Harvesting Applications Low Power Current Sensing

Demonstration circuit 1381A is a Low Quiescent Current, Dual Output Synchronous Buck Converter featuring the LTC3857EUH/LTC3858EUH. The DC1381A provides 3.3V/5A and 8.5V/3A from a wide input voltage range of 4.5V to 36V, making it suitable for automotive or other battery fed application where low quiescent current is important. Two versions of the board are available. DC-1381A-A is for the LTC3857EUH, while the DC1381A-B is for the LTC3858EUH. The LTC3857EUH offers lower quiescent current and smaller burst mode ripple, while the LTC3858EUH offers latch-off protection and increased burst mode efficiency.

The LTC7812 is a high performance synchronous Boost+Buck DC/DC switching regulator controller that drives all N-channel power MOSFET stages. It contains independent step-up (boost) and step-down (buck) controllers that can regulate two separate outputs or be cascaded to regulate an output voltage from an input voltage that can be above, below or equal to the output voltage. The LTC7812 operates from a wide 4.5V to 38V input supply range. When biased from the output of the boost regulator, the LTC7812 can operate from an input supply as low as 2.5V after start-up. The 33?A no-load quiescent current extends operating run time in battery-powered systems.Unlike conventional buck-boost regulators, the LTC7812?s cascaded Boost+Buck solution has continuous, nonpulsating, input and output currents, substantially reducing voltage ripple and EMI. The LTC7812 has independent feedback and compensation points for the boost and buck regulation loops, enabling a fast output transient response that can be easily optimized externally.Applications Automotive and Industrial Power Systems High Power Battery Operated Systems

The ADXL345 is a small, thin, low power, 3-axis accelerometer with high resolution (13-bit) measurement at up to ?16g. Digital output data is formatted as 16-bit twos complement and is accessible through either a SPI (3- or 4-wire) or I2C digital interface.The ADXL345 is well suited for mobile device applications. It measures the static acceleration of gravity in tilt-sensing applications, as well as dynamic acceleration resulting from motion or shock. Its high resolution (4 mg/LSB) enables measurement of inclination changes less than 1.0?.Several special sensing functions are provided. Activity and inactivitysensing detect the presence or lack of motion by comparingthe acceleration on any axis with user-set thresholds. Tap sensingdetects single and double taps in any direction. Free-fall sensingdetects if the device is falling. These functions can be mappedindividually to either of two interrupt output pins. An integratedmemory management system with a 32-level first in, first out (FIFO)buffer can be used to store data to minimize host processor activityand lower overall system power consumption.Low power modes enable intelligent motion-based power management with threshold sensing and active acceleration measurement at extremely low power dissipation.The ADXL345 is supplied in a small, thin, 3 mm ? 5 mm ? 1 mm, 14-lead, plastic package. ADXL345-EP Supports defense and aerospace applications (AQEC)APPLICATIONS Handsets Medical instrumentation Gaming and pointing devices Industrial instrumentation Personal navigation devices Hard disk drive (HDD) protection