The AD9094 is an 8-bit, 1 GSPS, quad analog-to-digital converter (ADC). The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. The device is designed to sample wide bandwidth analog signals up to 1.4 GHz. The AD9094 is optimized for wide input bandwidth, a high sampling rate, high works linearity, and low power in a small package. The quad-ADC cores feature multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs that support a variety of user-selectable input ranges. An integrated voltage reference facilitates design considerations. The analog inputs and clock signals are differential inputs. Users can configure each pair of intermediate frequency (IF) receiver outputs onto either one or two lanes of JESD204B Subclass 1 or Subclass 0, high speed, serialized outputs, depending on the sample rate and the acceptable lane rate of the receiving logic device. Multiple device synchronization is supported through the SYSREF?, SYNCINB?AB, and SYNCINB?CD input pins. The AD9094 has flexible power-down options that allow significant power savings when desired. To program the power down options, use the 1.8 V capable, serial port interface (SPI). The AD9094 is available in a Pb-free, 72-lead, lead frame chip scale package (LFCSP) and is specified over a junction temperature range of ?40?C to +105?C. This product may be protected by one or more U.S. or international patents. Note that throughout the data sheet, multifunction pins, such as PDWN/STBY, are referred to either by the entire pin name or by a single function of the pin, for example, PDWN, when only that function is relevant. PRODUCT HIGHLIGHTS Low power consumption per channel. JESD204B lane rate support up to 15 Gbps. Wide, full power bandwidth supports IF sampling of signals up to 1.4 GHz. Buffered inputs ease filter design and implementation. Four integrated wideband decimation filters and numerically controlled oscillator (NCO) blocks supporting multiband receivers. Programmable fast overrange detection. On-chip temperature diode for system thermal management.APPLICATIONSLaser imaging, detection, and ranging (LIDAR)CommunicationsDigital oscilloscope (DSO)Ultrawideband satellite receiversInstrumentation

DC456A: Demo Board for LTC3412 2.5A, 4MHz, Monolithic Synchronous Step-Down Regulator.

The ADAQ7980/ADAQ7988 are 16-bit analog-to-digital converter(ADC) ?Module? data acquisition systems that integrate four common signal processing and conditioning blocks into a system in package (SiP) design that supports a variety of applications. These devices contain the most critical passive components,eliminating many of the design challenges associated with traditional signal chains that use successive approximation register (SAR) ADCs. These passive components are crucial to achieving the specified device performance.The ADAQ7980/ADAQ7988 contain a high accuracy, low power, 16-bit SAR ADC, a low power, high bandwidth, high inputimpedance ADC driver, a low power, stable reference buffer,and an efficient power management block. Housed within a tiny, 5 mm ? 4 mm LGA package, these products simplify the design process for data acquisition systems. The level of system integrationof the ADAQ7980/ADAQ7988 solves many design challenges, while the devices still provide the flexibility of a configurableADC driver feedback loop to allow gain and/or common-mode adjustments. A set of four device supplies provides optimal system performance; however, single-supply operation is possible with minimal impact on device operating specifications.The ADAQ7980/ADAQ7988 integrate within a compact, integrated circuit (IC)-like form factor key componentscommonly used in data acquisition signal chain designs. The?Module family transfers the design burden of componentselection, optimization, and layout from designer to device,shortening overall design time, system troubleshooting, and ultimately improving time to market.The serial peripheral interface (SPI)-compatible serial interfacefeatures the ability to daisy-chain multiple devices on a single, 3-wire bus and provides an optional busy indicator. The userinterface is compatible with 1.8 V, 2.5 V, 3 V, or 5 V logic.Specified operation of these devices is from ?55?C to +125?C.Applications Automated test equipment (ATE) Battery powered instrumentation Communications Data acquisition Process control Medical instruments

The SSM6322 is an integrated, dual-channel audio amplifier solution that interfaces directly with audio DAC/CODEC, maximizing the fidelity of high fidelity audio signal chains. The highly efficient design of the SSM6322 delivers outstandingaudio performance while minimizing power dissipation for maximum battery life in portable applications.The SSM6322 features ?121 dB THD + N at 1 kHz, along with very low output noise from 20 Hz to 20 kHz. The low power operation, high peak output current, and high PSRR make the SSM6322 an ideal candidate for applications that require high fidelity audio, high dynamic range, precision, and low power. This highly integrated drive solution also reduces development time while reducing board space and minimizing external components.The SSM6322 is available in a 24-lead LFCSP package. The SSM6322 operates over the industrial temperature of ?40?C to +85?C.Applications High fidelity headphone driver Mobile phones Bluetooth speakers & headphones Gaming Notebooks and Tablets A/V receivers Professional audio equipment Audio test equipment Automobile infotainment system

DC1748A-C: Demo Board for LTM2883 SPI/Digital or I2C μModule Isolator with Adjustable ±12.5V and 5V Regulated Power.

Demonstration circuit 2091A is optimized for evaluation of the LTC5599 low power direct quadrature modulator. The balanced I and Q baseband input ports can be either AC- or DC-coupled to a source with a common mode voltage level of about 1.4V. Fixed LC networks on the LO and RF ports cover a continuous 90MHz to 1300MHz range. The SPI interface controls the supply current, modulator gain, and allows optimization of the LO carrier feedthrough and side-band suppression.

The AD7192 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (?-?) analog-to-digital converter (ADC). The on-chip low noise gain stage means that signals of small amplitude can be interfaced directly to the ADC.The device can be configured to have two differential inputs or four pseudo differential inputs. The on-chip channel sequencer allows several channels to be enabled, and the AD7192 sequentially converts on each enabled channel. This simplifies communication with the part. The on-chip 4.92 MHz clock can be used as the clock source to the ADC or, alternatively, an external clock or crystal can be used. The output data rate from the part can be varied from 4.7 Hz to 4.8 kHz.The device has two digital filter options. The choice of filter affects the rms noise/noise-free resolution at the programmed output data rate, the settling time, and the 50 Hz/60 Hz rejection. For applications that require all conversions to be settled, the AD7192 includes a zero latency feature.The part operates with a power supply from 3 V to 5.25 V. It consumes a current of 4.35 mA. It is housed in a 24-lead TSSOP package.ApplicationsWeigh scalesStrain gage transducersPressure measurementPressure measurementTemperature measurementChromatographyPLC/DCS analog input modulesData acquisitionMedical and scientific instrumentation

The LTC2345-18 is an 18-bit, low noise 8-channel simultaneous sampling successive approximation register (SAR) ADC with differential, wide common mode range inputs. Operating from a 5V low voltage supply and using the internal reference and buffer, each channel of this SoftSpanTM ADC can be independently configured on a conversion-by-conversion basis to accept ?4.096, 0V to 4.096V, ?2.048V, or 0V to 2.048V signals. Individual channels may also be disabled to increase throughput on the remaining channels.The wide input common mode range and 102dB CMRR of the LTC2345-18 analog inputs allow the ADC to directly digitize a variety of signals, simplifying signal chain design. This input signal flexibility, combined with ?5LSB INL, no missing codes at 18 bits, and 91.8dB SNR, makes the LTC2345-18 an ideal choice for many applications requiring wide dynamic range.The LTC2345-18 supports pin-selectable SPI CMOS (1.8V to 5V) and LVDS serial interfaces. Between one and eight lanes of data output may be employed in CMOS mode, allowing the user to optimize bus width and throughput.Applications Programmable Logic Controllers Industrial Process Control Medical Imaging High Speed Data Acquisition

Demonstration Circuit DC1658A is a 20V High Efficiency Nanopower Step-Down Regulator featuring the LTC3388-1/ LTC3388-3. The LTC3388 is an ultralow quiescent current power supply designed to regulate the output voltage by means of a nanopower high efficiency synchronous buck regulator. The input current is only 720nA typical at no load while maintaining output voltage regulation, capable of supplying 50mA of load current. The LTC3388-1/ LTC3388-3 also incorporates an accurate undervoltage lockout feature to disable the converter and maintain a low quiescent current state when the input voltage falls below 2.3V. In regulation, the LTC3388-1/LTC3388-3 enter a sleep state in which both input and output quiescent currents are minimal. The buck converter turns on and off as needed to maintain regulation. An additional standby mode disables the buck switching while the  output is in regulation for short duration loads requiring low ripple.

The ADMV4420 is a highly integrated, double balanced, active mixer with an integrated fractional-N synthesizer, ideally suited for next generation K band satellite communications.The RF front end consists of an integrated RF balun and low noise amplifier (LNA) for an optimal, 7 dB, single-sideband noise figure while minimizing external components. Additionally, the high dynamic range IF output amplifier provides a nominal conversion gain of 36 dB.An integrated low phase noise, fractional-N, phase-locked loop (PLL) with a multicore voltage controlled oscillator (VCO) and internal 2? multiplier generate the necessary on-chip LO signal for the double balanced mixer, eliminating the need for external frequency synthesis. The multicore VCO uses an internal autocalibration routine that allows the PLL to select the necessary settings and lock in approximately 400 ?s.The reference input to the PLL employs a differentially excited 50 MHz crystal oscillator. Alternatively, the reference input can be driven by an external, singled-ended, 50 MHz source. The phase frequency detector (PFD) comparison frequency of the PLL operates up to 50 MHz.The ADMV4420 is fabricated on a silicon germanium (SiGe), bipolar complementary metal-oxide semiconductor (BiCMOS) process, and is available in a 32-lead, RoHS compliant, 5 mm ? 5 mm LFCSP package with an exposed pad. The device is specified over the ?40?C to +85?C temperature range on a 5 V power supply.Applications Satellite communication Point to point microwave communication