Demonstration circuit 2158A hosts a high accuracy RMS Power Detector featuring the LTC5596 IC. This device is a wide dynamic range RMS RF Power Detector operational from 100MHz to 40GHz. The input dynamic range with 1dB accuracy is up to 35dB depending on frequency. The detector output voltage slope is normally 29mV/dB. The DC2158A Demo Circuit is optimized for wide operational frequency range up to 40GHz with 2.9mm SMK edge mount connector. Input impedance to LTC5596 is internally matched to 50Ω. It is suitable for RMS measurements of high crest factor waveforms up to 12dB peak/average ratio. No external coupling capacitor is necessary if DC voltage at RFIN pin is kept below 1.0V. Contact applications support for more information.

Demonstration Circuit 2164A-C features a PolyPhase® design using four paralleled LTM4630EY-1's (A-grade), the high efficiency, high density, dual 18A, switch mode step-down power module regulator. The input voltage is from 4.5V to 15V. The output voltage is jumper selectable and can be set to 0.9V, 1.0V, 1.2V, 1.5V or 1.8V. DC2164A-C can deliver nominal 140A output current. As explained in the data sheet, output current derating is necessary for certain VIN, VOUT, and thermal conditions. The LTM4630-1A on the DC2164A-C always operate in continuous conduction mode. The switching frequency can be programmed through a resistor or can be synchronized to an external clock signal. The board allows the user to program how its output voltage ramps up and down through the TRACK pin.

The LT3062 is a micropower, low dropout (LDO) linear regulator that operates over a 1.6V to 45V supply range and is available in a series of fixed output and adjustable versions. The device supplies 200mA of output current with a typical dropout voltage of 300mV. A single external capacitor provides programmable low noise reference performance and output soft-start functionality. The LT3062?s quiescent current is merely 45?A and provides fast transient response with a minimum 3.3?F output capacitor. In shutdown, quiescent current is less than 1?A and the reference soft start capacitor is reset.The LT3062 optimizes stability and transient response with low ESR, ceramic output capacitors. The LT3062 does not require the addition of ESR as is common with other regulators.Internal protection circuitry includes reverse-battery protection, reverse-output protection, reverse-current protection, current limit with foldback and thermal shutdown.The LT3062 is available in fixed output voltages of 3.3V and 5V, and as an adjustable device with an output voltage range from the 600mV reference up to 40V. The LT3062 is offered in the thermally enhanced 8-lead 2mm ? 3mm DFN and MSOP packages.Applications Battery Powered Systems Automotive Power Supplies Industrial Power Supplies Avionic Power Supplies Portable Instruments

The LTC3265 is a low noise dual polarity output power supply including a boost charge pump, an inverting charge pump and two low noise positive and negative LDO post regulators. The boost charge pump powers the positive LDO post regulator while the inverting charge pump powers the negative LDO regulator. Each LDO can provide up to 50mA of output current. The LDO output voltages can be adjusted using external resistor dividers.The charge pumps employ low quiescent current Burst Mode operation or low noise constant frequency mode. During Burst Mode operation, the boost charge pump regulates its output (VOUT +) to 0.94 ? 2 ? VIN_P while the inverting charge pump regulates its output (VOUT ?) to ?0.94 ? VIN_N. In Burst Mode operation the LTC3265 draws only 135?A of quiescent current with both LDOs on. In constant frequency mode, the boost and inverting charge pumps produce outputs equal to 2 ? VIN_P and ?VIN_N respectively and operate at a fixed 500kHz or to a programmed value between 50kHz to 500kHz using an external resistor. The LTC3265 is available in low profile 3mm ? 5mm ? 0.75mm 18-lead DFN and thermally enhanced 20-lead TSSOP packages.Applications Low Noise Bipolar/Inverting Supplies Industrial/Instrumentation Low Noise Bias Generators

The AD7766/AD7766-1/AD7766-2 are high performance,24-bit, oversampled SAR analog-to-digital converters (ADCs).The AD7766/AD7766-1/AD7766-2 combine the benefits of alarge dynamic range and input bandwidth, consuming 15 mW,10.5 mW, and 8.5 mW power, respectively, and are contained ina 16-lead TSSOP package.Ideal for ultralow power data acquisition (such as PCI- and USBbasedsystems), the AD7766/AD7766-1/AD7766-2 provide 24-bitresolution. The combination of exceptional SNR, wide dynamicrange, and outstanding dc accuracy make the AD7766/AD7766-1/AD7766-2 ideally suited for measuring small signal changes over awide dynamic range. This is particularly suitable for applicationswhere small changes on the input are measured on larger ac ordc signals. In such an application, the AD7766/AD7766-1/AD7766-2 accurately gather both ac and dc information.The AD7766/AD7766-1/AD7766-2 include an on-board digitalfilter (complete with linear phase response) that acts to eliminateout-of-band noise by filtering the oversampled input voltage.The oversampled architecture also reduces front-end antialiasrequirements. Other features of the AD7766/AD7766-1/AD7766-2include a SYNC/PD (synchronization/power-down) pin, allowingthe synchronization of multiple AD7766/AD7766-1/AD7766-2devices. The addition of an SDI pin provides the option of daisychaining multiple AD7766/AD7766-1/AD7766-2 devices.The AD7766/AD7766-1/AD7766-2 operate from a 2.5 V supplyusing a 5 V reference. The devices operate from ?40?C to +105?C. Applications Low power PCI/USB data acquisition systems Low power wireless acquisition systems Vibration analysis Instrumentation High precision medical acquisition

The AD5821 is a single 10-bit digital-to-analog converter with 120 mA output current sink capability. It features an internal reference and operates from a single 2.7 V to 5.5 V supply. The DAC is controlled via a 2-wire (I2C-compatible) serial interface that operates at clock rates up to 400 kHz.The AD5821 incorporates a power-on reset circuit that ensures that the DAC output powers up to 0 V and remains there until a valid write takes place. It has a power-down feature that reduces the current consumption of the device to 1 ?A maximum.The AD5821 is designed for autofocus, image stabilization, and optical zoom applications in camera phones, digital still cameras, and camcorders.The AD5821 also has many industrial applications, such as controlling temperature, light, and movement, over the range of ?40?C to +85?C without derating.The I2C address for the AD5821 is 0x18.CONSUMER APPLICATIONS Lens autofocus Image stabilization Optical zoom Shutters Iris/exposure Neutral density (ND) filters Lens covers Camera phones Digital still cameras Camera modules Digital video cameras/camcorders Camera-enabled devices Security cameras Web/PC camerasINDUSTRIAL APPLICATIONS Heater controls Fan controls Cooler (Peltier) controls Solenoid controls Valve controls Linear actuator controls Light controls Current loop controls

BOARD EVALUATION FOR AD7327

The AD9652 is a dual, 16-bit analog-to-digital converter (ADC) with sampling speeds of up to 310 MSPS. It is designed to support demanding, high speed signal processing applications that require exceptional dynamic range over a wide input frequency range (up to 465 MHz). Its exceptional low noise floor of ?157.6 dBFS and large signal spurious-free dynamic range (SFDR) performance (exceeding 85 dBFS, typical) allows low level signals to be resolved in the presence of large signals.The dual ADC cores feature a multistage, pipelined architecture with integrated output error correction logic. A high performance on-chip buffer and internal voltage reference simplify the inter-face to external driving circuitry while preserving the exceptional performance of the ADC.The AD9652 can support input clock frequencies of up to 1.24 GHz with a 1, 2, 4, and 8 integer clock divider used to generate the ADC sample clock. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle. The 16-bit output data (with an overrange bit) from each ADC is interleaved onto a single LVDS output port along with a double data rate (DDR) clock. Programming for setup and control are accomplished using a 3-wire SPI-compatible serial interface.The AD9652 is available in a 144-ball CSP_BGA and is specified over the industrial temperature range of ?40?C to +85?C. This product is protected by pending U.S. patents. PRODUCT HIGHLIGHTS Integrated dual, 16-bit, 310 MSPS ADCs. On-chip buffer simplifies ADC driver interface. Operation from a 3.3 V and 1.8 V supply and a separate digital output driver supply accommodating LVDS outputs. Proprietary differential input maintains excellent SNR performance for input frequencies of up to 485 MHz. SYNC input allows synchronization of multiple devices. Three-wire, 3.3 V or 1.8 V SPI port for register programming and readback. APPLICATIONS Miltary radar and communications Multimode digital receivers (3G or 4G) Test and Instrumentation Smart antenna systems

The AD9653 is a quad, 16-bit, 125 MSPS analog-to-digital converter(ADC) with an on-chip sample-and-hold circuitdesigned for low cost, low power, small size, and ease of use.The product operates at a conversion rate of up to 125 MSPSand is optimized for outstanding dynamic performance and lowpower in applications where a small package size is critical.The ADC requires a single 1.8 V power supply and LVPECL-/CMOS-/LVDS-compatible sample rate clock for full performanceoperation. No external reference or driver components arerequired for many applications.The ADC automatically multiplies the sample rate clock for theappropriate LVDS serial data rate. A data clock output (DCO) forcapturing data on the output and a frame clock output (FCO)for signaling a new output byte are provided. Individual-channelpower-down is supported and typically consumes less than 2 mWwhen all channels are disabled. The ADC contains several featuresdesigned to maximize flexibility and minimize system cost, such as programmable output clock and data alignment and digitaltest pattern generation. The available digital test patternsinclude built-in deterministic and pseudorandom patterns, alongwith custom user-defined test patterns entered via the serial portinterface (SPI).The AD9653 is available in a RoHS-compliant, 48-lead LFCSP.It is specified over the industrial temperature range of ?40?C to+85?C.PRODUCT HIGHLIGHTS Small Footprint. Four ADCs are contained in a small, space-saving package. Low power of 163 mW/channel at 125 MSPS with scalable power options. Pin compatible to the AD9253 14-bit quad and AD9633 12-bit quad ADC. Ease of Use. A data clock output (DCO) operates at frequencies of up to 500 MHz and supports double data rate (DDR) operation. User Flexibility. The SPI control offers a wide range of flexible features to meet specific system requirementsAPPLICATIONS Medical ultrasound and MRI High speed imaging Quadrature radio receivers Diversity radio receivers Test equipment

The AD9670 is designed for low cost, low power, small size, andease of use for medical ultrasound applications. It contains eightchannels of a VGA with an LNA, a CW harmonic rejection I/Qdemodulator with programmable phase rotation, an antialiasingfilter, an ADC, and a digital demodulator and decimator for dataprocessing and bandwidth reduction.Each channel features a maximum gain of up to 52 dB, a fullydifferential signal path, and an active input preamplifier termination.The channel is optimized for high dynamic performance andlow power in applications where a small package size is critical.The LNA has a single-ended-to-differential gain that is selectablethrough the serial port interface (SPI). Assuming a 15 MHz noisebandwidth (NBW) and a 21.6 dB LNA gain, the LNA input SNRis 94 dB. In CW Doppler mode, each LNA output drives an I/Qdemodulator that has independently programmable phaserotation with 16 phase settings.Power-down of individual channels is supported to increasebattery life for portable applications. Standby mode allows quickpower-up for power cycling. In CW Doppler operation, theVGA, antialiasing filter, and ADC are powered down. The ADCcontains several features designed to maximize flexibility andminimize system cost, such as a programmable clock, dataalignment, and programmable digital test pattern generation.The digital test patterns include built-in fixed patterns, built-inpseudorandom patterns, and custom user-defined test patternsentered via the SPI.Applications Medical imaging/ultrasound Nondestructive testing (NDT)