The HMC862A is a low noise, programmable frequency divider in a 3 mm ? 3 mm, leadless, surface-mount package. The frequency divider, N, can be programmed to divide from 1, 2, 4, or 8 in the 0.1 GHz to 24 GHz input frequency range.The low phase noise, wide frequency range, and flexible division ratio make this device ideal for high performance and wideband communication systems.Applications Satellite communication systems Point to point and point to multipoint radios Military applications Test equipment

The AD7768-1 is a low power, high performance, ?-? analog-to-digital converter (ADC), with a ?-? modulator and digitalfilter for precision conversion of both ac and dc signals. The AD7768-1 is a single-channel version of the AD7768, an 8-channel, simultaneously sampling, ?-? ADC. The AD7768-1 provides a single configurable and reusable data acquisition (DAQ) footprint, which establishes a new industry standard in combined ac and dc performance and enables instrumentation and industrial system designers to design across multiple measurement variants for both isolated and nonisolated applications.The AD7768-1 achieves a 108.5 dB dynamic range when using the low ripple, finite impulse response (FIR) digital filter at 256 kSPS, giving 110.8 kHz input bandwidth, combined with ?1.1 ppm integral nonlinearity (INL), ?30 ?V offset error, and ?30 ppm gain error.A wider bandwidth, up to 500 kHz Nyquist (filter ?3 dB point of 204 kHz), is available using the sinc5 filter, enabling a view of signals over an extended range.The AD7768-1 offers the user the flexibility to configure and optimize for input bandwidth vs. output data rate (ODR) and vs. power dissipation. The flexibility of the AD7768-1 allows dynamic analysis of a changing input signal, making the device particularly useful in general-purpose DAQ systems. The selection of one of three available power modes allows the designer to achieve required noise targets while minimizing power consumption. The design of the AD7768-1 is unique in that it becomes a reusable and flexible platform for low power dc and high performance ac measurement modules.The AD7768-1 achieves the optimum balance of dc and ac performance with excellent power efficiency. The following three operating modes allow the user to trade off the input bandwidth vs. power budgets: Fast mode offers both a sinc filter with up to 256 kSPS and 52.2 kHz of bandwidth, and 26.4 mW of power consumption, or a FIR filter with up to 256 kSPS, 110.8 kHz of bandwidth and 36.8 mW of power consumption. Median mode offers a FIR filter with up to 128 kSPS, 55.4 kHz of bandwidth and 19.7 mW of power consumption. Low power mode offers a FIR filter with up to 32 kSPS, 13.85 kHz of bandwidth and 6.75 mW of power consumption.The AD7768-1 offers extensive digital filtering capabilities that meet a wide range of system requirements. The filter options allow configuration for frequency domain measurements with tight gain error over frequency, linear phase response requirements (brick wall filter), a low latency path (sinc5 or sinc3) for use in control loop applications, and measuring dc inputs with the ability to configure the sinc3 filter to reject the line frequency of either 50 Hz or 60 Hz. All filters offer programmable decimation.A 1.024 MHz sinc5 filter path exists for users seeking an even higher ODR than is achievable using the low ripple FIR filter. This path is quantization noise limited. Therefore, it is best suited for customers requiring minimum latency for control loops or implementing custom digital filtering on an external field programmable gate array (FPGA) or digital signal processor (DSP).The filter options include the following: A low ripple FIR filter with a ?0.005 dB pass-band ripple to 102.4 kHz. A low latency sinc5 filter with up to a 1.024 MHz data rate to maximize control loop responsiveness. A low latency sinc3 filter that is fully programmable, with 50 Hz/60 Hz rejection capabilities.When using the AD7768-1, embedded analog functionalitywithin the AD7768-1 greatly reduces the design burden over theentire application range. The precharge buffer on each analoginput decreases the analog input current compared tocompeting products, simplifying the task of an externalamplifier to drive the analog input.A full buffer input on the reference reduces the input current,providing a high impedance input for the external referencedevice or in buffering any reference sense resistor scenariosused in ratiometric measurements.The device operates with a 5.0 V AVDD1 ? AVSS supply, a 2.0 V to 5.0 V AVDD2 ? AVSS supply, and a 1.8 V to 3.3 V IOVDD ? DGND supply.In low power mode, the AVDD1, AVDD2, and IOVDD supplies can run from a single 3.0 V rail.The device requires an external reference. The absolute input reference (REFIN) voltage range is 1 V to AVDD1 ? AVSS.The specified operating temperature range is ?40?C to +125?C. The device is housed in a 4 mm ? 5 mm, 28-lead LFCSP.Note that, throughout this data sheet, multifunction pins, suchas XTAL2/MCLK, are referred to either by the entire pin nameor by a single function of the pin, for example, MCLK, whenonly that function is relevant.Applications Platform ADC to serve a superset of measurements and sensor types Sound and vibration, acoustic, and material science research and development Control and hardware in loop verification Condition monitoring for predictive maintenance Electrical test and measurement Audio testing and current and voltage measurement Clinical electroencephalogram (EEG), electromyogram (EMG), and electrocardiogram (ECG) vital signs monitoring USB-, PXI-, and Ethernet-based modular DAQ Channel to channel isolated modular DAQ designs

The ADG5419 is a monolithic industrial CMOS analog switch containing a latch-up immune single-pole/double-throw (SPDT) switch. An EN input on the LFCSP package is used to enable or disable the device. When disabled, all channels are switched off.Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the power supplies. In the off condition, signal levels up to the supplies are blocked. The ADG5419 exhibits break-before-make switching action for use in multiplexer applications.The ultralow on resistance and on-resistance flatness of these switches make them ideal solutions for data acquisition and gain switching applications, where low distortion is critical. The latch-up immune construction, and high ESD rating, makes these switches more robust in harsh environments.PRODUCT HIGHLIGHTS Trench isolation guards against latch-up. A dielectric trench separates the P and N channel transistors thereby preventing latch-up even under severe overvoltage conditions. Low RON. Dual-supply operation. For applications where the analog signal is bipolar, the ADG5419 can be operated from dual supplies up to ?22 V. Single-supply operation. For applications where the analog signal is unipolar, the ADG5419 can be operated from a single-rail power supply up to 40 V. 3 V logic compatible digital inputs: VINH = 2.0 V, VINL = 0.8 V. No VL logic power supply required.APPLICATIONS High voltage signal routing Automatic test equipment Analog front-end circuits Precision data acquisition Industrial Instrumentation Amplifier gain select Relay replacement

The AD5247 provides a compact, 2 mm ? 2.1 mm, packaged solution for 128-position adjustment applications. This device performs the same electronic adjustment function as a mechanical potentiometer or a variable resistor. Available in four different end-to-end resistance values (5 k?, 10 k?, 50 k?, and 100 k?), these low temperature coefficient devices are ideal for high accuracy and stability variable resistance adjustments.The wiper settings are controllable through the I2C?-compatible digital interface, which can also be used to read back the present wiper register control word. The 10 k? and 100 k? options each have three hard-coded slave address options available to allow users access to three of these devices on one I2C bus (see Table 8 for a full list of slave address locations).The resistance between the wiper and either end point of the fixed resistor varies linearly with respect to the digital code transferred into the RDAC latch. Note the terms digital potentiometer, VR (variable resistor), and RDAC are used interchangeably in this document.Operating from a 2.7 V to 5.5 V power supply and consuming 3 ?A allows the AD5247 to be used in portable battery-operated applicationsApplications Mechanical potentiometer replacement in new designs Transducer adjustment of pressure, temperature, position, chemical, and optical sensors RF amplifier-biasing LCD brightness and contrast adjustment Automotive electronics adjustment Gain control and offset adjustment

The?AD8400?/?AD8402?/ AD8403 provide a single, dual or quad channel, 256 position digitally controlled variable resistor (VR) device. These devices perform the same electronic adjustment function as a potentiometer or variable resistor. The AD8400 contains a single variable resistor in the compact SO-8 package. The AD8402 contains two independent variable resistors in saving SO-14 surface mount package. The AD8403 contains four independent variable resistors in 24-lead PDIP, SOIC and TSSOP packages. Each part contains a fixed resistor with a wiper contact that taps the fixed resistor value at a point determined by a digital code loaded into the controlling serial input register. The resistance between the wiper and either endpoint of the fixed resistor varies linearly with respect to the digital code transferred into the VR latch. Each variable resistor offers a completely programmable value of resistance, between the A terminal and the wiper or the B terminal and the wiper. The fixed A to B terminal resistance of 1 k?, 10 k?, 50 k? or 100 k? has a ?1% channel-to-channel matching tolerance with a nominal temperature coefficient of 500 ppm/?C. A unique switching circuit minimizes the high glitch inherent in traditional switched resistor designs avoiding any make-before-break or break-before-make operation.Each VR has its own VR latch that holds its programmed resistance value. These VR latches are updated from an SPI compatible serial-to-parallel shift register that is loaded from a standard 3-wire serial-input digital interface. Ten data bits make up the data word clocked into the serial input register. The data word is decoded where the first two bits determine the address of the VR latch to be loaded, the last eight bits are data. A serial data output pin at the opposite end of the serial register allows simple daisy-chaining in multiple VR applications without additional external decoding logic.

The ADAU1463/ADAU1467 are automotive qualified audio processors that far exceed the digital signal processing capabilities of earlier SigmaDSP? devices. They are pin and register compatible with each other, as well as with theADAU1450/ADAU1451/ADAU1452 SigmaDSP? processors. The restructured hardware architecture is optimized for efficient audio processing. The audio processing algorithms support a seamless combination of stream processing (sample-by-sample), multirate processing, and block processing paradigms. The SigmaStudio? graphical programming tool enables the creation of signal processing flows that are interactive, intuitive, and powerful. The enhanced digital signal processor (DSP) core architecture enables some types of audio processing algorithms to be executed using significantly fewer instructions than were required on previous SigmaDSP generations, leading to vastly improved code efficiency.The 1.2 V, 32-bit DSP core can run at frequencies of up to 294.912 MHz and execute up to 6144 single instruction, multiple data (SIMD) instructions per sample at the standard sample rate of 48 kHz. Powerful clock generator hardware, including a flexible phase-locked loop (PLL) with multiple fractional integer outputs, supports all industry standard audio sample rates. Nonstandard rates over a wide range can generate up to 15 sample rates simultaneously. These clock generators, along with the on-board asynchronous sample rate converters (ASRCs) and a flexible hardware audio routing matrix, make the ADAU1463/ADAU1467 ideal audio hubs that greatly simplify the design of complex multirate audio systems.The ADAU1463/ADAU1467 have four input serial ports and four output serial ports. Each device has an asynchronous clock domain capable of operating as either a bit clock and frame sync master or slave. Each of the serial ports supports multiple data lines. The eight SDATAIOx pins each can be associated with any of the four input or four output serial ports. The use of assignable data pins allows a serial port to transmit or receive additional channels of audio data using a single bit clock and frame clock. Each of the supplemental data pins can carry from two to eight channels of serial audio. This flexible configuration provides more channels of audio input/output (I/O) without the need to run serial ports at high speed, and enables systems with additional serial audio peripherals. These expanded serial audio ports, along with the clock generators, the on-board asynchronous sample rate converters (ASRCs), and a flexible hardware audio routing matrix make the ADAU1463/ ADAU1467 ideal audio hubs that greatly simplify the design of complex, multirate audio systems.The ADAU1463/ADAU1467 interface with a wide range of analog-to-digital converters (ADCs), digital-to-analog converters (DACs), digital audio devices, amplifiers, and control circuitry with highly configurable serial ports, I2C, serial peripheral interface (SPI), Sony/Philips Digital Interconnect Format (S/PDIF) interfaces, and multipurpose I/O pins. Dedicated decimation filters can decode the pulse density modulation (PDM) output of up to four MEMS microphones.Independent slave and master I2C/SPI control ports allow the ADAU1463/ADAU1467 to be programmed and controlled by an external master device such as a microcontroller, and to program and control slave peripherals directly. Self boot functionality and the master control port enable complex standalone systems.Note that throughout this data sheet, multifunction pins, such as SDATAIO4/MP20, are referred to either by the entire pin name or by a single function of the pin, for example, MP20, when only that function is relevant.Applications Automotive audio processing Head units Distributed amplifiers Rear seat entertainment systems Trunk amplifiers Commercial and professional audio processing

The ADAU1966A is a high performance, single-chip digital-to-analog converter (DAC) that provides 16 DACs with differential or single-ended outputs using the Analog Devices, Inc., patented multibit sigma-delta (?-?) architecture. A serial peripheral interface (SPI)/I2C port is included, allowing a microcontroller to adjust volume and many other parameters. The ADAU1966A operates from 2.5 V digital and 3.3 V analog supplies. A linear regulator is included to generate the digital supply voltage from the analog supply voltage. The ADAU1966A is available in an 80-lead LQFP.The ADAU1966A is designed for low EMI. This consideration is apparent in both the system and circuit design architectures. By using the on-board PLL to derive the internal master clock from an external left-right frame clock (LRCLK), the ADAU1966A can eliminate the need for a separate high frequency master clock and can be used with or without a bit clock. The DACs are designed using the latest Analog Devices continuous time architectures to further minimize EMI. By using 2.5 V digital supplies, power consumption is minimized, and the digital waveforms are a smaller amplitude, further reducing emissions.Note that throughout this data sheet, multifunction pins, such as SCLK/SCL, are referred to by the entire pin name or by a single function of the pin, for example, SCLK, when only that function is relevant.APPLICATIONS Automotive audio systems Home theater systems Digital audio effects processors

The ADCMP396 is a quad, rail-to-rail input, low power comparator ideal for use in general-purpose applications. The device operates from a supply voltage of 2.3 V to 5.5 V and draws a minimal amount of current. The quad ADCMP396 consumes only 41.6 ?A of supply current. The low voltage and low current operation of the ADCMP396 makes it ideal for battery-powered systems.The ADCMP396 features a common-mode input voltage range of 200 mV beyond rails, an offset voltage of 1 mV typical across the full common-mode range, and a UVLO monitor. In addition, the design of the comparator allows a defined output state upon power-up. The comparator generates a logic low output while the supply voltage is less than the UVLO threshold.The ADCMP396 incorporates a 1 V ? 0.9% buffered reference voltage. The reference voltage output can directly connect to the comparator input to serve as the trip value for precise monitoring and detection of positive voltage. It can also act as an offset when monitoring the negative voltage.The ADCMP396 is available in a 16-lead narrow-body SOIC package, and it is specified to operate over the ?40?C to +125?C extended temperature range.APPLICATIONS Battery management/monitoring Power supply detection Window comparator Threshold detectors/discriminators Microprocessor systems

The ADF4151 allows implementation of fractional-N or integer-N phase-locked loop (PLL) frequency synthesizers if used with an external voltage controlled oscillator (VCO), loop filter, and external reference frequency.The ADF4151 is used with external VCO parts and is footprint and software compatible with the ADF4350. The part consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a ?-? based fractional interpolator to allow programmable fractional-N division. The INT, FRAC, and MOD registers define an overall N divider [N = (INT + (FRAC/MOD))]. The RF output phase is programmable for applications that require a particular phase relationship between the output and the reference. The ADF4151 also features cycle slip reduction circuitry, leading to faster lock times without the need for modifications to the loop filter.Control of all the on-chip registers is through a simple 3-wire interface. The device operates with a power supply ranging from 3.0 V to 3.6 V that can be powered down when not in use.The ADF4151 is available in a 5 mm ? 5 mm package.Applications Wireless infrastructure (W-CDMA, TD-SCDMA, WiMax, GSM, PCS, DCS, DECT) Test equipment Wireless LANs, CATV equipment Clock generation

The ADG5421F is a dual SPST, low on resistance switch that features overvoltage protection, power-off protection, and overvoltage detection on the source pins. When no power supplies are present, the switch remains in the off condition, and the switch inputs are high impedance. When powered, if the analog input signal levels on either of the Sx pins exceed VDD or VSS by the threshold voltage, VT, both switches turn off together, and the open-drain fault flag (FF) pin pulls to a logic low. Input signal levels up to +60 V or ?60 V relative to ground are blocked in both the powered and unpowered condition. The switches turn on with a Logic 1 input and conduct equally well in both directions. The digital input is compatible with 1.8 V logic inputs over the full operating supply range. APPLICATIONS Analog input and output modulesProcess control and distributed control systemsData acquisitionInstrumentationAvionicsAutomatic test equipmentCommunication systemsRelay replacement