The ADF7020-1 is a low power, highly integrated FSK/ GFSK/ ASK/ OOK/ GOOK transceiver designed for operation in thelow UHF and VHF bands. The ADF7020-1 uses an externalVCO inductor that allows users to set the operating frequencyanywhere between 135 MHz and 650 MHz. Using the divide-by-2circuit allows users to operate the device as low as 80 MHz.The typical range of the VCO is about 10% of the operatingfrequency. A complete transceiver can be built using a smallnumber of external discrete components, making the ADF7020-1 very suitable for price-sensitive and area-sensitiveapplications.The transmit section contains a VCO and low noisefractional-N PLL with output resolution of <1 ppm. Thisfrequency agile PLL allows the ADF7020-1 to be used infrequency-hopping spread spectrum (FHSS) systems. The VCOoperates at twice the fundamental frequency to reduce spuriousemissions and frequency pulling problems.The transmitter output power is programmable in 63 steps from?20 dBm to +13 dBm. The transceiver RF frequency, channelspacing, and modulation are programmable using a simple 3-wire interface. The device operates with a power supply range of2.3 V to 3.6 V and can be powered down when not in useA low IF architecture is used in the receiver (200 kHz),minimizing power consumption and the external componentcount and avoiding interference problems at low frequencies.The ADF7020-1 supports a wide variety of programmablefeatures, including Rx linearity, sensitivity, and IF bandwidth,allowing the user to trade off receiver sensitivity and selectivityfor current consumption, depending on the application. Thereceiver also features a patent-pending automatic frequencycontrol (AFC) loop, allowing the PLL to compensate forfrequency error in the incoming signal.An on-chip ADC provides readback of an integrated temperaturesensor, an external analog input, the battery voltage, or theRSSI signal, which provides savings on an ADC in someapplications. The temperature sensor is accurate to ?10?C overthe full operating temperature range of ?40?C to +85?C. Thisaccuracy can be improved by doing a 1-point calibration atroom temperature and storing the result in memory.Applications Low cost wireless data transfer Wireless medical applications Remote control/security systems Wireless metering Keyless entry Home automation Process and building control

The ADF7020-1 is a low power, highly integrated FSK/ GFSK/ ASK/ OOK/ GOOK transceiver designed for operation in thelow UHF and VHF bands. The ADF7020-1 uses an externalVCO inductor that allows users to set the operating frequencyanywhere between 135 MHz and 650 MHz. Using the divide-by-2circuit allows users to operate the device as low as 80 MHz.The typical range of the VCO is about 10% of the operatingfrequency. A complete transceiver can be built using a smallnumber of external discrete components, making the ADF7020-1 very suitable for price-sensitive and area-sensitiveapplications.The transmit section contains a VCO and low noisefractional-N PLL with output resolution of <1 ppm. Thisfrequency agile PLL allows the ADF7020-1 to be used infrequency-hopping spread spectrum (FHSS) systems. The VCOoperates at twice the fundamental frequency to reduce spuriousemissions and frequency pulling problems.The transmitter output power is programmable in 63 steps from?20 dBm to +13 dBm. The transceiver RF frequency, channelspacing, and modulation are programmable using a simple 3-wire interface. The device operates with a power supply range of2.3 V to 3.6 V and can be powered down when not in useA low IF architecture is used in the receiver (200 kHz),minimizing power consumption and the external componentcount and avoiding interference problems at low frequencies.The ADF7020-1 supports a wide variety of programmablefeatures, including Rx linearity, sensitivity, and IF bandwidth,allowing the user to trade off receiver sensitivity and selectivityfor current consumption, depending on the application. Thereceiver also features a patent-pending automatic frequencycontrol (AFC) loop, allowing the PLL to compensate forfrequency error in the incoming signal.An on-chip ADC provides readback of an integrated temperaturesensor, an external analog input, the battery voltage, or theRSSI signal, which provides savings on an ADC in someapplications. The temperature sensor is accurate to ?10?C overthe full operating temperature range of ?40?C to +85?C. Thisaccuracy can be improved by doing a 1-point calibration atroom temperature and storing the result in memory.Applications Low cost wireless data transfer Wireless medical applications Remote control/security systems Wireless metering Keyless entry Home automation Process and building control

The ADF7020-1 is a low power, highly integrated FSK/ GFSK/ ASK/ OOK/ GOOK transceiver designed for operation in thelow UHF and VHF bands. The ADF7020-1 uses an externalVCO inductor that allows users to set the operating frequencyanywhere between 135 MHz and 650 MHz. Using the divide-by-2circuit allows users to operate the device as low as 80 MHz.The typical range of the VCO is about 10% of the operatingfrequency. A complete transceiver can be built using a smallnumber of external discrete components, making the ADF7020-1 very suitable for price-sensitive and area-sensitiveapplications.The transmit section contains a VCO and low noisefractional-N PLL with output resolution of <1 ppm. Thisfrequency agile PLL allows the ADF7020-1 to be used infrequency-hopping spread spectrum (FHSS) systems. The VCOoperates at twice the fundamental frequency to reduce spuriousemissions and frequency pulling problems.The transmitter output power is programmable in 63 steps from?20 dBm to +13 dBm. The transceiver RF frequency, channelspacing, and modulation are programmable using a simple 3-wire interface. The device operates with a power supply range of2.3 V to 3.6 V and can be powered down when not in useA low IF architecture is used in the receiver (200 kHz),minimizing power consumption and the external componentcount and avoiding interference problems at low frequencies.The ADF7020-1 supports a wide variety of programmablefeatures, including Rx linearity, sensitivity, and IF bandwidth,allowing the user to trade off receiver sensitivity and selectivityfor current consumption, depending on the application. Thereceiver also features a patent-pending automatic frequencycontrol (AFC) loop, allowing the PLL to compensate forfrequency error in the incoming signal.An on-chip ADC provides readback of an integrated temperaturesensor, an external analog input, the battery voltage, or theRSSI signal, which provides savings on an ADC in someapplications. The temperature sensor is accurate to ?10?C overthe full operating temperature range of ?40?C to +85?C. Thisaccuracy can be improved by doing a 1-point calibration atroom temperature and storing the result in memory.Applications Low cost wireless data transfer Wireless medical applications Remote control/security systems Wireless metering Keyless entry Home automation Process and building control

The ADF7020-1 is a low power, highly integrated FSK/ GFSK/ ASK/ OOK/ GOOK transceiver designed for operation in thelow UHF and VHF bands. The ADF7020-1 uses an externalVCO inductor that allows users to set the operating frequencyanywhere between 135 MHz and 650 MHz. Using the divide-by-2circuit allows users to operate the device as low as 80 MHz.The typical range of the VCO is about 10% of the operatingfrequency. A complete transceiver can be built using a smallnumber of external discrete components, making the ADF7020-1 very suitable for price-sensitive and area-sensitiveapplications.The transmit section contains a VCO and low noisefractional-N PLL with output resolution of <1 ppm. Thisfrequency agile PLL allows the ADF7020-1 to be used infrequency-hopping spread spectrum (FHSS) systems. The VCOoperates at twice the fundamental frequency to reduce spuriousemissions and frequency pulling problems.The transmitter output power is programmable in 63 steps from?20 dBm to +13 dBm. The transceiver RF frequency, channelspacing, and modulation are programmable using a simple 3-wire interface. The device operates with a power supply range of2.3 V to 3.6 V and can be powered down when not in useA low IF architecture is used in the receiver (200 kHz),minimizing power consumption and the external componentcount and avoiding interference problems at low frequencies.The ADF7020-1 supports a wide variety of programmablefeatures, including Rx linearity, sensitivity, and IF bandwidth,allowing the user to trade off receiver sensitivity and selectivityfor current consumption, depending on the application. Thereceiver also features a patent-pending automatic frequencycontrol (AFC) loop, allowing the PLL to compensate forfrequency error in the incoming signal.An on-chip ADC provides readback of an integrated temperaturesensor, an external analog input, the battery voltage, or theRSSI signal, which provides savings on an ADC in someapplications. The temperature sensor is accurate to ?10?C overthe full operating temperature range of ?40?C to +85?C. Thisaccuracy can be improved by doing a 1-point calibration atroom temperature and storing the result in memory.Applications Low cost wireless data transfer Wireless medical applications Remote control/security systems Wireless metering Keyless entry Home automation Process and building control

The ADM1063 is a configurable supervisory/sequencing device that offers a single-chip solution for supply monitoring and sequencing in multiple supply systems. In addition to these functions, the ADM1063 integrates a 12-bit ADC that can be used to accurately read back up to 12 separate voltages.The device also provides up to 10 programmable inputs for monitoring under, over, or out-of-window faults on up to 10 supplies. In addition, 10 programmable outputs can be used as logic enables. Six of these programmable outputs can provide up to a 12 V output for driving the gate of an n-FET that can be placed in the path of a supply.ApplicationsCentral office systems Servers/routers Multivoltage system line cards DSP/FPGA supply sequencing In-circuit testing of margined supplies

The ADM1170 is a Hot Swap controller that allows a board to be safely inserted and removed from a live backplane. This is achieved using a pass FET with a current control loop that monitors the input current using a sense resistor. An internal charge pump is used to enhance the gate of theexternal high side N-channel FET. When an over current condition is detected the gate voltage of the FET is reduced to limit the current flowing through the sense resistor. The ADM1170 operates with a supply voltage ranging from 2.7V to 16.5V. Using separate SENSE pins from VCC the ADM1170 allows for the hot swap of supplies ranging down to 1.6V. During an overcurrent condition the timer cap determines the amount of time the FET will remain in this condition. The ON (ON-CLR) pin is the enable input for the device and also acts as a latched fault reset for the ADM1170-2 model. The SS pin is used to control the inrush current profile by ramping up the current sense limit at a rate set by the SS capacitor. This device is available in two options: the ADM1170-1 will automatic retry for over-current fault and the ADM1170-2 will latch-off for an over-current fault. The ADM1170 is packaged in an 8-lead TSOT packageAPPLICATIONS Hot Swap Board Insertion ? Line Cards, Raid Systems Electronic Circuit Breaker Industrial High Side Switch/Circuit Breaker

The ADM1178 is an integrated hot swap controller and current sense amplifier that offers digital current and voltage monitoring via an on-chip 12-bit analog-to-digital converter (ADC), communicated through an I2C? interface.An internal current sense amplifier measures voltage across the sense resistor in the power path via the VCC pin and the SENSE pin.The ADM1178 limits the current through this resistor by control-ling the gate voltage (via the GATE pin) of an external N-channel FET in the power path. The voltage across the sense resistor (and therefore the inrush current) is kept below a preset maximum.The ADM1178 protects the external FET by limiting the time that the maximum current runs through it. This current limit period is set by the value of the capacitor attached to the TIMER pin. Additionally, the device provides protection from overcurrent events that may occur after the hot swap event is complete. In case of a short-circuit event, the current in the sense resistor exceeds an overcurrent trip threshold, and the FET is switched off immediately by pulling down the GATE pin.A 12-bit ADC can measure the current seen in the sense resistor, as well as the supply voltage on the VCC pin. An alert output can be set to trigger when the ADC current reading exceeds a programmed overcurrent limit threshold.An industry-standard I2C interface allows a controller to read current and voltage data from the ADC. Measurements can be initiated by an I2C command. Alternatively, the ADC can run continuously, and the user can read the latest conversion data whenever it is required. Up to four unique I2C addresses can be created, depending on how the ADR pin is connected.The ADM1178 is packaged in a 10-lead MSOP.ApplicationsPower monitoring/power budgeting Central office equipment Telecommunication and data communication equipment PCs/servers

The ADM1186-1 and ADM1186-2 are integrated, four-channel, voltage monitoring and sequencing devices. A 2.7 V to 5.5 V power supply is required on the VCC pin for power.Four precision comparators monitor four voltage rails, with all comparators sharing a 0.6 V reference and a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the Under Voltage (UV) trip points for the monitored supply rails.The ADM1186-1 and ADM1186-2 have four open drain enable outputs, OUTx, that are used to enable power supplies. An open drain power good output, PWRGD, is provided that indicatesthe four VINx inputs are above their UV thresholds.A state machine monitors the state of the UP and?DOWN pins on the ADM1186-1 or the UP/overbar: DOWN pin on the ADM1186-2 to control the supply sequencing direction. In the ?Wait Start?state, a rising edge transition on the UP or UP/DOWN pin triggers a power-up sequence. A falling edge transition on the DOWN or UP/DOWN pin in the ?Power Up Done? statetriggers a power down sequence.During a power up sequence, the state machine enables each power supply in turn. The supply output voltage is monitored to determine if it rises above the UV threshold level within a userdefined duration called the blanking time. If a supply rises above the UV threshold then the next enable output in the sequence is turned on. In addition to the blanking time a user may also define sequencing time delays between each enable output turning on. When all four enable outputs are on, and the four VINx pins are above their UV trip points the power up sequence is complete. The ADM1186-1 provides an open drain pin, SEQ_DONE, that is asserted high to provide an indication that an up sequence is complete. The SEQ_DONE pins is allows multiple cascadedADM1186-1 devices to be perform controlled power up and down sequences. During a power down sequence the enable outputs turn off inreverse order. The sequence time delays between successive supplies the same as during the power up sequence, and no blanking time is used during a power down sequence. At the end of a down sequence the SEQ_DONE pin is brought low. During sequencing and when powered up, the state machine continuously monitors for any fault conditions. Faults include a UV condition on any of the inputs, or an unexpected controlinput. Any fault that occurs causes the state machine to enter a fault handler. This immediately turns off all enable outputs, and ensures that the device is ready to start a new up sequence. The ADM1186-1 has a bi-directional open drain pin, FAULT, that facilitates fault handling when using multiple devices. An ADM1186-1 experiencing a fault condition drives the FAULT pin low, causing other connected ADM1186-1devices to enter their own fault handling state.The ADM1186-1 is available in a 20-lead QSOP package andthe ADM1186-2 is available in a 16-lead QSOP package.

The ADM1186-1 and ADM1186-2 are integrated, four-channel, voltage monitoring and sequencing devices. A 2.7 V to 5.5 V power supply is required on the VCC pin for power.Four precision comparators monitor four voltage rails, with all comparators sharing a 0.6 V reference and a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the Under Voltage (UV) trip points for the monitored supply rails.The ADM1186-1 and ADM1186-2 have four open drain enable outputs, OUTx, that are used to enable power supplies. An open drain power good output, PWRGD, is provided that indicatesthe four VINx inputs are above their UV thresholds.A state machine monitors the state of the UP and?DOWN pins on the ADM1186-1 or the UP/overbar: DOWN pin on the ADM1186-2 to control the supply sequencing direction. In the ?Wait Start?state, a rising edge transition on the UP or UP/DOWN pin triggers a power-up sequence. A falling edge transition on the DOWN or UP/DOWN pin in the ?Power Up Done? statetriggers a power down sequence.During a power up sequence, the state machine enables each power supply in turn. The supply output voltage is monitored to determine if it rises above the UV threshold level within a userdefined duration called the blanking time. If a supply rises above the UV threshold then the next enable output in the sequence is turned on. In addition to the blanking time a user may also define sequencing time delays between each enable output turning on. When all four enable outputs are on, and the four VINx pins are above their UV trip points the power up sequence is complete. The ADM1186-1 provides an open drain pin, SEQ_DONE, that is asserted high to provide an indication that an up sequence is complete. The SEQ_DONE pins is allows multiple cascadedADM1186-1 devices to be perform controlled power up and down sequences. During a power down sequence the enable outputs turn off inreverse order. The sequence time delays between successive supplies the same as during the power up sequence, and no blanking time is used during a power down sequence. At the end of a down sequence the SEQ_DONE pin is brought low. During sequencing and when powered up, the state machine continuously monitors for any fault conditions. Faults include a UV condition on any of the inputs, or an unexpected controlinput. Any fault that occurs causes the state machine to enter a fault handler. This immediately turns off all enable outputs, and ensures that the device is ready to start a new up sequence. The ADM1186-1 has a bi-directional open drain pin, FAULT, that facilitates fault handling when using multiple devices. An ADM1186-1 experiencing a fault condition drives the FAULT pin low, causing other connected ADM1186-1devices to enter their own fault handling state.The ADM1186-1 is available in a 20-lead QSOP package andthe ADM1186-2 is available in a 16-lead QSOP package.

The ADM1192 is an integrated current sense amplifier that offers digital current and voltage monitoring via an on-chip, 12-bit analog-to-digital converter (ADC), communicated through an I2C interface.An internal current sense amplifier senses voltage across the sense resistor in the power path via the VCC pin and the SENSE pin.A 12-bit ADC can measure the current seen in the sense resistor and in the supply voltage on the VCC pin. An industry-standard I2C interface allows a controller to read current and voltage data from the ADC. Measurements can be initiated by an I2C command. Alternatively, the ADC can run continuously, and the user can read the latest conversion data whenever it is required. Up to four unique I2C addresses can be created, depending on the way the ADR pin is connected.A SETV pin is also included. A voltage applied to this pin is internally compared to the output voltage on the current sense amplifier. The output of the SETV comparator asserts when the current sense amplifier output exceeds the SETV voltage. This event is detected at the ALERT block. The ALERT block then charges up the external TIMER capacitor with a fixed current. When this timing cycle is complete, the ALERT output asserts.The ALERT output can be used as a flag to warn a micro-controller or field programmable gate array (FPGA) of an overcurrent condition. ALERT outputs of multiple ADM1192 devices can be tied together and used as a combined alert.A basic P-channel FET hot swap circuit can be implemented with the ALERT output. The value of the TIMER capacitor should be set so that the charging time of this capacitor is much longer than the period where a higher than nominal inrush current may be flowing.The ADM1192 is packaged in a 10-lead MSOP.APPLICATIONS Power monitoring/power budgeting Central office equipment Telecommunication and data communication equipment PCs/servers