The ADV7282A has the same pinout as and is software compatible with the ADV7282. The mobile industry processor interface (MIPI?) model of the ADV7282A (ADV7282A-M) has the same pinout as and is software compatible with the ADV7282-M.All features, functionality, and specifications are shared by the ADV7282A and the ADV7282A-M, unless otherwise noted.The ADV7282A is a versatile one-chip, multiformat video decoder that automatically detects standard analog baseband video signals and converts them into YCrCb 4:2:2 component video data streams.The analog input of the ADV7282A features an input mux (4-channel on ADV7282A, 6-channel on ADV7282A-M), a single 10-bit analog-to-digital converter (ADC) and an on-chip differential to single-ended converter to accommodate the direct connection of differential, pseudo differential, or single-ended CVBS without the need for external amplifier circuitry.The standard definition processor (SDP) in the ADV7282A automatically detects PAL, NTSC and SECAM standards in the form of composite, S-Video (Y/C) and component. The analog video is converted into a 4:2:2 component video data stream that is output either via an 8-bit ITU-R BT.656 standard-compatible interface (ADV7282A) or via a MIPI CSI-2 Tx (hereafter referred to as MIPI Tx) interface (ADV7282A-M). The ADV7282A also feature a deinterlacer for interlaced to progressive (I2P) conversion.The ADV7282A offers short to battery (STB) diagnostic sense inputs and general-purpose outputs.The ADV7282A is provided in a space-saving LFCSP surface-mount, RoHS compliant package. The ADV7282A is rated over the ?40?C to +105?C temperature range, making it ideal for automotive applications.The ADV7282A must be configured in accordance with the I2C writes provided in the evaluation board script files.Applications Advanced driver assistance Automotive infotainment DVRs for video security Media players

The ADV7390?/?ADV7391?/?ADV7392?/ ADV7393?are a family of high speed, digital-to-analog video encoders on single monolithic chips. Three 2.7 V/3.3 V, 10-bit video DACs (a single DAC for the WLCSP package) provide support for composite (CVBS), S-Video (Y-C), or component (YPrPb/RGB) analog outputs in either standard definition (SD) or high definition (HD) video formats. The single DAC WLCSP package supports CVBS (NTSC and PAL) output only in SD resolution (see Table 2).Optimized for low power operation, occupying a minimal footprint, and requiring few external components, these encoders are ideally suited to portable and power-sensitive applications requiring TV-out functionality. Cable detection and DAC auto power-down features ensure that power consumption is kept to a minimum.The ADV7390 / ADV7391 have an 8-bit video input port that supports SD video formats over an SDR interface and HD video formats over a DDR interface. The ADV7392 / ADV7393 have a 16-bit video input port that can be configured in a variety of ways. SD RGB input is supported.All members of the family support embedded EAV/SAV timing codes, external video synchronization signals, and the I2C? and communication protocol. Table 1 and Table 2 list the video standards directly supported by the ADV7390/ADV7391/ ADV7392/ADV7393 family.APPLICATIONS Mobile handsets Digital still cameras Portable media and DVD players Portable game consoles Digital camcorders Set-top box (STB) Automotive infotainment (ADV7392 and ADV7393 only)

The ADV8003 is a multiple input video signal processor that can de-interlace and scale SD, ED, or HD video data to HD formats, generate a bitmap on-screen display (OSD) and output the video with OSD overlaid on two High Definition Multimedia Interface (HDMI) transmitters and a video encoder.Video can be input into the ADV8003 in a number of ways: using the 48-bit TTL pixel port, using the 24-bit external OSD TTL pixel port, or from a device with a HDMI transmitter such as the ADV7850. The ADV8003 supports many of the formats outlined in the CEA-861 and VESA specifications, as well as several other widely used timing formats.Using two external DDR2 memories, the ADV8003 can perform high performance, motion adaptive interlaced to progressive conversion on SD and HD content. Using a single DDR2 memory, the HD de-interlacing is limited to intrafield.The ADV8003 features primary and secondary video scalers that enable simultaneous output of multiple different resolutions. Detail enhancement and image enhancing techniques such as random, mosquito, and block noise reduction allow for improved final image quality. The frame rate converter of the ADV8003 allows the conversion between common frame rates with support to output two different frame rates simultaneously under certain conditions.The ADV8003 has a flexible digital core that allows the user to configure the part in several different modes: using a single video processing channel, using dual video processing channels, or displaying OSD on multiple outputs of different resolutions. The ADV8003 can accept OSD information from either an external OSD source on the 24-bit external OSD TTL pixel data input or internally generate a high quality, bitmap-based OSD. The internal OSD is highly flexible and allows the system designer to easily incorporate features like scrolling text and animation in various color depths up to 24-bit true color.Analog Devices, Inc., provides an OSD development tool (Blimp) to assist in the design, debug, and emulation of the OSD prior to integration with the system application. When the design is complete, the OSD development tool automatically generates code to which system APIs can be added before integration with the system application and an OSD design resource, which must be downloaded to an external SPI flash memory.Video can be output from the ADV8003 using one or both of the HDMI transmitters and/or the 6-DAC SD/HD video encoder. The flexible multiplexing in the part allows simultaneous output of HD formats on the HDMI transmitters and on the HD DACs (for example, 1080p) with SD formats on the SD DACs (for example, 480i).Both of the HDMI transmitters on the ADV8003 support all mandatory and many optional 3D video resolutions and audio return channels (ARC). Each transmitter also features a full CEC master. The ADV8003 can receive up to six channels of I2S, S/PDIF, direct stream digital (DSD), and high bit rate (HBR). The six 12-bit NSV? video DACs allow for composite (CVBS), S-Video (Y/C), and component (YPrPb) analog outputs in standard, enhanced, and high definition video formats. Oversampling of 216 MHz (SD and ED) and 297 MHz (HD) removes the requirement for external output filtering.The ADV8003 can also support 30-bit TTL in and 30-bit TTL out mode for professional applications.The ADV8003 supports the I2C? protocol for communication with the system microcontroller.APPLICATIONS High end A/V receivers Upconverting DVD players/recorders Blu-ray players/recorders Set-top boxes Video conferencing Standalone video processors HDMI splitters

The ADXL1001/ADXL1002 deliver ultralow noise density over an extended frequency range with two full-scale range options, and are optimized for industrial condition monitoring. The ADXL1001 (?100 g) and the ADXL1002 (?50 g) have typical noise densities of 30 ?g/?Hz and 25 ?g/?Hz, respectively. Both accelerometer devices have stable and repeatable sensitivity, which is immune to external shocks up to 10,000 g.The ADXL1001/ADXL1002 have an integrated full electrostatic self test (ST) function and an overrange (OR) indicator that allow advanced system level features and are useful for embedded applications. With low power and single-supply operation of 3.3 V to 5.25 V, the ADXL1001/ADXL1002 also enable wireless sensing product design. The ADXL1001/ ADXL1002 are available in a 5 mm ? 5 mm ? 1.80 mm LFCSP package, and are rated for operation over a ?40?C to +125?C temperature range.Applications Condition monitoring Predictive maintenance Asset health Test and measurement Health usage monitoring system (HUMS)

The ADXL1004 delivers ultralow noise density over an extended frequency range and is optimized for bearing fault detection and diagnostics. The ADXL1004 has typical noise density of 125 ?g/?Hz across the linear frequency range. Microelectronicmechanical systems (MEMS) accelerometers have stable and repeatable sensitivity, and are immune to external shocks up to 10,000 g.The integrated signal conditioning electronics enable such features as full electrostatic self test (ST) and an overrange (OR) indicator, useful for embedded applications. With low power and single-supply operation of 3.3 V to 5.25 V, the ADXL1004 also enables wireless sensing product design. The ADXL1004 is available in a 5 mm ? 5 mm ? 1.80 mm LFCSP package, and operates over the ?40?C to +125?C temperature range.Applications Condition monitoring Predictive maintenance Asset health Test and measurement Health usage monitoring system (HUMSs) Acoustic emissions

The ADXL312 is a small, thin, low power, 3-axis accelerometer with high resolution (13-bit) measurement up to ?12 g. Digital output data is formatted as 16-bit twos complement and is accessible through either a serial port interface (SPI) (3- or 4-wire) or I2C digital interface.The ADXL312 is well suited for car alarm or black box applications. It measures the static acceleration of gravity in tilt-sensing applications, as well as dynamic acceleration resulting from motion or shock. Its high resolution (2.9 mg/LSB) enables resolution of inclination changes of as little as 0.25?. A built-in FIFO facilitates using oversampling techniques to improve resolution to as little as 0.05? of inclination.Several special sensing functions are provided. Activity and inactivity sensing detects the presence or absence of motion and whether the acceleration on any axis exceeds a user-set level. These functions can be mapped to interrupt output pins. An integrated 32 level FIFO can be used to store data to minimize host processor intervention.Low power modes enable intelligent motion-based power management with threshold sensing and active acceleration measurement at extremely low power dissipation.The ADXL312 is supplied in a small, thin 5 mm ? 5 mm ? 1.45 mm, 32-lead, LFCSP package.Applications Car alarm Hill start aid (HSA) Electronic parking brake Data recorder (black box)

The ADXL335 is a small, thin, low power, complete 3-axisaccelerometer with signal conditioned voltage outputs. Theproduct measures acceleration with a minimum full-scale rangeof ?3 g. It can measure the static acceleration of gravity in tiltsensingapplications, as well as dynamic acceleration resultingfrom motion, shock, or vibration.The user selects the bandwidth of the accelerometer using theCX, CY, and CZ capacitors at the XOUT, YOUT, and ZOUT pins.Bandwidths can be selected to suit the application, with arange of 0.5 Hz to 1600 Hz for X and Y axes, and a range of0.5 Hz to 550 Hz for the Z axis.The ADXL335 is available in a small, low profile, 4 mm ? 4 mm? 1.45 mm, 16-lead, plastic lead frame chip scale package(LFCSP_LQ).APPLICATIONS Cost sensitive, low power, motion- and tilt-sensing applications Mobile devices Gaming systems Disk drive protection Image stabilization Sports and health devices

The ADM1184 is an integrated, 4-channel voltage-monitoring device. A 2.7 V to 5.5 V power supply is required on the VCC pin to power the device.Four precision comparators monitor four voltage rails. Each comparator has a 0.6 V reference with a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the trip points for the monitored supply rails.The ADM1184 has four open-drain outputs. Of these outputs, OUT1 to OUT3 can be used to enable power supplies, and PWRGD is a common power-good output indicating that all monitored supplies are above their respective thresholds.OUT1 to OUT3 are dependent on their associated VINx input (that is, VIN1, VIN2, or VIN3). If a supply monitored by VINx drops below its programmed threshold, the associated OUTx pin and PWRGD are disabled.PWRGD is a common power-good output indicating the status of all monitored supplies. There is an internal 190 ms (typical) delay associated with the assertion of the PWRGD output. If VIN1, VIN2, VIN3, or VIN4 drops below its programmed threshold, PWRGD is deasserted immediately.The ADM1184 is available in a 10-lead mini small outline package (MSOP).APPLICATIONS Monitor and alarm functions Telecommunications Microprocessor systems PC/servers

The ADM1186-1 and ADM1186-2 are integrated, four-channel, voltage monitoring and sequencing devices. A 2.7 V to 5.5 V power supply is required on the VCC pin for power.Four precision comparators monitor four voltage rails, with all comparators sharing a 0.6 V reference and a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the Under Voltage (UV) trip points for the monitored supply rails.The ADM1186-1 and ADM1186-2 have four open drain enable outputs, OUTx, that are used to enable power supplies. An open drain power good output, PWRGD, is provided that indicatesthe four VINx inputs are above their UV thresholds.A state machine monitors the state of the UP and?DOWN pins on the ADM1186-1 or the UP/overbar: DOWN pin on the ADM1186-2 to control the supply sequencing direction. In the ?Wait Start?state, a rising edge transition on the UP or UP/DOWN pin triggers a power-up sequence. A falling edge transition on the DOWN or UP/DOWN pin in the ?Power Up Done? statetriggers a power down sequence.During a power up sequence, the state machine enables each power supply in turn. The supply output voltage is monitored to determine if it rises above the UV threshold level within a userdefined duration called the blanking time. If a supply rises above the UV threshold then the next enable output in the sequence is turned on. In addition to the blanking time a user may also define sequencing time delays between each enable output turning on. When all four enable outputs are on, and the four VINx pins are above their UV trip points the power up sequence is complete. The ADM1186-1 provides an open drain pin, SEQ_DONE, that is asserted high to provide an indication that an up sequence is complete. The SEQ_DONE pins is allows multiple cascadedADM1186-1 devices to be perform controlled power up and down sequences. During a power down sequence the enable outputs turn off inreverse order. The sequence time delays between successive supplies the same as during the power up sequence, and no blanking time is used during a power down sequence. At the end of a down sequence the SEQ_DONE pin is brought low. During sequencing and when powered up, the state machine continuously monitors for any fault conditions. Faults include a UV condition on any of the inputs, or an unexpected controlinput. Any fault that occurs causes the state machine to enter a fault handler. This immediately turns off all enable outputs, and ensures that the device is ready to start a new up sequence. The ADM1186-1 has a bi-directional open drain pin, FAULT, that facilitates fault handling when using multiple devices. An ADM1186-1 experiencing a fault condition drives the FAULT pin low, causing other connected ADM1186-1devices to enter their own fault handling state.The ADM1186-1 is available in a 20-lead QSOP package andthe ADM1186-2 is available in a 16-lead QSOP package.

The ADM1186-1 and ADM1186-2 are integrated, four-channel, voltage monitoring and sequencing devices. A 2.7 V to 5.5 V power supply is required on the VCC pin for power.Four precision comparators monitor four voltage rails, with all comparators sharing a 0.6 V reference and a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the Under Voltage (UV) trip points for the monitored supply rails.The ADM1186-1 and ADM1186-2 have four open drain enable outputs, OUTx, that are used to enable power supplies. An open drain power good output, PWRGD, is provided that indicatesthe four VINx inputs are above their UV thresholds.A state machine monitors the state of the UP and?DOWN pins on the ADM1186-1 or the UP/overbar: DOWN pin on the ADM1186-2 to control the supply sequencing direction. In the ?Wait Start?state, a rising edge transition on the UP or UP/DOWN pin triggers a power-up sequence. A falling edge transition on the DOWN or UP/DOWN pin in the ?Power Up Done? statetriggers a power down sequence.During a power up sequence, the state machine enables each power supply in turn. The supply output voltage is monitored to determine if it rises above the UV threshold level within a userdefined duration called the blanking time. If a supply rises above the UV threshold then the next enable output in the sequence is turned on. In addition to the blanking time a user may also define sequencing time delays between each enable output turning on. When all four enable outputs are on, and the four VINx pins are above their UV trip points the power up sequence is complete. The ADM1186-1 provides an open drain pin, SEQ_DONE, that is asserted high to provide an indication that an up sequence is complete. The SEQ_DONE pins is allows multiple cascadedADM1186-1 devices to be perform controlled power up and down sequences. During a power down sequence the enable outputs turn off inreverse order. The sequence time delays between successive supplies the same as during the power up sequence, and no blanking time is used during a power down sequence. At the end of a down sequence the SEQ_DONE pin is brought low. During sequencing and when powered up, the state machine continuously monitors for any fault conditions. Faults include a UV condition on any of the inputs, or an unexpected controlinput. Any fault that occurs causes the state machine to enter a fault handler. This immediately turns off all enable outputs, and ensures that the device is ready to start a new up sequence. The ADM1186-1 has a bi-directional open drain pin, FAULT, that facilitates fault handling when using multiple devices. An ADM1186-1 experiencing a fault condition drives the FAULT pin low, causing other connected ADM1186-1devices to enter their own fault handling state.The ADM1186-1 is available in a 20-lead QSOP package andthe ADM1186-2 is available in a 16-lead QSOP package.