Digital to Analog Converters - DAC PARALLEL 12-B IOUT DAC IC

Digital to Analog Converters - DAC DUAL 12-BIT VOLTAGE OUT DAC I.C.

Quad 8-Bit Multiplying CMOS D/A Converter with Memory Features: Four DACs in a 28 Pin, 0.6 Inch Wide DIP or 28-Pin JEDEC Plastic Chip Carrier ±1/4 LSB Endpoint Linearity Guaranteed Monotonic DACs Matched to Within 1% Microprocessor Compatible Read/Write Capability (with Memory) TTL/CMOS Compatible Four-Quadrant Multiplication Single-Supply Operation (+5 V) Low Power Consumption Latch-Up Resistant Available in Die Form

12-Bit High Speed Multiplying D/A Converter Features: Differential Nonlinearity: ±1/2 LSB Nonlinearity: 0.05% Fast Settling Time: 250 ns High Compliance: -5 V to +10 V Differential Outputs: 0 to 4 mA Guaranteed Monotonicity: 12 bits Low Full-Scale Tempco: 10 ppm/°C Circuit Interface to TTL, CMOS, ECL, PMOS/NMOS Low Power Consumption: 225 mW Industry Standard AM6012 Pinout Available in Die Form

Robust, Triple Ch. Isolator W/ Output Enable & 0 Reverse Channels Features: High common-mode transient immunity: 100 kV/µs High robustness to radiated and conducted noise Low propagation delay 13 ns maximum for 5 V operation 15 ns maximum for 1.8 V operation 150 Mbps maximum guaranteed data rate Backward compatibility ADuM130E1/ADuM131E1 pin compatible with ADuM1300/ADUM1301 Low dynamic power consumption 1.8 V to 5 V level translation High temperature operation: 125°C Fail-safe high or low options 16-lead, RoHS compliant, SOIC package See data sheet for additional information

Touch Screen Controllers Touch Screen Digitizer with Dac I.C.

Data Conversion IC Development Tools LTC2157-14: 14-bit, 250Msps, 1.8V Dual A

The AD5317R, a member of the nanoDAC® family, is a low power, quad, 10-bit buffered voltage output DAC. The device includes a 2.5 V, 2 ppm/°C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design, and exhibits less than 0.1% FSR gain error and 1.5 mV offset error performance. The device is available in a 3 mm × 3 mm LFCSP and a TSSOP package.The AD5317R also incorporates a power-on reset circuit and a RSTSEL pin that ensures that the DAC outputs power up tozero scale or midscale and remain at that level until a valid writetakes place. Each part contains a per-channel power-downfeature that reduces the current consumption of the device to4 µA at 3 V while in power-down mode.The AD5317R employs a versatile SPI interface that operates atclock rates up to 50 MHz and contains a VLOGIC pin intended for1.8 V/3 V/5 V logic. Product Highlights Precision DC Performance. Total unadjusted error: ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum Low Drift 2.5 V On-Chip Reference. 2 ppm/°C typical temperature coefficient 5 ppm/°C maximum temperature coefficient Two Package Options. 3 mm × 3 mm, 16-lead LFCSP 16-lead TSSOPApplications Digital gain and offset adjustment Programmable attenuators Industrial automation Data acquisition systems

The AD5683R/AD5682R/AD5681R/AD5683, members of thenanoDAC+® family, are low power, single-channel, 16-/14-/12-bitbuffered voltage out digital-to-analog converters (DACs). Thedevices, except the AD5683, include an enabled by default internal2.5 V reference, offering 2 ppm/°C drift. The output span can beprogrammed to be 0 V to VREF or 0 V to 2 × VREF. All devicesoperate from a single 2.7 V to 5.5 V supply and are guaranteedmonotonic by design. The devices are available in a 2.00 mm ×2.00 mm, 8-lead LFCSP or a 10-lead MSOP.The internal power-on reset circuit ensures that the DAC registeris written to zero scale at power-up while the internal outputbuffer is configured in normal mode. TheAD5683R/AD5682R/AD5681R/AD5683 contain a power-downmode that reduces the current consumption of the device to 2 µA(maximum) at 5 V and provides software selectable output loadswhile in power-down mode.The AD5683R/AD5682R/AD5681R/AD5683 use a versatile3-wire serial interface that operates at clock rates of up to 50 MHz.Some devices also include asynchronous RESET pin and VLOGICpin options, allowing 1.8 V compatibilityProduct Highlights High Relative Accuracy (INL). AD5683R/AD5683 (16-bit): ±2 LSB maximum. Low Drift, 2.5 V On-Chip Reference. 2 ppm/°C typical temperature coefficient. 5 ppm/°C maximum temperature coefficient. Two Package Options. 2.00 mm × 2.00 mm, 8-lead LFCSP. 10-lead MSOP.Applications Process controls Data acquisition systems Digital gain and offset adjustment Programmable voltage sources

The AD5683R/AD5682R/AD5681R/AD5683, members of thenanoDAC+® family, are low power, single-channel, 16-/14-/12-bitbuffered voltage out digital-to-analog converters (DACs). Thedevices, except the AD5683, include an enabled by default internal2.5 V reference, offering 2 ppm/°C drift. The output span can beprogrammed to be 0 V to VREF or 0 V to 2 × VREF. All devicesoperate from a single 2.7 V to 5.5 V supply and are guaranteedmonotonic by design. The devices are available in a 2.00 mm ×2.00 mm, 8-lead LFCSP or a 10-lead MSOP.The internal power-on reset circuit ensures that the DAC registeris written to zero scale at power-up while the internal outputbuffer is configured in normal mode. TheAD5683R/AD5682R/AD5681R/AD5683 contain a power-downmode that reduces the current consumption of the device to 2 µA(maximum) at 5 V and provides software selectable output loadswhile in power-down mode.The AD5683R/AD5682R/AD5681R/AD5683 use a versatile3-wire serial interface that operates at clock rates of up to 50 MHz.Some devices also include asynchronous RESET pin and VLOGICpin options, allowing 1.8 V compatibilityProduct Highlights High Relative Accuracy (INL). AD5683R/AD5683 (16-bit): ±2 LSB maximum. Low Drift, 2.5 V On-Chip Reference. 2 ppm/°C typical temperature coefficient. 5 ppm/°C maximum temperature coefficient. Two Package Options. 2.00 mm × 2.00 mm, 8-lead LFCSP. 10-lead MSOP.Applications Process controls Data acquisition systems Digital gain and offset adjustment Programmable voltage sources