LC2MOS Complete, High Speed 12-Bit ADC Features:12-Bit Resolution and AccuracyFast Conversion Time- AD7572XX06: 5 µs- AD7572XX12: 12.5 µsComplete with On-Chip ReferenceFast Bus Access Time: 90 nsLow Power: 135 mWSmall, 0.3', 24-Pin Package and28-Terminal Surface Mount Packages

The LTC2640 is a family of 12-, 10-, and 8-bit voltage-output DACs with an integrated, high-accuracy, low-drift reference in an 8-lead TSOT-23 package. It has a rail-to-rail output buffer that is guaranteed monotonic.The LTC2640-L has a full-scale output of 2.5V, and operates from a single 2.7V to 5.5V supply. The LTC2640-H has a full-scale output of 4.096V, and operates from a 4.5V to 5.5V supply. A 10ppm/°C reference output is available at the REF pin.Each DAC can also operate in External Reference mode, in which a voltage supplied to the REF pin sets the fullscale output.The LTC2640 DACs use a SPI/MICROWIRE™ compatible 3-wire serial interface which operates at clock rates up to 50MHz.The LTC2640 incorporates a power-on reset circuit. Options are available for Reset to Zero-Scale or Reset to Mid-Scale after power-up.Applications Mobile Communications Process Control and Industrial Automation Automatic Test Equipment Portable Equipment Automotive Optical Networking

The LTC2261-12/LTC2260-12/LTC2259-12 are sampling 12-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 70.8dB SNR and 85dB spurious free dynamic range (SFDR). Ultralow jitter of 0.17psRMS allows undersampling of IF frequencies with excellent noise performance.DC specs include ±0.3LSB INL (typical), ±0.1LSB DNL (typical) and no missing codes over temperature. The transition noise is a low 0.3LSBRMS.The digital outputs can be either full-rate CMOS, double-data rate CMOS, or double-data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V.The ENC+ and ENC– inputs may be driven differentially or single ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. Bits LTC2259-12 12 LTC2259-14 14 LTC2259-16 14 Applications Communications Cellular Base Stations Software Defined Radios Portable Medical Imaging Multi-Channel Data Acquisition Nondestructive Testing

The LTC2258-12/LTC2257-12/LTC2256-12 are sampling 12-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 71.1dB SNR and 88dB spurious free dynamic range (SFDR). Ultralow jitter of 0.17psRMS allows undersampling of IF frequencies with excellent noise performance.DC specs include ±0.3LSB INL (typical), ±0.1LSB DNL (typical) and no missing codes over temperature. The transition noise is a low 0.3LSBRMS.The digital outputs can be either full rate CMOS, double data rate CMOS, or double data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V.The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. Bits LTC2257-12 12 LTC2257-14 14 Applications Communications Cellular Base Stations Software Defined Radios Portable Medical Imaging Multi-Channel Data Acquisition Nondestructive Testing

The LTC2261-14/LTC2260-14/LTC2259-14 are sampling 14-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 73.4dB SNR and 85dB spurious free dynamic range (SFDR). Ultralow jitter of 0.17psRMS allows undersampling of IF frequencies with excellent noise performance.DC specs include ±1LSB INL (typical), ±0.3LSB DNL (typical) and no missing codes over temperature. The transition noise is a low 1.2LSBRMS.The digital outputs can be either full-rate CMOS, doubledata rate CMOS, or double-data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V.The ENC+ and ENC– inputs may be driven differentially or single ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. Bits LTC2261-12 12 LTC2261-14 14 Applications Communications Cellular Base Stations Software Defined Radios Portable Medical Imaging Multi-Channel Data Acquisition Nondestructive Testing

The AD5821A is a single, 10-bit digital-to-analog converter (DAC) with output current sinking capability of 120 mA. It features an internal reference and operates from a single 2.7 V to 5.5 V supply. The DAC is controlled via a 2-wire, I2C®-compatible serial interface that operates at clock rates up to 400 kHz.The AD5821A incorporates a power-on reset circuit that ensures the DAC output powers up to 0 V and remains there until a valid write takes place. It has a power-down feature that reduces the current consumption of the device to 1 μA maximum.The AD5821A is designed for autofocus, image stabilization, and optical zoom applications in camera phones, digital still cameras, and camcorders.The AD5821A is also suitable for many industrial applications, such as controlling temperature, light, and movement without derating over temperatures ranging from −30°C to +85°C.The I2C 7-bit address for the AD5821A is 0xC.

The AD7626 is a 16-bit, 10 MSPS, charge redistributionsuccessive approximation register (SAR) based architectureanalog-to-digital converter (ADC). SAR architecture allowsunmatched performance both in noise (91.5 dB SNR) and inlinearity (±0.45 LSB INL). The AD7626 contains a high speed,16-bit sampling ADC, an internal conversion clock, and aninternal buffered reference. On the CNV edge, it samples thevoltage difference between the IN+ and IN− pins. The voltageson these pins swing in opposite phase between 0 V and REF.The 4.096 V reference voltage, REF, can be generated internallyor applied externally.All converted results are available on a single low voltagedifferential signaling (LVDS) self clocked or echoed clock serialinterface, reducing external hardware connections.The AD7626 is housed in a 32-lead, 5 mm × 5 mm LFCSP withoperation specified from −40°C to +85°C.Applications Digital imaging systems – Digital X-ray – Digital MRI – CCD and IR cameras High speed data acquisition High dynamic range telecommunications receivers Spectrum analysis Test equipment

The AD7854/AD7854L is a high speed, low power, 12-bit ADC that operates from a single 3 V or 5 V power supply, the AD7854 being optimized for speed and the AD7854L for low power. The ADC powers up with a set of default conditions at which time it can be operated as a read-only ADC. The ADC contains self-calibration and system calibration options to ensure accurate operation over time and temperature and has a number of power-down options for low power applications. The AD7854 is capable of 200 kHz throughput rate while the AD7854L is capable of 100 kHz throughput rate. The input track-and-hold acquires a signal in 500 ns and features a pseudo-differential sampling scheme. The AD7854 and AD7854L input voltage range is 0 to VREF (unipolar) and -VREF/2 to +VREF/2, centered at VREF/2 (bipolar). The coding is straight binary in unipolar mode and twos complement in bipolar mode. Input signal range is to the supply and the part is capable of converting full-power signals to 100 kHz. CMOS construction ensures low power dissipation of typically 5.4 mW for normal operation and 3.6 µW in power-down mode. The part is available in 28-pin, 0.6 inch wide dual-in-line package (DIP), 28-lead small outline (SOIC) and 28-lead small shrink outline (SSOP) packages.

The AD9230 is a 12-bit monolithic sampling analog-to-digital converter optimized for high performance, low power, and ease of use. The product operates at up to a 250 MSPS conversion rate and is optimized for outstanding dynamic performance in wideband carrier and broadband systems. All necessary functions, including a track-and-hold (T/H) and voltage reference, are included on the chip to provide a complete signal conversion solution. The ADC requires a 1.8 V analog voltage supply and a differential clock for full performance operation. The digital outputs are LVDS (ANSI-644) compatible and support either twos complement, offset binary format, or Gray code. A data clock output is available for proper output data timing.Fabricated on an advanced CMOS process, the AD9230 is available in a 56-lead LFCSP, specified over the industrial temperature range (−40°C to +85°C).PRODUCT HIGHLIGHTS High Performance—Maintains 64.9 dBFS SNR @ 250 MSPS with a 70 MHz input. Low Power—Consumes only 434 mW @ 250 MSPS. Ease of Use—LVDS output data and output clock signal allow interface to current FPGA technology. The on-chip reference and sample and hold provide flexibility in system design. Use of a single 1.8 V supply simplifies system power supply design. Serial Port Control—Standard serial port interface supports various product functions, such as data formatting, disabling the clock duty cycle stabilizer, power-down, gain adjust, and output test pattern generation. Pin-Compatible Family—10-bit pin-compatible family offered as AD9211.APPLICATIONS Wireless and wired broadband communications Cable reverse path Communications test equipment Radar and satellite subsystems Power amplifier linearization

The LTC2268-14/LTC2267-14/LTC2266-14 are 2-channel, simultaneous sampling 14-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 73.1dB SNR and 88dB spurious free dynamic range (SFDR). Ultralow jitter of 0.15psRMS allows undersampling of IF frequencies with excellent noise performance. DC specs include ±1LSB INL (typ), ±0.3LSB DNL (typ) and no missing codes over temperature. The transition noise is a low 1.2LSBRMS. The digital outputs are serial LVDS to minimize the number of data lines. Each channel outputs two bits at a time (2-lane mode). At lower sampling rates there is a one bit per channel option (1-lane mode). The LVDS drivers have optional internal termination and adjustable output levels to ensure clean signal integrity. The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An internal clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. Bits LTC2266-12 12 LTC2266-14 14 Applications Communications Cellular Base Stations Software Defined Radios Portable Medical Imaging Multichannel Data Acquisition Nondestructive Testing