The LTC2380-16 is a low noise, low power, high speed 16-bit successive approximation register (SAR) ADC. Operating from a 2.5V supply, the LTC2380-16 has a ±VREF fully differential input range with VREF ranging from 2.5V to 5.1V. The LTC2380-16 consumes only 19mW and achieves ±0.6LSB INL maximum, no missing codes at 16-bits with 96.2dB SNR.The LTC2380-16 has a high speed SPI-compatible serial interface that supports 1.8V, 2.5V, 3.3V and 5V logic while also featuring a daisy-chain mode. The fast 2Msps throughput with no cycle latency makes the LTC2380-16 ideally suited for a wide variety of high speed applications. An internal oscillator sets the conversion time, easing external timing considerations. The LTC2380-16 automatically powers down between conversions, leading to reduced power dissipation that scales with the sampling rate.The LTC2380-16 features a unique digital gain compression (DGC) function, which eliminates the driver amplifier’s negative supply while preserving the full resolution of the ADC. When enabled, the ADC performs a digital scaling function that maps zero-scale code from 0V to 0.1 • VREF and full-scale code from VREF to 0.9 • VREF. For a typical reference voltage of 5V, the full-scale input range is now 0.5V to 4.5V, which provides adequate headroom for powering the driving amplifier from a single 5.5V supply.Applications Medical Imaging High Speed Data Acquisition Portable or Compact Instrumentation Industrial Process Control Low Power Battery-Operated Instrumentation ATE

The AD5684R nanoDAC+™ is a quad, 12-bit, rail-to-rail, voltage output DAC. The device includes a 2.5V, 2ppm/˚C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5V (gain=1) or 5V (gain=2). The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design and exhibits less than 0.1% FSR gain error and 1.5mV offset error performance. The device is available in a 3mm X 3mm LFCSP and a TSSOP package.The AD5684R also incorporates a power-on-reset circuit and a RSTSEL pin that ensures the DAC outputs power up to zero-scale or midscale, and remain there until a valid write takes place. Each device contains a per-channel power-down feature that reduces the current consumption of the device to 4 uA at 3 V while in power-down mode.The AD5684R employs a versatile SPI interface that operates at clock rates up to 50 MHz and includes a VLOGIC pin intended for 1.8V/3V/5V logic.Product Highlights High relative accuracy: AD5684R (12-bit): ±1LSB INL max Low drift on-chip reference: 2.5V, 2ppm/°C temperature drift Two package options: 3mm × 3mm 16-lead LFCSP or 16-lead TSSOPApplications Optical transceivers Base-station power amplifiers Process control (PLC I/O cards) Industrial automation Data acquisition systems

The AD5689/AD5687 members of the nanoDAC+™ family arelow power, dual, 16-/12-bit, buffered voltage output digital-to-analogconverters (DACs). The devices include a gain select pingiving a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). TheAD5689/AD5687 operate from a single 2.7 V to 5.5 V supply, areguaranteed monotonic by design, and exhibit less than 0.1% FSRgain error and 1.5 mV offset error performance. Both devices areavailable in a 3 mm × 3 mm LFCSP and a TSSOP package.The AD5689/AD5687 also incorporate a power-on reset circuitand a RSTSEL pin that ensure that the DAC outputs power upto zero scale or midscale and remain there until a valid writetakes place. Each part contains a per channel power-down featurethat reduces the current consumption of the device to 4 µA at3 V while in power-down mode.The AD5689/AD5687 uses a versatile serial peripheral interfacethat operates at clock rates up to 50 MHz. Both devices containa VLOGIC pin that is intended for 1.8 V/3 V/5 V logic.Product Highlights High Relative Accuracy (INL). AD5687 (12-bit): ±1 LSB maximum Excellent DC Performance. Total unadjusted error: ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum Two Package Options. 3 mm × 3 mm, 16-lead LFCSP or 16-lead TSSOPApplications Optical transceivers Base station power amplifiers Process control (PLC I/O cards) Industrial automation Data acquisition systems

The AD7176-2 is a fast settling, highly accurate, high resolution,multiplexed Σ-Δ analog-to-digital converter (ADC) for low bandwidthinput signals. Its inputs can be configured as two fullydifferential or four pseudo differential inputs via the integratedcrosspoint multiplexer. An integrated precision, 2.5 V, low drift(2 ppm/°C), band gap internal reference (with an outputreference buffer) adds functionality and reduces the externalcomponent count.The maximum channel scan data rate is 50 kSPS/channel(settling time of 20 µs), resulting in fully settled data with17 noise free bits. User-selectable output data rates range from5 SPS to 250 kSPS. The resolution increases at lower speeds.The AD7176-2 offers three key digital filters. The fast settlingsinc5 + sinc1 filter maximizes the channel scan rate. The sinc3filter maximizes the resolution for single-channel, low speedapplications. For 50 Hz and 60 Hz environments, the AD7176-2specific filter minimizes the settling times or maximizes therejection of the line frequency. These enhanced filters enablesimultaneous 50 Hz and 60 Hz rejection with a 27 SPS outputdata rate (with a settling time of 36 ms).System offset and gain errors can be corrected on a per channelbasis. This per channel configurability extends to the output datarate used for each channel when using a sinc5 + sinc1 filter. Allswitching of the crosspoint multiplexer is controlled by the ADCand can be configured to automatically control an externalmultiplexer via the GPIO pins.The specified operating temperature range is −40°C to +105°C.The AD7176-2 is housed in a 24-lead TSSOP package.Applications Process control: PLC/DCS modules - Temperature and pressure measurement Medical and scientific multichannel instrumentation Chromatography

The AD7988-1/AD7988-5 are 16-bit, successive approximation,analog-to-digital converters (ADC) that operate from a singlepower supply, VDD. The AD7988-1 offers a 100 kSPS throughput,and the AD7988-5 offers a 500 kSPS throughput. They are lowpower, 16-bit sampling ADCs with a versatile serial interfaceport. On the CNV rising edge, they sample an analog input,IN+, between 0 V to VREF with respect to a ground sense, IN−.The reference voltage, REF, is applied externally and can be setindependent of the supply voltage, VDD.The SPI-compatible serial interface also features the ability todaisy-chain several ADCs on a single 3-wire bus using the SDIinput. It is compatible with 1.8 V, 2.5 V, 3 V, or 5 V logic usingthe separate supply, VIO.The AD7988-1/AD7988-5 generics are housed in a 10-leadMSOP or a 10-lead LFCSP with operation specified from −40°Cto +125°C.Applications Automated test equipment Data acquisition systems Medical instruments Machine automation

The AD7988-1/AD7988-5 are 16-bit, successive approximation,analog-to-digital converters (ADC) that operate from a singlepower supply, VDD. The AD7988-1 offers a 100 kSPS throughput,and the AD7988-5 offers a 500 kSPS throughput. They are lowpower, 16-bit sampling ADCs with a versatile serial interfaceport. On the CNV rising edge, they sample an analog input,IN+, between 0 V to VREF with respect to a ground sense, IN−.The reference voltage, REF, is applied externally and can be setindependent of the supply voltage, VDD.The SPI-compatible serial interface also features the ability todaisy-chain several ADCs on a single 3-wire bus using the SDIinput. It is compatible with 1.8 V, 2.5 V, 3 V, or 5 V logic usingthe separate supply, VIO.The AD7988-1/AD7988-5 generics are housed in a 10-leadMSOP or a 10-lead LFCSP with operation specified from −40°Cto +125°C.Applications Automated test equipment Data acquisition systems Medical instruments Machine automation

The AD9434 is a 12-bit monolithic sampling analog-to-digital converter (ADC) optimized for high performance, low power, and ease of use. The part operates at up to a 500 MSPS conversion rate and is optimized for outstanding dynamic performance in wideband carrier and broadband systems. All necessary functions, including a sample-and-hold and voltagereference, are included on the chip to provide a complete signal conversion solution. The VREF pin can be used to monitor the internal reference or provide an external voltage reference (external reference mode must be enabled through the SPI port). The ADC requires a 1.8 V analog voltage supply and a differential clock for full performance operation. The digital outputs are LVDS (ANSI-644) compatible and support twos complement, offset binary format, or Gray code. A data clock output is available for proper output data timing.Fabricated on an advanced BiCMOS process, the AD9434 isavailable in a 56-lead LFCSP, specified over the industrial temperature range (−40°C to +85°C). This part is protected under a U.S. patent.APPLICATIONS Wireless and wired broadband communications Cable reverse path Communications test equipment Radar and satellite subsystems Power amplifier linearizationPRODUCT HIGHLIGHTS High Performance. Maintains 65 dBFS SNR at 500 MSPS with a 250 MHz input. Low Power. Consumes only 660 mW at 500 MSPS. Ease of Use. LVDS output data and output clock signal allow interface to current FPGA technology. The on-chip reference and sample and hold provide flexibility in system design. Use of a single 1.8 V supply simplifies system power supply design. Serial Port Control. Standard serial port interface supports various product functions, such as data formatting, power-down, gain adjust, and output test pattern generation. The AD9434 is pin compatible with the AD9230, and can be substituted in many applications with minimal design changes.

The AD9613 is a dual 12-bit, analog-to-digital converter (ADC) with sampling speeds up to 250 MSPS. The AD9613 is designed to support communications applications where low cost, small size, wide bandwidth and versatility are desired.The dual ADC core features a multistage, differential pipelinedarchitecture with integrated output error correction logic. EachADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.The ADC output data are routed directly to the two external 12-bit LVDS output ports and formatted either as interleaved or channel multiplexed.Flexible power-down options allow significant power savings,when desired.Programming for setup and control are accomplished using a 3-wire SPI-compatible serial interface.The AD9613 is available in a 64-lead LFCSP and is specified overthe industrial temperature range of −40°C to +85°C.PRODUCT HIGHLIGHTS Integrated dual, 12-bit, 170 MSPS/210 MSPS/250 MSPS ADCs. Fast overrange and threshold detect. Proprietary differential input maintains excellent SNR performance for input frequencies up to 400 MHz. SYNC input allows synchronization of multiple devices. 3-pin, 1.8V SPI port for register programming and register readback. Pin compatibility with the AD9643, allowing a simple migration up to 14 bits, and with the AD6649 and the AD6643.APPLICATIONS Communications Diversity radio systems Multimode digital receivers (3G) TD-SCDMA, WiMax, WCDMA, CDMA2000, GSM, EDGE, LTE I/Q demodulation systems Smart antenna systems General-purpose software radios Ultrasound equipment Broadband data applications

The AD9628 is a monolithic, dual-channel, 1.8 V supply, 12-bit, 125 MSPS/105 MSPS analog-to-digital converter (ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference.The product uses multistage differential pipeline architecture with output error correction logic to provide 12-bit accuracy at 125 MSPS data rates and to guarantee no missing codes over the full operating temperature range.The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).A differential clock input controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.The digital output data is presented in offset binary, Gray code, or twos complement format. A data output clock (DCO) is provided for each ADC channel to ensure proper latch timing with receiving logic. 1.8 V CMOS or LVDS output logic levels are supported. Output data can also be multiplexed onto a single output bus.APPLICATIONS Communications Diversity radio systems Multimode digital receivers GSM, EDGE, W-CDMA, LTE, CDMA2000, WIMAX, TD-SCDMA I/Q demodulation systems Smart antenna systems Broadband data applications Battery-powered instruments Hand-held scope meters Portable medical imaging Ultrasound Radar/LIDARPRODUCT HIGHLIGHTS The AD9628 operates from a single 1.8 V analog power supply and features a separate digital output driver supply to accommodate 1.8 V CMOS or LVDS logic families.  The patented sample-and-hold circuit maintains excellent performance for input frequencies up to 200 MHz and is designed for low cost, low power, and ease of use.  A standard serial port interface supports various product features and functions, such as data output formatting, internal clock divider, power-down, DCO/data timing and offset adjustments.  The AD9628 is packaged in a 64-lead RoHS-compliant LFCSP that is pin compatible with the AD9650 / AD9269 / AD9268 16-bit ADC, the AD9258 / AD9251 / AD9648 14-bit ADCs, the AD9231 12-bit ADC, and the AD9608 / AD9204 10-bit ADCs, enabling a simple migration path between 10-bit and 16-bit converters sampling from 20MSPS to 125MSPS.

The AD9637 is an octal, 12-bit, 40/80 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 80 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications.The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided. Individual channel power-down is supported and typically consumes less than 2 mW when all channels are disabled.The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).The AD9637 is available in a RoHS-compliant, 64-lead LFCSP. It is specified over the industrial temperature range of −40°C to +85°C. This product is protected by a U.S. patent.APPLICATIONS Medical imaging and nondestructive ultrasound Portable ultrasound and digital beam-forming systems Quadrature radio receivers Diversity radio receivers Optical networking Test equipmentPRODUCT HIGHLIGHTS Small Footprint. Eight ADCs are contained in a small, space-saving package. Low Power of 60 mW/Channel at 80 MSPS with Scalable Power Options. Ease of Use. A data clock output (DCO) is provided that operates at frequencies of up to 480 MHz and supports double data rate (DDR) operation. User Flexibility. The SPI control offers a wide range of flexible features to meet specific system requirements. Pin Compatible with the AD9257 (14-Bit Octal ADC).